SMM: add defines for APM_CNT register
authorSven Schnelle <svens@stackframe.org>
Sun, 5 Jun 2011 09:33:41 +0000 (11:33 +0200)
committerSven Schnelle <svens@stackframe.org>
Tue, 7 Jun 2011 20:01:29 +0000 (22:01 +0200)
in the current code, the defines for the APM_CNT (0xb2) register
are duplicated in almost every place where it is used. define those
values in cpu/x86/smm.h, and only include this file.

And while at it, fixup whitespace.

Change-Id: Iae712aff53322acd51e89986c2abf4c794e25484
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/4
Tested-by: build bot (Jenkins)
16 files changed:
src/include/cpu/x86/smm.h
src/mainboard/getac/p470/fadt.c
src/mainboard/ibase/mb899/fadt.c
src/mainboard/intel/d945gclf/fadt.c
src/mainboard/intel/eagleheights/fadt.c
src/mainboard/iwave/iWRainbowG6/fadt.c
src/mainboard/kontron/986lcd-m/fadt.c
src/mainboard/lenovo/t60/fadt.c
src/mainboard/lenovo/x60/fadt.c
src/mainboard/lenovo/x60/mainboard_smi.c
src/mainboard/roda/rk886ex/fadt.c
src/southbridge/intel/i82801dx/smihandler.c
src/southbridge/intel/i82801gx/lpc.c
src/southbridge/intel/i82801gx/smihandler.c
src/southbridge/intel/sch/smihandler.c
src/southbridge/via/vt8237r/smihandler.c

index 559b1b71979d5d8a2f379f8d8000e40f550d3e68..5605453eabd6d8d29f27b01754dc8ccd3cfc7537 100644 (file)
@@ -248,6 +248,14 @@ typedef struct {
        };
 } smm_state_save_area_t;
 
+#define APM_CNT                0xb2
+#define APM_CNT_CST_CONTROL    0x85
+#define APM_CNT_PST_CONTROL    0x80
+#define APM_CNT_ACPI_DISABLE   0x1e
+#define APM_CNT_ACPI_ENABLE    0xe1
+#define APM_CNT_MBI_UPDATE     0xeb
+#define APM_CNT_GNVS_UPDATE    0xea
+#define APM_STS                0xb3
 
 /* SMI handler function prototypes */
 void smi_handler(u32 smm_revision);
index dcce4674a27664fc58f2ffefec4bf58dd8cd023c..7c9b11361fadc349341d553a7498575eb05ebb53 100644 (file)
 #include <string.h>
 #include <device/pci.h>
 #include <arch/acpi.h>
+#include <cpu/x86/smm.h>
 
 /* FIXME: This needs to go into a separate .h file
  * to be included by the ich7 smi handler, ich7 smi init
  * code and the mainboard fadt.
  */
-#define APM_CNT                0xb2
-#define   CST_CONTROL  0x85
-#define   PST_CONTROL  0x80
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-#define   GNVS_UPDATE   0xea
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
@@ -41,8 +36,8 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 
        memset((void *) fadt, 0, sizeof(acpi_fadt_t));
        memcpy(header->signature, "FACP", 4);
-       header->length = sizeof(acpi_fadt_t);
-       header->revision = 3;
+       header->length = sizeof(acpi_fadt_t);
+       header->revision = 3;
        memcpy(header->oem_id, "CORE  ", 6);
        memcpy(header->oem_table_id, "COREBOOT", 8);
        memcpy(header->asl_compiler_id, "CORE", 4);
@@ -52,12 +47,12 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->dsdt = (unsigned long) dsdt;
        fadt->preferred_pm_profile = PM_MOBILE;
 
-       fadt->sci_int = 0x9;
-       fadt->smi_cmd = APM_CNT;
-       fadt->acpi_enable = ACPI_ENABLE;
-       fadt->acpi_disable = ACPI_DISABLE;
-       fadt->s4bios_req = 0x0; // S4 command disabled
-       fadt->pstate_cnt = PST_CONTROL;
+       fadt->sci_int = 0x9;
+       fadt->smi_cmd = APM_CNT;
+       fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
+       fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
+       fadt->s4bios_req = 0x0; // S4 command disabled
+       fadt->pstate_cnt = APM_CNT_PST_CONTROL;
 
        fadt->pm1a_evt_blk = pmbase;
        fadt->pm1b_evt_blk = 0x0;
@@ -75,7 +70,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->gpe0_blk_len = 8;
        fadt->gpe1_blk_len = 0;
        fadt->gpe1_base = 0;
-       fadt->cst_cnt = CST_CONTROL;
+       fadt->cst_cnt = APM_CNT_CST_CONTROL;
        fadt->p_lvl2_lat = 1;
        fadt->p_lvl3_lat = 85;
        fadt->flush_size = 1024;
@@ -86,78 +81,78 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->mon_alrm = 0x00;
        fadt->century = 0x00;
        fadt->iapc_boot_arch = 0x00;
-       fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
-                       ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
-                       ACPI_FADT_DOCKING_SUPPORTED;
-
-       fadt->reset_reg.space_id = 0;
-       fadt->reset_reg.bit_width = 0;
-       fadt->reset_reg.bit_offset = 0;
-       fadt->reset_reg.resv = 0;
-       fadt->reset_reg.addrl = 0x0;
-       fadt->reset_reg.addrh = 0x0;
-
-       fadt->reset_value = 0;
-       fadt->x_firmware_ctl_l = (unsigned long)facs;
-       fadt->x_firmware_ctl_h = 0;
-       fadt->x_dsdt_l = (unsigned long)dsdt;
-       fadt->x_dsdt_h = 0;
-
-       fadt->x_pm1a_evt_blk.space_id = 1;
-       fadt->x_pm1a_evt_blk.bit_width = 32;
-       fadt->x_pm1a_evt_blk.bit_offset = 0;
-       fadt->x_pm1a_evt_blk.resv = 0;
-       fadt->x_pm1a_evt_blk.addrl = pmbase;
-       fadt->x_pm1a_evt_blk.addrh = 0x0;
-
-       fadt->x_pm1b_evt_blk.space_id = 1;
-       fadt->x_pm1b_evt_blk.bit_width = 0;
-       fadt->x_pm1b_evt_blk.bit_offset = 0;
-       fadt->x_pm1b_evt_blk.resv = 0;
-       fadt->x_pm1b_evt_blk.addrl = 0x0;
-       fadt->x_pm1b_evt_blk.addrh = 0x0;
-
-       fadt->x_pm1a_cnt_blk.space_id = 1;
-       fadt->x_pm1a_cnt_blk.bit_width = 16;
-       fadt->x_pm1a_cnt_blk.bit_offset = 0;
-       fadt->x_pm1a_cnt_blk.resv = 0;
-       fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
-       fadt->x_pm1a_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm1b_cnt_blk.space_id = 1;
-       fadt->x_pm1b_cnt_blk.bit_width = 0;
-       fadt->x_pm1b_cnt_blk.bit_offset = 0;
-       fadt->x_pm1b_cnt_blk.resv = 0;
-       fadt->x_pm1b_cnt_blk.addrl = 0x0;
-       fadt->x_pm1b_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm2_cnt_blk.space_id = 1;
-       fadt->x_pm2_cnt_blk.bit_width = 8;
-       fadt->x_pm2_cnt_blk.bit_offset = 0;
-       fadt->x_pm2_cnt_blk.resv = 0;
-       fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20;
-       fadt->x_pm2_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm_tmr_blk.space_id = 1;
-       fadt->x_pm_tmr_blk.bit_width = 32;
-       fadt->x_pm_tmr_blk.bit_offset = 0;
-       fadt->x_pm_tmr_blk.resv = 0;
-       fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
-       fadt->x_pm_tmr_blk.addrh = 0x0;
-
-       fadt->x_gpe0_blk.space_id = 1;
-       fadt->x_gpe0_blk.bit_width = 64;
-       fadt->x_gpe0_blk.bit_offset = 0;
-       fadt->x_gpe0_blk.resv = 0;
-       fadt->x_gpe0_blk.addrl = pmbase + 0x28;
-       fadt->x_gpe0_blk.addrh = 0x0;
-
-       fadt->x_gpe1_blk.space_id = 1;
-       fadt->x_gpe1_blk.bit_width = 0;
-       fadt->x_gpe1_blk.bit_offset = 0;
-       fadt->x_gpe1_blk.resv = 0;
-       fadt->x_gpe1_blk.addrl = 0x0;
-       fadt->x_gpe1_blk.addrh = 0x0;
+       fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
+                       ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
+                       ACPI_FADT_DOCKING_SUPPORTED;
+
+       fadt->reset_reg.space_id = 0;
+       fadt->reset_reg.bit_width = 0;
+       fadt->reset_reg.bit_offset = 0;
+       fadt->reset_reg.resv = 0;
+       fadt->reset_reg.addrl = 0x0;
+       fadt->reset_reg.addrh = 0x0;
+
+       fadt->reset_value = 0;
+       fadt->x_firmware_ctl_l = (unsigned long)facs;
+       fadt->x_firmware_ctl_h = 0;
+       fadt->x_dsdt_l = (unsigned long)dsdt;
+       fadt->x_dsdt_h = 0;
+
+       fadt->x_pm1a_evt_blk.space_id = 1;
+       fadt->x_pm1a_evt_blk.bit_width = 32;
+       fadt->x_pm1a_evt_blk.bit_offset = 0;
+       fadt->x_pm1a_evt_blk.resv = 0;
+       fadt->x_pm1a_evt_blk.addrl = pmbase;
+       fadt->x_pm1a_evt_blk.addrh = 0x0;
+
+       fadt->x_pm1b_evt_blk.space_id = 1;
+       fadt->x_pm1b_evt_blk.bit_width = 0;
+       fadt->x_pm1b_evt_blk.bit_offset = 0;
+       fadt->x_pm1b_evt_blk.resv = 0;
+       fadt->x_pm1b_evt_blk.addrl = 0x0;
+       fadt->x_pm1b_evt_blk.addrh = 0x0;
+
+       fadt->x_pm1a_cnt_blk.space_id = 1;
+       fadt->x_pm1a_cnt_blk.bit_width = 16;
+       fadt->x_pm1a_cnt_blk.bit_offset = 0;
+       fadt->x_pm1a_cnt_blk.resv = 0;
+       fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
+       fadt->x_pm1a_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm1b_cnt_blk.space_id = 1;
+       fadt->x_pm1b_cnt_blk.bit_width = 0;
+       fadt->x_pm1b_cnt_blk.bit_offset = 0;
+       fadt->x_pm1b_cnt_blk.resv = 0;
+       fadt->x_pm1b_cnt_blk.addrl = 0x0;
+       fadt->x_pm1b_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm2_cnt_blk.space_id = 1;
+       fadt->x_pm2_cnt_blk.bit_width = 8;
+       fadt->x_pm2_cnt_blk.bit_offset = 0;
+       fadt->x_pm2_cnt_blk.resv = 0;
+       fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20;
+       fadt->x_pm2_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm_tmr_blk.space_id = 1;
+       fadt->x_pm_tmr_blk.bit_width = 32;
+       fadt->x_pm_tmr_blk.bit_offset = 0;
+       fadt->x_pm_tmr_blk.resv = 0;
+       fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
+       fadt->x_pm_tmr_blk.addrh = 0x0;
+
+       fadt->x_gpe0_blk.space_id = 1;
+       fadt->x_gpe0_blk.bit_width = 64;
+       fadt->x_gpe0_blk.bit_offset = 0;
+       fadt->x_gpe0_blk.resv = 0;
+       fadt->x_gpe0_blk.addrl = pmbase + 0x28;
+       fadt->x_gpe0_blk.addrh = 0x0;
+
+       fadt->x_gpe1_blk.space_id = 1;
+       fadt->x_gpe1_blk.bit_width = 0;
+       fadt->x_gpe1_blk.bit_offset = 0;
+       fadt->x_gpe1_blk.resv = 0;
+       fadt->x_gpe1_blk.addrl = 0x0;
+       fadt->x_gpe1_blk.addrh = 0x0;
 
        header->checksum =
            acpi_checksum((void *) fadt, header->length);
index a0e381fb135b8b3bc5152a88ebdb36d9fd39a3ef..44d4c9b8ebe45981e5e645caed64fa2f017f66ed 100644 (file)
 #include <string.h>
 #include <device/pci.h>
 #include <arch/acpi.h>
-
-/* FIXME: This needs to go into a separate .h file
- * to be included by the ich7 smi handler, ich7 smi init
- * code and the mainboard fadt.
- */
-#define APM_CNT                0xb2
-#define   CST_CONTROL  0x85
-#define   PST_CONTROL  0x80
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-#define   GNVS_UPDATE   0xea
+#include <cpu/x86/smm.h>
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
@@ -39,8 +29,8 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 
        memset((void *) fadt, 0, sizeof(acpi_fadt_t));
        memcpy(header->signature, "FACP", 4);
-       header->length = sizeof(acpi_fadt_t);
-       header->revision = 3;
+       header->length = sizeof(acpi_fadt_t);
+       header->revision = 3;
        memcpy(header->oem_id, "CORE  ", 6);
        memcpy(header->oem_table_id, "COREBOOT", 8);
        memcpy(header->asl_compiler_id, "CORE", 4);
@@ -51,12 +41,12 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->model = 1;
        fadt->preferred_pm_profile = PM_MOBILE;
 
-       fadt->sci_int = 0x9;
-       fadt->smi_cmd = APM_CNT;
-       fadt->acpi_enable = ACPI_ENABLE;
-       fadt->acpi_disable = ACPI_DISABLE;
-       fadt->s4bios_req = 0x0;
-       fadt->pstate_cnt = PST_CONTROL;
+       fadt->sci_int = 0x9;
+       fadt->smi_cmd = APM_CNT;
+       fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
+       fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
+       fadt->s4bios_req = 0x0;
+       fadt->pstate_cnt = APM_CNT_PST_CONTROL;
 
        fadt->pm1a_evt_blk = pmbase;
        fadt->pm1b_evt_blk = 0x0;
@@ -75,7 +65,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->gpe0_blk_len = 8;
        fadt->gpe1_blk_len = 0;
        fadt->gpe1_base = 0;
-       fadt->cst_cnt = CST_CONTROL;
+       fadt->cst_cnt = APM_CNT_CST_CONTROL;
        fadt->p_lvl2_lat = 1;
        fadt->p_lvl3_lat = 85;
        fadt->flush_size = 1024;
@@ -87,78 +77,78 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->century = 0x00;
        fadt->iapc_boot_arch = 0x03;
 
-       fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
+       fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
                        ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
                        ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
 
-       fadt->reset_reg.space_id = 0;
-       fadt->reset_reg.bit_width = 0;
-       fadt->reset_reg.bit_offset = 0;
-       fadt->reset_reg.resv = 0;
-       fadt->reset_reg.addrl = 0x0;
-       fadt->reset_reg.addrh = 0x0;
-
-       fadt->reset_value = 0;
-       fadt->x_firmware_ctl_l = (unsigned long)facs;
-       fadt->x_firmware_ctl_h = 0;
-       fadt->x_dsdt_l = (unsigned long)dsdt;
-       fadt->x_dsdt_h = 0;
-
-       fadt->x_pm1a_evt_blk.space_id = 1;
-       fadt->x_pm1a_evt_blk.bit_width = 32;
-       fadt->x_pm1a_evt_blk.bit_offset = 0;
-       fadt->x_pm1a_evt_blk.resv = 0;
-       fadt->x_pm1a_evt_blk.addrl = pmbase;
-       fadt->x_pm1a_evt_blk.addrh = 0x0;
-
-       fadt->x_pm1b_evt_blk.space_id = 1;
-       fadt->x_pm1b_evt_blk.bit_width = 0;
-       fadt->x_pm1b_evt_blk.bit_offset = 0;
-       fadt->x_pm1b_evt_blk.resv = 0;
-       fadt->x_pm1b_evt_blk.addrl = 0x0;
-       fadt->x_pm1b_evt_blk.addrh = 0x0;
-
-       fadt->x_pm1a_cnt_blk.space_id = 1;
-       fadt->x_pm1a_cnt_blk.bit_width = 16;
-       fadt->x_pm1a_cnt_blk.bit_offset = 0;
-       fadt->x_pm1a_cnt_blk.resv = 0;
-       fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
-       fadt->x_pm1a_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm1b_cnt_blk.space_id = 1;
-       fadt->x_pm1b_cnt_blk.bit_width = 0;
-       fadt->x_pm1b_cnt_blk.bit_offset = 0;
-       fadt->x_pm1b_cnt_blk.resv = 0;
-       fadt->x_pm1b_cnt_blk.addrl = 0x0;
-       fadt->x_pm1b_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm2_cnt_blk.space_id = 1;
-       fadt->x_pm2_cnt_blk.bit_width = 8;
-       fadt->x_pm2_cnt_blk.bit_offset = 0;
-       fadt->x_pm2_cnt_blk.resv = 0;
-       fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20;
-       fadt->x_pm2_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm_tmr_blk.space_id = 1;
-       fadt->x_pm_tmr_blk.bit_width = 32;
-       fadt->x_pm_tmr_blk.bit_offset = 0;
-       fadt->x_pm_tmr_blk.resv = 0;
-       fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
-       fadt->x_pm_tmr_blk.addrh = 0x0;
-
-       fadt->x_gpe0_blk.space_id = 1;
-       fadt->x_gpe0_blk.bit_width = 64;
-       fadt->x_gpe0_blk.bit_offset = 0;
-       fadt->x_gpe0_blk.resv = 0;
-       fadt->x_gpe0_blk.addrl = pmbase + 0x28;
-       fadt->x_gpe0_blk.addrh = 0x0;
-
-       fadt->x_gpe1_blk.space_id = 1;
-       fadt->x_gpe1_blk.bit_width = 0;
-       fadt->x_gpe1_blk.bit_offset = 0;
-       fadt->x_gpe1_blk.resv = 0;
-       fadt->x_gpe1_blk.addrl = 0x0;
-       fadt->x_gpe1_blk.addrh = 0x0;
+       fadt->reset_reg.space_id = 0;
+       fadt->reset_reg.bit_width = 0;
+       fadt->reset_reg.bit_offset = 0;
+       fadt->reset_reg.resv = 0;
+       fadt->reset_reg.addrl = 0x0;
+       fadt->reset_reg.addrh = 0x0;
+
+       fadt->reset_value = 0;
+       fadt->x_firmware_ctl_l = (unsigned long)facs;
+       fadt->x_firmware_ctl_h = 0;
+       fadt->x_dsdt_l = (unsigned long)dsdt;
+       fadt->x_dsdt_h = 0;
+
+       fadt->x_pm1a_evt_blk.space_id = 1;
+       fadt->x_pm1a_evt_blk.bit_width = 32;
+       fadt->x_pm1a_evt_blk.bit_offset = 0;
+       fadt->x_pm1a_evt_blk.resv = 0;
+       fadt->x_pm1a_evt_blk.addrl = pmbase;
+       fadt->x_pm1a_evt_blk.addrh = 0x0;
+
+       fadt->x_pm1b_evt_blk.space_id = 1;
+       fadt->x_pm1b_evt_blk.bit_width = 0;
+       fadt->x_pm1b_evt_blk.bit_offset = 0;
+       fadt->x_pm1b_evt_blk.resv = 0;
+       fadt->x_pm1b_evt_blk.addrl = 0x0;
+       fadt->x_pm1b_evt_blk.addrh = 0x0;
+
+       fadt->x_pm1a_cnt_blk.space_id = 1;
+       fadt->x_pm1a_cnt_blk.bit_width = 16;
+       fadt->x_pm1a_cnt_blk.bit_offset = 0;
+       fadt->x_pm1a_cnt_blk.resv = 0;
+       fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
+       fadt->x_pm1a_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm1b_cnt_blk.space_id = 1;
+       fadt->x_pm1b_cnt_blk.bit_width = 0;
+       fadt->x_pm1b_cnt_blk.bit_offset = 0;
+       fadt->x_pm1b_cnt_blk.resv = 0;
+       fadt->x_pm1b_cnt_blk.addrl = 0x0;
+       fadt->x_pm1b_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm2_cnt_blk.space_id = 1;
+       fadt->x_pm2_cnt_blk.bit_width = 8;
+       fadt->x_pm2_cnt_blk.bit_offset = 0;
+       fadt->x_pm2_cnt_blk.resv = 0;
+       fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20;
+       fadt->x_pm2_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm_tmr_blk.space_id = 1;
+       fadt->x_pm_tmr_blk.bit_width = 32;
+       fadt->x_pm_tmr_blk.bit_offset = 0;
+       fadt->x_pm_tmr_blk.resv = 0;
+       fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
+       fadt->x_pm_tmr_blk.addrh = 0x0;
+
+       fadt->x_gpe0_blk.space_id = 1;
+       fadt->x_gpe0_blk.bit_width = 64;
+       fadt->x_gpe0_blk.bit_offset = 0;
+       fadt->x_gpe0_blk.resv = 0;
+       fadt->x_gpe0_blk.addrl = pmbase + 0x28;
+       fadt->x_gpe0_blk.addrh = 0x0;
+
+       fadt->x_gpe1_blk.space_id = 1;
+       fadt->x_gpe1_blk.bit_width = 0;
+       fadt->x_gpe1_blk.bit_offset = 0;
+       fadt->x_gpe1_blk.resv = 0;
+       fadt->x_gpe1_blk.addrl = 0x0;
+       fadt->x_gpe1_blk.addrh = 0x0;
 
        header->checksum =
            acpi_checksum((void *) fadt, header->length);
index 5b2df8b2d2bbc15166f70c1803811a8829dca247..1a66eefaf14520341b371d37b791adb1c2475bc9 100644 (file)
 #include <string.h>
 #include <device/pci.h>
 #include <arch/acpi.h>
-
-/* FIXME: This needs to go into a separate .h file
- * to be included by the ich7 smi handler, ich7 smi init
- * code and the mainboard fadt.
- */
-#define APM_CNT                0xb2
-#define   CST_CONTROL  0x85
-#define   PST_CONTROL  0x80
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-#define   GNVS_UPDATE   0xea
+#include <cpu/x86/smm.h>
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
@@ -39,8 +29,8 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 
        memset((void *) fadt, 0, sizeof(acpi_fadt_t));
        memcpy(header->signature, "FACP", 4);
-       header->length = sizeof(acpi_fadt_t);
-       header->revision = 3;
+       header->length = sizeof(acpi_fadt_t);
+       header->revision = 3;
        memcpy(header->oem_id, "CORE  ", 6);
        memcpy(header->oem_table_id, "COREBOOT", 8);
        memcpy(header->asl_compiler_id, "CORE", 4);
@@ -51,12 +41,12 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->model = 1;
        fadt->preferred_pm_profile = PM_MOBILE;
 
-       fadt->sci_int = 0x9;
-       fadt->smi_cmd = APM_CNT;
-       fadt->acpi_enable = ACPI_ENABLE;
-       fadt->acpi_disable = ACPI_DISABLE;
-       fadt->s4bios_req = 0x0;
-       fadt->pstate_cnt = PST_CONTROL;
+       fadt->sci_int = 0x9;
+       fadt->smi_cmd = APM_CNT;
+       fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
+       fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
+       fadt->s4bios_req = 0x0;
+       fadt->pstate_cnt = APM_CNT_PST_CONTROL;
 
        fadt->pm1a_evt_blk = pmbase;
        fadt->pm1b_evt_blk = 0x0;
@@ -75,7 +65,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->gpe0_blk_len = 8;
        fadt->gpe1_blk_len = 0;
        fadt->gpe1_base = 0;
-       fadt->cst_cnt = CST_CONTROL;
+       fadt->cst_cnt = APM_CNT_CST_CONTROL;
        fadt->p_lvl2_lat = 1;
        fadt->p_lvl3_lat = 85;
        fadt->flush_size = 1024;
@@ -87,78 +77,78 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->century = 0x00;
        fadt->iapc_boot_arch = 0x03;
 
-       fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
-                       ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
+       fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
+               ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
                        ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
 
-       fadt->reset_reg.space_id = 0;
-       fadt->reset_reg.bit_width = 0;
-       fadt->reset_reg.bit_offset = 0;
-       fadt->reset_reg.resv = 0;
-       fadt->reset_reg.addrl = 0x0;
-       fadt->reset_reg.addrh = 0x0;
-
-       fadt->reset_value = 0;
-       fadt->x_firmware_ctl_l = (unsigned long)facs;
-       fadt->x_firmware_ctl_h = 0;
-       fadt->x_dsdt_l = (unsigned long)dsdt;
-       fadt->x_dsdt_h = 0;
-
-       fadt->x_pm1a_evt_blk.space_id = 1;
-       fadt->x_pm1a_evt_blk.bit_width = 32;
-       fadt->x_pm1a_evt_blk.bit_offset = 0;
-       fadt->x_pm1a_evt_blk.resv = 0;
-       fadt->x_pm1a_evt_blk.addrl = pmbase;
-       fadt->x_pm1a_evt_blk.addrh = 0x0;
-
-       fadt->x_pm1b_evt_blk.space_id = 1;
-       fadt->x_pm1b_evt_blk.bit_width = 0;
-       fadt->x_pm1b_evt_blk.bit_offset = 0;
-       fadt->x_pm1b_evt_blk.resv = 0;
-       fadt->x_pm1b_evt_blk.addrl = 0x0;
-       fadt->x_pm1b_evt_blk.addrh = 0x0;
-
-       fadt->x_pm1a_cnt_blk.space_id = 1;
-       fadt->x_pm1a_cnt_blk.bit_width = 16;
-       fadt->x_pm1a_cnt_blk.bit_offset = 0;
-       fadt->x_pm1a_cnt_blk.resv = 0;
-       fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
-       fadt->x_pm1a_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm1b_cnt_blk.space_id = 1;
-       fadt->x_pm1b_cnt_blk.bit_width = 0;
-       fadt->x_pm1b_cnt_blk.bit_offset = 0;
-       fadt->x_pm1b_cnt_blk.resv = 0;
-       fadt->x_pm1b_cnt_blk.addrl = 0x0;
-       fadt->x_pm1b_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm2_cnt_blk.space_id = 1;
-       fadt->x_pm2_cnt_blk.bit_width = 8;
-       fadt->x_pm2_cnt_blk.bit_offset = 0;
-       fadt->x_pm2_cnt_blk.resv = 0;
-       fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20;
-       fadt->x_pm2_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm_tmr_blk.space_id = 1;
-       fadt->x_pm_tmr_blk.bit_width = 32;
-       fadt->x_pm_tmr_blk.bit_offset = 0;
-       fadt->x_pm_tmr_blk.resv = 0;
-       fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
-       fadt->x_pm_tmr_blk.addrh = 0x0;
-
-       fadt->x_gpe0_blk.space_id = 1;
-       fadt->x_gpe0_blk.bit_width = 64;
-       fadt->x_gpe0_blk.bit_offset = 0;
-       fadt->x_gpe0_blk.resv = 0;
-       fadt->x_gpe0_blk.addrl = pmbase + 0x28;
-       fadt->x_gpe0_blk.addrh = 0x0;
-
-       fadt->x_gpe1_blk.space_id = 1;
-       fadt->x_gpe1_blk.bit_width = 0;
-       fadt->x_gpe1_blk.bit_offset = 0;
-       fadt->x_gpe1_blk.resv = 0;
-       fadt->x_gpe1_blk.addrl = 0x0;
-       fadt->x_gpe1_blk.addrh = 0x0;
+       fadt->reset_reg.space_id = 0;
+       fadt->reset_reg.bit_width = 0;
+       fadt->reset_reg.bit_offset = 0;
+       fadt->reset_reg.resv = 0;
+       fadt->reset_reg.addrl = 0x0;
+       fadt->reset_reg.addrh = 0x0;
+
+       fadt->reset_value = 0;
+       fadt->x_firmware_ctl_l = (unsigned long)facs;
+       fadt->x_firmware_ctl_h = 0;
+       fadt->x_dsdt_l = (unsigned long)dsdt;
+       fadt->x_dsdt_h = 0;
+
+       fadt->x_pm1a_evt_blk.space_id = 1;
+       fadt->x_pm1a_evt_blk.bit_width = 32;
+       fadt->x_pm1a_evt_blk.bit_offset = 0;
+       fadt->x_pm1a_evt_blk.resv = 0;
+       fadt->x_pm1a_evt_blk.addrl = pmbase;
+       fadt->x_pm1a_evt_blk.addrh = 0x0;
+
+       fadt->x_pm1b_evt_blk.space_id = 1;
+       fadt->x_pm1b_evt_blk.bit_width = 0;
+       fadt->x_pm1b_evt_blk.bit_offset = 0;
+       fadt->x_pm1b_evt_blk.resv = 0;
+       fadt->x_pm1b_evt_blk.addrl = 0x0;
+       fadt->x_pm1b_evt_blk.addrh = 0x0;
+
+       fadt->x_pm1a_cnt_blk.space_id = 1;
+       fadt->x_pm1a_cnt_blk.bit_width = 16;
+       fadt->x_pm1a_cnt_blk.bit_offset = 0;
+       fadt->x_pm1a_cnt_blk.resv = 0;
+       fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
+       fadt->x_pm1a_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm1b_cnt_blk.space_id = 1;
+       fadt->x_pm1b_cnt_blk.bit_width = 0;
+       fadt->x_pm1b_cnt_blk.bit_offset = 0;
+       fadt->x_pm1b_cnt_blk.resv = 0;
+       fadt->x_pm1b_cnt_blk.addrl = 0x0;
+       fadt->x_pm1b_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm2_cnt_blk.space_id = 1;
+       fadt->x_pm2_cnt_blk.bit_width = 8;
+       fadt->x_pm2_cnt_blk.bit_offset = 0;
+       fadt->x_pm2_cnt_blk.resv = 0;
+       fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20;
+       fadt->x_pm2_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm_tmr_blk.space_id = 1;
+       fadt->x_pm_tmr_blk.bit_width = 32;
+       fadt->x_pm_tmr_blk.bit_offset = 0;
+       fadt->x_pm_tmr_blk.resv = 0;
+       fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
+       fadt->x_pm_tmr_blk.addrh = 0x0;
+
+       fadt->x_gpe0_blk.space_id = 1;
+       fadt->x_gpe0_blk.bit_width = 64;
+       fadt->x_gpe0_blk.bit_offset = 0;
+       fadt->x_gpe0_blk.resv = 0;
+       fadt->x_gpe0_blk.addrl = pmbase + 0x28;
+       fadt->x_gpe0_blk.addrh = 0x0;
+
+       fadt->x_gpe1_blk.space_id = 1;
+       fadt->x_gpe1_blk.bit_width = 0;
+       fadt->x_gpe1_blk.bit_offset = 0;
+       fadt->x_gpe1_blk.resv = 0;
+       fadt->x_gpe1_blk.addrl = 0x0;
+       fadt->x_gpe1_blk.addrh = 0x0;
 
        header->checksum =
            acpi_checksum((void *) fadt, header->length);
index 86f4ba17a145c41e73c64d7b81803f3d18c43d9c..992c318cc0a7485a19ccd55979334e5323e54256 100644 (file)
@@ -23,6 +23,7 @@
 #include <string.h>
 #include <device/pci.h>
 #include <arch/acpi.h>
+#include <cpu/x86/smm.h>
 
 #define ACPI_PM1_STS        (pmbase + 0x00)
 #define ACPI_PM1_EN         (pmbase + 0x02)
@@ -67,12 +68,12 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->preferred_pm_profile = 7; /* Performance Server */
        fadt->sci_int = 0x9;
 #if CONFIG_HAVE_SMI_HANDLER == 1
-       fadt->smi_cmd = 0xb2;
+       fadt->smi_cmd = APM_CNT;
 #else
        fadt->smi_cmd = 0x00;
 #endif
-       fadt->acpi_enable = 0xe1;
-       fadt->acpi_disable = 0x1e;
+       fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
+       fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
        fadt->s4bios_req = 0x0;
        fadt->pstate_cnt = 0xe2;
 
index ae58bbfa6b516c320a3e66d81d80f7a7b2d8fde7..bc4a0d455fc9a50e8bd718cda07ea5d85929b4dc 100644 (file)
 #include <string.h>
 #include <device/pci.h>
 #include <arch/acpi.h>
-
-/* FIXME: This needs to go into a separate .h file
- * to be included by the ich7 smi handler, ich7 smi init
- * code and the mainboard fadt.
- */
-#define APM_CNT                0xb2
-#define   CST_CONTROL  0x85
-#define   PST_CONTROL  0x80
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-#define   GNVS_UPDATE   0xea
+#include <cpu/x86/smm.h>
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
@@ -54,10 +44,10 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 
        fadt->sci_int = 0x9;
        fadt->smi_cmd = APM_CNT;
-       fadt->acpi_enable = ACPI_ENABLE;
-       fadt->acpi_disable = ACPI_DISABLE;
+       fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
+       fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
        fadt->s4bios_req = 0x0;
-       fadt->pstate_cnt = PST_CONTROL;
+       fadt->pstate_cnt = APM_CNT_PST_CONTROL;
 
        fadt->pm1a_evt_blk = pmbase;
        fadt->pm1b_evt_blk = 0x0;
@@ -76,7 +66,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->gpe0_blk_len = 8;
        fadt->gpe1_blk_len = 0;
        fadt->gpe1_base = 0;
-       fadt->cst_cnt = CST_CONTROL;
+       fadt->cst_cnt = APM_CNT_CST_CONTROL;
        fadt->p_lvl2_lat = 1;
        fadt->p_lvl3_lat = 85;
        fadt->flush_size = 1024;
index 12aeac062e2cd23edc5826120b7554bf5af959b3..f945d3f5b172f1667e816b55b2678c8e77ee47c1 100644 (file)
 #include <string.h>
 #include <device/pci.h>
 #include <arch/acpi.h>
-
-/* FIXME: This needs to go into a separate .h file
- * to be included by the ich7 smi handler, ich7 smi init
- * code and the mainboard fadt.
- */
-#define APM_CNT                0xb2
-#define   CST_CONTROL  0x85
-#define   PST_CONTROL  0x80
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-#define   GNVS_UPDATE   0xea
+#include <cpu/x86/smm.h>
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
@@ -39,8 +29,8 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 
        memset((void *) fadt, 0, sizeof(acpi_fadt_t));
        memcpy(header->signature, "FACP", 4);
-       header->length = sizeof(acpi_fadt_t);
-       header->revision = 3;
+       header->length = sizeof(acpi_fadt_t);
+       header->revision = 3;
        memcpy(header->oem_id, "CORE  ", 6);
        memcpy(header->oem_table_id, "COREBOOT", 8);
        memcpy(header->asl_compiler_id, "CORE", 4);
@@ -51,12 +41,12 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->model = 1;
        fadt->preferred_pm_profile = PM_MOBILE;
 
-       fadt->sci_int = 0x9;
-       fadt->smi_cmd = APM_CNT;
-       fadt->acpi_enable = ACPI_ENABLE;
-       fadt->acpi_disable = ACPI_DISABLE;
-       fadt->s4bios_req = 0x0;
-       fadt->pstate_cnt = PST_CONTROL;
+       fadt->sci_int = 0x9;
+       fadt->smi_cmd = APM_CNT;
+       fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
+       fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
+       fadt->s4bios_req = 0x0;
+       fadt->pstate_cnt = APM_CNT_PST_CONTROL;
 
        fadt->pm1a_evt_blk = pmbase;
        fadt->pm1b_evt_blk = 0x0;
@@ -75,7 +65,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->gpe0_blk_len = 8;
        fadt->gpe1_blk_len = 0;
        fadt->gpe1_base = 0;
-       fadt->cst_cnt = CST_CONTROL;
+       fadt->cst_cnt = APM_CNT_CST_CONTROL;
        fadt->p_lvl2_lat = 1;
        fadt->p_lvl3_lat = 85;
        fadt->flush_size = 1024;
@@ -87,79 +77,79 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->century = 0x00;
        fadt->iapc_boot_arch = 0x03;
 
-       fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
+       fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
                        ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
                        ACPI_FADT_RESET_REGISTER |
                        ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
 
-       fadt->reset_reg.space_id = 1;
-       fadt->reset_reg.bit_width = 8;
-       fadt->reset_reg.bit_offset = 0;
-       fadt->reset_reg.resv = 0;
-       fadt->reset_reg.addrl = 0xcf9;
-       fadt->reset_reg.addrh = 0;
-
-       fadt->reset_value = 6;
-       fadt->x_firmware_ctl_l = (unsigned long)facs;
-       fadt->x_firmware_ctl_h = 0;
-       fadt->x_dsdt_l = (unsigned long)dsdt;
-       fadt->x_dsdt_h = 0;
-
-       fadt->x_pm1a_evt_blk.space_id = 1;
-       fadt->x_pm1a_evt_blk.bit_width = 32;
-       fadt->x_pm1a_evt_blk.bit_offset = 0;
-       fadt->x_pm1a_evt_blk.resv = 0;
-       fadt->x_pm1a_evt_blk.addrl = pmbase;
-       fadt->x_pm1a_evt_blk.addrh = 0x0;
-
-       fadt->x_pm1b_evt_blk.space_id = 1;
-       fadt->x_pm1b_evt_blk.bit_width = 0;
-       fadt->x_pm1b_evt_blk.bit_offset = 0;
-       fadt->x_pm1b_evt_blk.resv = 0;
-       fadt->x_pm1b_evt_blk.addrl = 0x0;
-       fadt->x_pm1b_evt_blk.addrh = 0x0;
-
-       fadt->x_pm1a_cnt_blk.space_id = 1;
-       fadt->x_pm1a_cnt_blk.bit_width = 16;
-       fadt->x_pm1a_cnt_blk.bit_offset = 0;
-       fadt->x_pm1a_cnt_blk.resv = 0;
-       fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
-       fadt->x_pm1a_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm1b_cnt_blk.space_id = 1;
-       fadt->x_pm1b_cnt_blk.bit_width = 0;
-       fadt->x_pm1b_cnt_blk.bit_offset = 0;
-       fadt->x_pm1b_cnt_blk.resv = 0;
-       fadt->x_pm1b_cnt_blk.addrl = 0x0;
-       fadt->x_pm1b_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm2_cnt_blk.space_id = 1;
-       fadt->x_pm2_cnt_blk.bit_width = 8;
-       fadt->x_pm2_cnt_blk.bit_offset = 0;
-       fadt->x_pm2_cnt_blk.resv = 0;
-       fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20;
-       fadt->x_pm2_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm_tmr_blk.space_id = 1;
-       fadt->x_pm_tmr_blk.bit_width = 32;
-       fadt->x_pm_tmr_blk.bit_offset = 0;
-       fadt->x_pm_tmr_blk.resv = 0;
-       fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
-       fadt->x_pm_tmr_blk.addrh = 0x0;
-
-       fadt->x_gpe0_blk.space_id = 1;
-       fadt->x_gpe0_blk.bit_width = 64;
-       fadt->x_gpe0_blk.bit_offset = 0;
-       fadt->x_gpe0_blk.resv = 0;
-       fadt->x_gpe0_blk.addrl = pmbase + 0x28;
-       fadt->x_gpe0_blk.addrh = 0x0;
-
-       fadt->x_gpe1_blk.space_id = 1;
-       fadt->x_gpe1_blk.bit_width = 0;
-       fadt->x_gpe1_blk.bit_offset = 0;
-       fadt->x_gpe1_blk.resv = 0;
-       fadt->x_gpe1_blk.addrl = 0x0;
-       fadt->x_gpe1_blk.addrh = 0x0;
+       fadt->reset_reg.space_id = 1;
+       fadt->reset_reg.bit_width = 8;
+       fadt->reset_reg.bit_offset = 0;
+       fadt->reset_reg.resv = 0;
+       fadt->reset_reg.addrl = 0xcf9;
+       fadt->reset_reg.addrh = 0;
+
+       fadt->reset_value = 6;
+       fadt->x_firmware_ctl_l = (unsigned long)facs;
+       fadt->x_firmware_ctl_h = 0;
+       fadt->x_dsdt_l = (unsigned long)dsdt;
+       fadt->x_dsdt_h = 0;
+
+       fadt->x_pm1a_evt_blk.space_id = 1;
+       fadt->x_pm1a_evt_blk.bit_width = 32;
+       fadt->x_pm1a_evt_blk.bit_offset = 0;
+       fadt->x_pm1a_evt_blk.resv = 0;
+       fadt->x_pm1a_evt_blk.addrl = pmbase;
+       fadt->x_pm1a_evt_blk.addrh = 0x0;
+
+       fadt->x_pm1b_evt_blk.space_id = 1;
+       fadt->x_pm1b_evt_blk.bit_width = 0;
+       fadt->x_pm1b_evt_blk.bit_offset = 0;
+       fadt->x_pm1b_evt_blk.resv = 0;
+       fadt->x_pm1b_evt_blk.addrl = 0x0;
+       fadt->x_pm1b_evt_blk.addrh = 0x0;
+
+       fadt->x_pm1a_cnt_blk.space_id = 1;
+       fadt->x_pm1a_cnt_blk.bit_width = 16;
+       fadt->x_pm1a_cnt_blk.bit_offset = 0;
+       fadt->x_pm1a_cnt_blk.resv = 0;
+       fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
+       fadt->x_pm1a_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm1b_cnt_blk.space_id = 1;
+       fadt->x_pm1b_cnt_blk.bit_width = 0;
+       fadt->x_pm1b_cnt_blk.bit_offset = 0;
+       fadt->x_pm1b_cnt_blk.resv = 0;
+       fadt->x_pm1b_cnt_blk.addrl = 0x0;
+       fadt->x_pm1b_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm2_cnt_blk.space_id = 1;
+       fadt->x_pm2_cnt_blk.bit_width = 8;
+       fadt->x_pm2_cnt_blk.bit_offset = 0;
+       fadt->x_pm2_cnt_blk.resv = 0;
+       fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20;
+       fadt->x_pm2_cnt_blk.addrh = 0x0;
+
+       fadt->x_pm_tmr_blk.space_id = 1;
+       fadt->x_pm_tmr_blk.bit_width = 32;
+       fadt->x_pm_tmr_blk.bit_offset = 0;
+       fadt->x_pm_tmr_blk.resv = 0;
+       fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
+       fadt->x_pm_tmr_blk.addrh = 0x0;
+
+       fadt->x_gpe0_blk.space_id = 1;
+       fadt->x_gpe0_blk.bit_width = 64;
+       fadt->x_gpe0_blk.bit_offset = 0;
+       fadt->x_gpe0_blk.resv = 0;
+       fadt->x_gpe0_blk.addrl = pmbase + 0x28;
+       fadt->x_gpe0_blk.addrh = 0x0;
+
+       fadt->x_gpe1_blk.space_id = 1;
+       fadt->x_gpe1_blk.bit_width = 0;
+       fadt->x_gpe1_blk.bit_offset = 0;
+       fadt->x_gpe1_blk.resv = 0;
+       fadt->x_gpe1_blk.addrl = 0x0;
+       fadt->x_gpe1_blk.addrh = 0x0;
 
        header->checksum =
            acpi_checksum((void *) fadt, header->length);
index e45db8a35120e782fe26296df8ad74e651e8a6ca..9f73f9cb4b075afdfe80487f6dce8b6053f0f4ad 100644 (file)
 #include <string.h>
 #include <device/pci.h>
 #include <arch/acpi.h>
+#include <cpu/x86/smm.h>
 
 /* FIXME: This needs to go into a separate .h file
  * to be included by the ich7 smi handler, ich7 smi init
  * code and the mainboard fadt.
  */
-#define APM_CNT                0xb2
-#define   CST_CONTROL  0x85
-#define   PST_CONTROL  0x80
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-#define   GNVS_UPDATE   0xea
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
@@ -54,10 +49,10 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->preferred_pm_profile = PM_MOBILE;
        fadt->sci_int = 0x9;
        fadt->smi_cmd = APM_CNT;
-       fadt->acpi_enable = ACPI_ENABLE;
-       fadt->acpi_disable = ACPI_DISABLE;
+       fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
+       fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
        fadt->s4bios_req = 0x0;
-       fadt->pstate_cnt = PST_CONTROL;
+       fadt->pstate_cnt = APM_CNT_PST_CONTROL;
 
        fadt->pm1a_evt_blk = pmbase;
        fadt->pm1b_evt_blk = 0x0;
@@ -75,7 +70,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->gpe0_blk_len = 8;
        fadt->gpe1_blk_len = 0;
        fadt->gpe1_base = 0;
-       fadt->cst_cnt = CST_CONTROL;
+       fadt->cst_cnt = APM_CNT_CST_CONTROL;
        fadt->p_lvl2_lat = 1;
        fadt->p_lvl3_lat = 0x23;
        fadt->flush_size = 0;
index e45db8a35120e782fe26296df8ad74e651e8a6ca..9f73f9cb4b075afdfe80487f6dce8b6053f0f4ad 100644 (file)
 #include <string.h>
 #include <device/pci.h>
 #include <arch/acpi.h>
+#include <cpu/x86/smm.h>
 
 /* FIXME: This needs to go into a separate .h file
  * to be included by the ich7 smi handler, ich7 smi init
  * code and the mainboard fadt.
  */
-#define APM_CNT                0xb2
-#define   CST_CONTROL  0x85
-#define   PST_CONTROL  0x80
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-#define   GNVS_UPDATE   0xea
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
@@ -54,10 +49,10 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->preferred_pm_profile = PM_MOBILE;
        fadt->sci_int = 0x9;
        fadt->smi_cmd = APM_CNT;
-       fadt->acpi_enable = ACPI_ENABLE;
-       fadt->acpi_disable = ACPI_DISABLE;
+       fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
+       fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
        fadt->s4bios_req = 0x0;
-       fadt->pstate_cnt = PST_CONTROL;
+       fadt->pstate_cnt = APM_CNT_PST_CONTROL;
 
        fadt->pm1a_evt_blk = pmbase;
        fadt->pm1b_evt_blk = 0x0;
@@ -75,7 +70,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->gpe0_blk_len = 8;
        fadt->gpe1_blk_len = 0;
        fadt->gpe1_base = 0;
-       fadt->cst_cnt = CST_CONTROL;
+       fadt->cst_cnt = APM_CNT_CST_CONTROL;
        fadt->p_lvl2_lat = 1;
        fadt->p_lvl3_lat = 0x23;
        fadt->flush_size = 0;
index 5e0f6a98b009fbd16cb599679c8bd2f3618e7b42..78f7f2a4f62ec4b9e466dc4b90d664b245a3adf5 100644 (file)
@@ -75,4 +75,3 @@ int mainboard_io_trap_handler(int smif)
         * On failure, the IO Trap Handler returns a value != 0 */
        return 0;
 }
-
index e45db8a35120e782fe26296df8ad74e651e8a6ca..b07856a019074435247d40d2d96ff7a30e814b8f 100644 (file)
 #include <string.h>
 #include <device/pci.h>
 #include <arch/acpi.h>
-
-/* FIXME: This needs to go into a separate .h file
- * to be included by the ich7 smi handler, ich7 smi init
- * code and the mainboard fadt.
- */
-#define APM_CNT                0xb2
-#define   CST_CONTROL  0x85
-#define   PST_CONTROL  0x80
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-#define   GNVS_UPDATE   0xea
+#include <cpu/x86/smm.h>
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
@@ -54,10 +44,10 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->preferred_pm_profile = PM_MOBILE;
        fadt->sci_int = 0x9;
        fadt->smi_cmd = APM_CNT;
-       fadt->acpi_enable = ACPI_ENABLE;
-       fadt->acpi_disable = ACPI_DISABLE;
+       fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
+       fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
        fadt->s4bios_req = 0x0;
-       fadt->pstate_cnt = PST_CONTROL;
+       fadt->pstate_cnt = APM_CNT_PST_CONTROL;
 
        fadt->pm1a_evt_blk = pmbase;
        fadt->pm1b_evt_blk = 0x0;
@@ -75,7 +65,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
        fadt->gpe0_blk_len = 8;
        fadt->gpe1_blk_len = 0;
        fadt->gpe1_base = 0;
-       fadt->cst_cnt = CST_CONTROL;
+       fadt->cst_cnt = APM_CNT_CST_CONTROL;
        fadt->p_lvl2_lat = 1;
        fadt->p_lvl3_lat = 0x23;
        fadt->flush_size = 0;
index 4875ba74801023230b4a35597dd2c40feee91f50..1d306da280f656a62f4c92ad311603c32c42289c 100644 (file)
 
 #define DEBUG_SMI
 
-#define APM_CNT                0xb2
-#define   CST_CONTROL  0x85
-#define   PST_CONTROL  0x80
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-#define   GNVS_UPDATE   0xea
-#define   MBI_UPDATE    0xeb
-#define APM_STS                0xb3
-
 /* I830M */
 #define SMRAM          0x90
 #define   D_OPEN       (1 << 6)
@@ -370,33 +361,33 @@ static void southbridge_smi_apmc(unsigned int node, smm_state_save_area_t *state
 
        reg8 = inb(APM_CNT);
        switch (reg8) {
-       case CST_CONTROL:
+       case APM_CNT_CST_CONTROL:
                /* Calling this function seems to cause
                 * some kind of race condition in Linux
                 * and causes a kernel oops
                 */
                printk(BIOS_DEBUG, "C-state control\n");
                break;
-       case PST_CONTROL:
+       case APM_CNT_PST_CONTROL:
                /* Calling this function seems to cause
                 * some kind of race condition in Linux
                 * and causes a kernel oops
                 */
                printk(BIOS_DEBUG, "P-state control\n");
                break;
-       case ACPI_DISABLE:
+       case APM_CNT_ACPI_DISABLE:
                pmctrl = inl(pmbase + PM1_CNT);
                pmctrl &= ~SCI_EN;
                outl(pmctrl, pmbase + PM1_CNT);
                printk(BIOS_DEBUG, "SMI#: ACPI disabled.\n");
                break;
-       case ACPI_ENABLE:
+       case APM_CNT_ACPI_ENABLE:
                pmctrl = inl(pmbase + PM1_CNT);
                pmctrl |= SCI_EN;
                outl(pmctrl, pmbase + PM1_CNT);
                printk(BIOS_DEBUG, "SMI#: ACPI enabled.\n");
                break;
-       case GNVS_UPDATE:
+       case APM_CNT_GNVS_UPDATE:
                if (smm_initialized) {
                        printk(BIOS_DEBUG, "SMI#: SMM structures already initialized!\n");
                        return;
@@ -407,7 +398,7 @@ static void southbridge_smi_apmc(unsigned int node, smm_state_save_area_t *state
                smm_initialized = 1;
                printk(BIOS_DEBUG, "SMI#: Setting up structures to %p, %p, %p\n", gnvs, tcg, smi1);
                break;
-       case MBI_UPDATE: // FIXME
+       case APM_CNT_MBI_UPDATE: // FIXME
                if (mbi_initialized) {
                        printk(BIOS_DEBUG, "SMI#: mbi already registered!\n");
                        return;
index 7feb76a5fb68f25808e55e401617fafd28eddac0..394f161f95e3d824fc75417718e461edc75dbce8 100644 (file)
@@ -29,6 +29,7 @@
 #include <arch/ioapic.h>
 #include <cpu/cpu.h>
 #include "i82801gx.h"
+#include <cpu/x86/smm.h>
 
 #define NMI_OFF        0
 
@@ -341,13 +342,13 @@ static void i82801gx_lock_smm(struct device *dev)
 #endif
 
 #if ENABLE_ACPI_MODE_IN_COREBOOT
-       printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
-       outb(0xe1, 0xb2); // Enable ACPI mode
-       printk(BIOS_DEBUG, "done.\n");
+               printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
+               outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode
+               printk(BIOS_DEBUG, "done.\n");
 #else
-       printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
-       outb(0x1e, 0xb2); // Disable ACPI mode
-       printk(BIOS_DEBUG, "done.\n");
+               printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
+               outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode
+               printk(BIOS_DEBUG, "done.\n");
 #endif
        /* Don't allow evil boot loaders, kernels, or
         * userspace applications to deceive us:
index bccf6d5f0566dbe67b089ed05a34f036a640830d..9befbf9ac18b3497fd3d3c5a3ada174f663bb881 100644 (file)
 #include <device/pci_def.h>
 #include "i82801gx.h"
 
-#define APM_CNT                0xb2
-#define   CST_CONTROL  0x85
-#define   PST_CONTROL  0x80
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-#define   GNVS_UPDATE   0xea
-#define APM_STS                0xb3
-
 /* I945 */
 #define SMRAM          0x9d
 #define   D_OPEN       (1 << 6)
@@ -366,33 +358,33 @@ static void southbridge_smi_apmc(unsigned int node, smm_state_save_area_t *state
                return;
 
        switch (reg8) {
-       case CST_CONTROL:
+       case APM_CNT_CST_CONTROL:
                /* Calling this function seems to cause
                 * some kind of race condition in Linux
                 * and causes a kernel oops
                 */
                printk(BIOS_DEBUG, "C-state control\n");
                break;
-       case PST_CONTROL:
+       case APM_CNT_PST_CONTROL:
                /* Calling this function seems to cause
                 * some kind of race condition in Linux
                 * and causes a kernel oops
                 */
                printk(BIOS_DEBUG, "P-state control\n");
                break;
-       case ACPI_DISABLE:
+       case APM_CNT_ACPI_DISABLE:
                pmctrl = inl(pmbase + PM1_CNT);
                pmctrl &= ~SCI_EN;
                outl(pmctrl, pmbase + PM1_CNT);
                printk(BIOS_DEBUG, "SMI#: ACPI disabled.\n");
                break;
-       case ACPI_ENABLE:
+       case APM_CNT_ACPI_ENABLE:
                pmctrl = inl(pmbase + PM1_CNT);
                pmctrl |= SCI_EN;
                outl(pmctrl, pmbase + PM1_CNT);
                printk(BIOS_DEBUG, "SMI#: ACPI enabled.\n");
                break;
-       case GNVS_UPDATE:
+       case APM_CNT_GNVS_UPDATE:
                if (smm_initialized) {
                        printk(BIOS_DEBUG, "SMI#: SMM structures already initialized!\n");
                        return;
index 127f62772a15a651ef45193834283798046bcbd3..99ae01877031d29d3653c370401a532394737c51 100644 (file)
 
 #define DEBUG_SMI
 
-#define APM_CNT                0xb2
-#define APM_STS                0xb3
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-
 /* I945 */
 #define SMRAM          0x9d
 #define   D_OPEN       (1 << 6)
index 0c8ff2f7c78b723ea70b1249c72e5febeb8d0d2e..357e517994c0b08402c1cb41d257eb0923be1555 100644 (file)
 #include <device/pci_def.h>
 #include "vt8237r.h"
 
-#define APM_CNT                0xb2
-#define   CST_CONTROL  0x85
-#define   PST_CONTROL  0x80
-#define   ACPI_DISABLE 0x1e
-#define   ACPI_ENABLE  0xe1
-#define   GNVS_UPDATE   0xea
-#define APM_STS                0xb3
-
 #include "nvs.h"
 
 /* While we read PMBASE dynamically in case it changed, let's
@@ -158,33 +150,33 @@ static void southbridge_smi_cmd(unsigned int node, smm_state_save_area_t *state_
 
        reg8 = inb(pmbase + 0x2f);
        switch (reg8) {
-       case CST_CONTROL:
+       case APM_CNT_CST_CONTROL:
                /* Calling this function seems to cause
                 * some kind of race condition in Linux
                 * and causes a kernel oops
                 */
                printk(BIOS_DEBUG, "C-state control\n");
                break;
-       case PST_CONTROL:
+       case APM_CNT_PST_CONTROL:
                /* Calling this function seems to cause
                 * some kind of race condition in Linux
                 * and causes a kernel oops
                 */
                printk(BIOS_DEBUG, "P-state control\n");
                break;
-       case ACPI_DISABLE:
+       case APM_CNT_ACPI_DISABLE:
                pmctrl = inw(pmbase + PM1_CNT);
                pmctrl &= ~SCI_EN;
                outw(pmctrl, pmbase + PM1_CNT);
                printk(BIOS_DEBUG, "SMI#: ACPI disabled.\n");
                break;
-       case ACPI_ENABLE:
+       case APM_CNT_ACPI_ENABLE:
                pmctrl = inw(pmbase + PM1_CNT);
                pmctrl |= SCI_EN;
                outw(pmctrl, pmbase + PM1_CNT);
                printk(BIOS_DEBUG, "SMI#: ACPI enabled.\n");
                break;
-       case GNVS_UPDATE:
+       case APM_CNT_GNVS_UPDATE:
                if (smm_initialized) {
                        printk(BIOS_DEBUG, "SMI#: SMM structures already initialized!\n");
                        return;