Stefan Reinauer [Mon, 18 Apr 2011 23:51:12 +0000 (23:51 +0000)]
* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that value
to unify calls to *_enable_usbdebug()
* rename *_enable_usbdebug() to enable_usbdebug()
* move enable_usbdebug() to generic romstage console init code
and drop it from the individual romstage.c files.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6513
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Mon, 18 Apr 2011 02:26:56 +0000 (02:26 +0000)]
fix copy and paste errors in ne2k.c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6512
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 18 Apr 2011 02:07:16 +0000 (02:07 +0000)]
Emit unwritten symbols in Kconfig so we don't have to do constructs like
#if defined(CONFIG_FOO) && CONFIG_FOO anymore. This was partially implemented
but didn't work for symbols that were unset because of a missing dependency.
Patch taken from SeaBIOS.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6511
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Sun, 17 Apr 2011 14:55:21 +0000 (14:55 +0000)]
Lenovo H8 EC: add missing systemstatus.asl include
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6510
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Sun, 17 Apr 2011 12:54:32 +0000 (12:54 +0000)]
PMH7: Add dock event control
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6509
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sat, 16 Apr 2011 00:13:17 +0000 (00:13 +0000)]
Allow libpayload to use an OXPCIe 952 card on systems without
onboard serial port
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6508
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sat, 16 Apr 2011 00:09:53 +0000 (00:09 +0000)]
bootblock updates:
- allow CPU to define bootblock code, too.
- drop unneeded __PRE_RAM__ define
- move CBFS specific code out of bootblock_common.h into cbfs.h
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6507
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 15 Apr 2011 09:01:42 +0000 (09:01 +0000)]
sorry for breaking the tree.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6506
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 15 Apr 2011 04:12:03 +0000 (04:12 +0000)]
comment cosmetics in bootblock.ld
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6505
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 15 Apr 2011 03:34:05 +0000 (03:34 +0000)]
add FILO easy payload option
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6504
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 15 Apr 2011 03:30:03 +0000 (03:30 +0000)]
Handle drivers/ equally to any other sub directory.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6503
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 15 Apr 2011 00:19:27 +0000 (00:19 +0000)]
fix mainboards that were including earlymtrr.c without actually using it.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6502
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 14 Apr 2011 22:28:00 +0000 (22:28 +0000)]
drop half an uart8250 implementation from smiutil and use the common code
for that instead. This also allows using non-uart8250 consoles for smi
debugging.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6501
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 14 Apr 2011 21:05:41 +0000 (21:05 +0000)]
fix coreboot compilation without serial console enabled.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6500
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 14 Apr 2011 20:39:49 +0000 (20:39 +0000)]
earlymtrr.c: wipe some dead code, use names instead of numbers and some
cosmetics.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6499
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 14 Apr 2011 20:33:53 +0000 (20:33 +0000)]
add some comments to walkcbfs.S
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6498
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 14 Apr 2011 20:30:21 +0000 (20:30 +0000)]
- drop remaining CONFIG_ROM_IMAGE_SIZE
- re-enable .data section check for bootblock.
- rename ldscript_fallback_cbfs.lb to bootblock.ld
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6497
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 14 Apr 2011 20:21:49 +0000 (20:21 +0000)]
drop incorrectly used CONFIG_ROM_IMAGE_SIZE and unused CONFIG_ARCH
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6496
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 14 Apr 2011 20:11:34 +0000 (20:11 +0000)]
nvidia mcp55: drop unused dbg_info
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6495
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 14 Apr 2011 20:10:27 +0000 (20:10 +0000)]
cosmetic cleanup of sis966 usb2 code
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6494
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 14 Apr 2011 20:06:30 +0000 (20:06 +0000)]
Use symbolic names for some MTRR bits instead of numbers in CAR code
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6493
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 14 Apr 2011 19:52:04 +0000 (19:52 +0000)]
coding style cosmetics.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6492
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Wed, 13 Apr 2011 09:23:45 +0000 (09:23 +0000)]
Lenovo H8 EC: add missing include for thermal.asl
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6491
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Tue, 12 Apr 2011 18:18:24 +0000 (18:18 +0000)]
Lenovo H8 EC: Set fancontrol to Automatic management
My Notebook gets far to hot without fan, so just enable automatic
fan control by default.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6490
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Tue, 12 Apr 2011 18:18:12 +0000 (18:18 +0000)]
PC87384: add GPIO defines
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6489
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Tue, 12 Apr 2011 01:12:46 +0000 (01:12 +0000)]
Use TOM2 for highest sysmem setting for northbound memory routing (DMA). This fixes 4GB memory issues.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Kerry she <kerry.she@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6488
2b7e53f0-3cfb-0310-b3e9-
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Alexandru Gagniuc [Mon, 11 Apr 2011 20:17:22 +0000 (20:17 +0000)]
Unify use of post_code
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6487
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Mon, 11 Apr 2011 19:43:50 +0000 (19:43 +0000)]
PMH7: Add chip config
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6486
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Mon, 11 Apr 2011 19:43:32 +0000 (19:43 +0000)]
EC: Add Lenovo H8
Move the EC support code from the X60 mainboard to a generic
driver, as this EC is used in many thinkpads. Also move the
ACPI code to this directory for this reason.
This patch also adds a chip config, so that the initial setting
for basic register can be specified in devicetree.cb
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6485
2b7e53f0-3cfb-0310-b3e9-
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Ruud Schramp [Mon, 11 Apr 2011 07:46:27 +0000 (07:46 +0000)]
Add detection/dump support for ServerEngines SE-SM 4210-P01.
Note that the registers and their defaults are mostly based on educated
guessing, due to the lack of datasheet.
Signed-off-by: Ruud Schramp <schramp@holmes.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6484
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Sun, 10 Apr 2011 07:41:56 +0000 (07:41 +0000)]
i945: improve get_top_of_ram()
The current version doesn't honor TSEG, and fails to
report the correct top of RAM if IGD is disabled. This
is because it uses the BSM (base of stolen RAM) register.
In that case, we should use the TOLUD register.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6483
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 10 Apr 2011 04:15:23 +0000 (04:15 +0000)]
In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__.
http://www.coreboot.org/pipermail/coreboot/2007-September/024665.html
It's about time we follow this advice.
Also move some manually set __PRE_RAM__ defines (ap_romstage.c) to the Makefile and
drop unused CPP define
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6482
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Tue, 5 Apr 2011 13:00:33 +0000 (13:00 +0000)]
X60: use pnp_write_config() instead of custom function
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6481
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Tue, 5 Apr 2011 13:00:14 +0000 (13:00 +0000)]
X60: move ec version info code to log_ec_version()
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6480
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Mon, 4 Apr 2011 15:19:59 +0000 (15:19 +0000)]
X60: assert audio mute before entering Suspend
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6479
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Mon, 4 Apr 2011 12:33:54 +0000 (12:33 +0000)]
X60: log firmware version
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6478
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Mon, 4 Apr 2011 10:57:17 +0000 (10:57 +0000)]
X60: blink suspend LED during resume
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6477
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Mon, 4 Apr 2011 10:57:06 +0000 (10:57 +0000)]
X60: we have ACPI_RESUME
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6476
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Mon, 4 Apr 2011 10:56:52 +0000 (10:56 +0000)]
X60: deassert audio mute on boot
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6475
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Fri, 1 Apr 2011 07:41:47 +0000 (07:41 +0000)]
remove swp files accidently added
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6474
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Fri, 1 Apr 2011 07:28:56 +0000 (07:28 +0000)]
X60: add dock code for Ultrabase X6
Move the old docking code from romstage.c to dock.c, and use that code
both in romstage and SMM code.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6473
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Fri, 1 Apr 2011 07:28:50 +0000 (07:28 +0000)]
Add GPIO definitions to PC87392 superio
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6472
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Fri, 1 Apr 2011 07:28:35 +0000 (07:28 +0000)]
ICH7: Fix register naming error
There's an off-by-one error in the ACPI GP_LVL declaration:
it declares GL00 with a bit count of 6, and continues with GP07
afterwards. This should be GP06, as the first bitfield covers
GP00-GP05.
While at it, change it to GP00-GP05, as right now GL00 isn't used,
and single bitfield are more usable here.
Also adjust the Getac P470, as this is the only user of those defintions
right now.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6471
2b7e53f0-3cfb-0310-b3e9-
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Yang Hamo Bai [Fri, 1 Apr 2011 00:39:07 +0000 (00:39 +0000)]
Add build instructions for coreinfo, specially pointing out installing
gcc-multilib on a 64bit system.
Signed-off-by: Yang Hamo Bai <hamo.by@gmail.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6470
2b7e53f0-3cfb-0310-b3e9-
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Nils Jacobs [Tue, 29 Mar 2011 19:29:01 +0000 (19:29 +0000)]
Update repo path in libpayload readme.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6469
2b7e53f0-3cfb-0310-b3e9-
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Prakash Punnoor [Tue, 29 Mar 2011 12:02:03 +0000 (12:02 +0000)]
Revert r6460, add full W83627DHG-P/-PT support instead.
Add support for detecting/dumping the registers of Nuvoton W83627DHG-P/-PT.
This is a different chip than the Winbond W83627DHG (different IDs).
Signed-off-by: Prakash Punnoor <prakash@punnoor.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6468
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Tue, 29 Mar 2011 09:01:10 +0000 (09:01 +0000)]
BUILD: add missing config.h dependency
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6467
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Mon, 28 Mar 2011 04:38:14 +0000 (04:38 +0000)]
Add support for Supermicro H8scm.
It is AMD C32 + SR5650 + SP5100.
It is created by svn copy amd/tilapia_fam10.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6466
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Mon, 28 Mar 2011 04:36:21 +0000 (04:36 +0000)]
Add the SR5650 & SP5100 to the Kconfig and Makefile.inc
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6465
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Mon, 28 Mar 2011 04:29:14 +0000 (04:29 +0000)]
Add AMD C32 support.
It is based on other existing Fam10 code.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6464
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Mon, 28 Mar 2011 03:33:10 +0000 (03:33 +0000)]
SP5100's code is based on SB700. Change the legacy sb700 of sb7xx_51xx.
Since the SB700 has changed to sb7xx_51xx, change legacy name in
other mainboard.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6463
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Zheng Bao [Sun, 27 Mar 2011 16:39:58 +0000 (16:39 +0000)]
Add AMD SR56x0 support.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6462
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Zheng Bao [Sun, 27 Mar 2011 16:33:09 +0000 (16:33 +0000)]
This is for board Supermicro H8scm. The code was done by existing chips and
superiotool.
WPCM450 is more like an EC. SuperIO is just a part of multi-features.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6461
2b7e53f0-3cfb-0310-b3e9-
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Prakash Punnoor [Fri, 25 Mar 2011 16:54:38 +0000 (16:54 +0000)]
I noticed some registers of Winbond W83627DHG, which the datasheet mentions, were not dumped by superiotool. This patch adds those registers to the dump.
Signed-off-by: Prakash Punnoor <prakash@punnoor.de>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6460
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Tue, 22 Mar 2011 13:40:09 +0000 (13:40 +0000)]
libpayload: Fix documentation
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6459
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Mon, 21 Mar 2011 14:43:21 +0000 (14:43 +0000)]
X60: Add notification for LID objects
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6458
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Mon, 21 Mar 2011 14:43:09 +0000 (14:43 +0000)]
X60: remove beep call from _Q26/_Q27
no need to trigger sound, the EC takes care of generating the annoying
AC state beep if enabled in the sound mask.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6457
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Sun, 20 Mar 2011 19:34:05 +0000 (19:34 +0000)]
BUILD: add -MMD to iasl cpp call
Right now there are no dependency rules for compiling dsdt.asl.
If ACPI code includes asl files, the dsdt isn't recompiled if any
of those file is changed. Add the flags to the preprocessor call
to have it generate the neccessary dependency rule.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6456
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Fri, 18 Mar 2011 22:53:38 +0000 (22:53 +0000)]
oops, one URL fix was missing. Add new DirectHW URL
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6455
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Fri, 18 Mar 2011 22:08:39 +0000 (22:08 +0000)]
DirectHW fixes for coreboot utilities
See http://www.coreboot.org/DirectHW for more information
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6454
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Marc Jones [Thu, 17 Mar 2011 23:14:24 +0000 (23:14 +0000)]
Fix breaking the build after removing files in tthe previous checkin.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6453
2b7e53f0-3cfb-0310-b3e9-
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Frank.Vibrans [Thu, 17 Mar 2011 22:19:45 +0000 (22:19 +0000)]
Perform cleanup and file shrinkage of the AMD AGESA code.
Signed-off-by: Frank.Vibrans <frank.vibrans@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6452
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Josef Kellermann [Thu, 17 Mar 2011 12:34:15 +0000 (12:34 +0000)]
Fix power_on_after_fail handling on AMD SB600
Bit 0 of pm reg#74 have to be set turn on system after power resumes.
See '42661_sb600_rrg_nda_3.02.pdf' (or '46155_sb600_rrg_pub_3.03.pdf')
for details, look for 'PwrFailShadow'.
[Patrick: I didn't include the get_options reorganization as get_option
doesn't overwrite "on" if power_on_after_fail isn't found in CMOS.
Style changes were also left out.]
Signed-off-by: Josef Kellermann <seppk@arcor.de>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6451
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Thu, 17 Mar 2011 12:20:04 +0000 (12:20 +0000)]
libpayload: fix string-to-numeric functions for base > 10
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6450
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Thu, 17 Mar 2011 07:47:49 +0000 (07:47 +0000)]
More complete control over KERNELVERSION variable
Allow using revision information (from svn or git) even if the version
number is changed on the command line (eg. make KERNELVERSION='11.03$(REV)')
or dropping it entirely if having that information in the coreboot binary is
not desired.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6449
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Tue, 15 Mar 2011 09:52:17 +0000 (09:52 +0000)]
X60: Clear EC events when wake GPE is triggered
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6448
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Tue, 15 Mar 2011 09:52:07 +0000 (09:52 +0000)]
ACPI EC: add ec_query function
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6447
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Mon, 14 Mar 2011 15:23:44 +0000 (15:23 +0000)]
X60: LPC bus is LPCB, not LPC
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6446
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Mon, 14 Mar 2011 14:26:41 +0000 (14:26 +0000)]
X60: fix typo in dsdt.asl
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6445
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Mon, 14 Mar 2011 13:42:08 +0000 (13:42 +0000)]
X60: Add _PRW/_PSW methods to LID/SLPB objects
This patch adds the required methods for enabling/disabling
the LID and SLPB objects as wake source. On Thinkpads, the
Fn key can (and is by the Vendor BIOS) programmed as Wake source,
so let's do it the same way.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6444
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Mon, 14 Mar 2011 09:08:27 +0000 (09:08 +0000)]
msrtool: Update to use DirectHW on Mac OS X
http://www.coreboot.org/DirectHW
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6443
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Mon, 14 Mar 2011 08:18:27 +0000 (08:18 +0000)]
ec/acpi: make ACPI register pair configurable
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6442
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Mon, 14 Mar 2011 08:18:17 +0000 (08:18 +0000)]
ACPI EC: add ec_set_bit() / ec_clr_bit()
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6441
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Mathias Krause [Thu, 10 Mar 2011 07:52:02 +0000 (07:52 +0000)]
nvramtool: Move code so it has access to the right data structures
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6440
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Scott Duplichan [Tue, 8 Mar 2011 23:01:46 +0000 (23:01 +0000)]
Enable mahogany_fam10 and Kino family 10h to run the SB HT link at the expected HT3 frequency and width by matching the BUID swap list to the production BIOS. In addition, the BUID swap list has been moved into the project-specific file romstage.c for the other 13 AMD family 10h projects as well. For projects using a desktop AMD family 10h processor, pasting in the mahogany_fam10 swap list will likely allow HT3 operation. This should be confirmed on real hardware before commiting any swap list change. A different swap list will be needed for server projects. For serengeti_cheetah_fam10, a reference BIOS swap list to try is: 0x00, 0x0A, 0x00, 0x06, 0xFF, 0x0A, 0x06, 0xFF.
The patch makes these changes:
1) Remove the BUID swap list from ht_wrapper.c and put it in each of 15
romstage.c files where it is used (AMD family 10h projects).
2) Add a prototype to amdfam10.h.
3) Modify the swap list and test in real hardware for mahogany_fam10 and
kino family 10h and confirm HT3 operation for the SB link.
Abuild tested.
Signed-off-by: Scott Duplichan <sc...@notabs.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6439
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Tue, 8 Mar 2011 20:49:18 +0000 (20:49 +0000)]
Add option_table.h as dependency for all C based object files if option tables are used.
This is to make sure that the file exists when it is needed. While this isn't the case for every C source file, it doesn't hurt either to create the file a bit sooner than strictly necessary.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6438
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Mathias Krause [Tue, 8 Mar 2011 12:58:16 +0000 (12:58 +0000)]
nvramtool: Change precedence order for data sources
nvramtool couldn't handle certain combinations of sources for CMOS
layout and CMOS data. This change allows for nearly all combinations.
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6437
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Tue, 8 Mar 2011 07:50:43 +0000 (07:50 +0000)]
Move cmos.default handling to bootblock
The cmos.default code wasn't actually used so far, due to an oversight
when forward-porting this feature from an old branch.
- Extend walkcbfs' use by factoring out the stage handling into C code.
- New sanitize_cmos() function that looks if CMOS data is invalid and
cmos.default exists and if so overwrites CMOS with cmos.default data.
- Use sanitize_cmos() in both bootblock implementations.
- Drop the need to reboot after writing CMOS: CMOS wasn't used so far,
so we can go on without a reboot.
- Remove the restriction that cmos.default only works on CAR boards.
- Always build in cmos.default support on boards that
USE_OPTION_TABLE.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6436
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Mon, 7 Mar 2011 09:09:51 +0000 (09:09 +0000)]
X60: add thermal zone 1
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6435
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Mon, 7 Mar 2011 09:00:50 +0000 (09:00 +0000)]
X60: add thermal zone 0
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6434
2b7e53f0-3cfb-0310-b3e9-
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Michael Karcher [Sun, 6 Mar 2011 17:58:31 +0000 (17:58 +0000)]
Add support for the NSC PC87364 Super I/O.
superiotool -deV output:
http://www.flashrom.org/pipermail/flashrom/2011-March/005878.html
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6433
2b7e53f0-3cfb-0310-b3e9-
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Jonathan Kollasch [Fri, 4 Mar 2011 20:01:15 +0000 (20:01 +0000)]
Add P-states for select Socket 754 processors.
States for AMA3000BEX5AR, SDA3100AIO3BX, and SDA3400AIO3BX
are from AMD document 30430 3.51. States for ADA3200AIO4BX
derived from SSDT of a MS-7135. States for TMDML34BKX5LD derived
from legacy PowerNow! table of a MS-7135, and therefore lack accurate
TDP information.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6432
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Fri, 4 Mar 2011 17:09:21 +0000 (17:09 +0000)]
Redo r6099 after copy&pasted code reintroduced DIMMx #defines
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6431
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Jonathan Kollasch [Thu, 3 Mar 2011 23:09:43 +0000 (23:09 +0000)]
Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code.
With this change the last P-state entry of the last CPU in the table
is successfully conveyed into the SSDT.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6430
2b7e53f0-3cfb-0310-b3e9-
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Jonathan Kollasch [Thu, 3 Mar 2011 20:52:50 +0000 (20:52 +0000)]
Improve ck804 IOAPIC and HPET resource handling.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6429
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
jakllsch [Thu, 3 Mar 2011 15:36:08 +0000 (15:36 +0000)]
Configure PCIe lanes on ms7135 as original BIOS does.
Signed-off-by: <jakllsch@kollasch.net>
Acked-by: <jakllsch@kollasch.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6428
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Thu, 3 Mar 2011 08:29:03 +0000 (08:29 +0000)]
add PC87384 SuperIO
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6427
2b7e53f0-3cfb-0310-b3e9-
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Alexandru Gagniuc [Wed, 2 Mar 2011 19:56:28 +0000 (19:56 +0000)]
Fixes licensing of src/southbridge/via/k8t890/k8x8xx.h to GPLv2+ from GPLv3.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6426
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sylvain "ythier" Hitier [Tue, 1 Mar 2011 22:02:37 +0000 (22:02 +0000)]
Fix some subsystemid statements in r6421
Signed-off-by: Sylvain "ythier" Hitier <sylvain.hitier@gmail.com>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6425
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sylvain "ythier" Hitier [Tue, 1 Mar 2011 21:57:11 +0000 (21:57 +0000)]
[SCONFIG] remove unused variable in inherit_subsystem_ids()
i is a leftover from debugging, no longer needed. So just remove it.
Signed-off-by: Sylvain "ythier" Hitier <sylvain.hitier@gmail.com>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6424
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Sven Schnelle [Tue, 1 Mar 2011 21:51:29 +0000 (21:51 +0000)]
Fix a simple whitespace error in src/include/device/device.h
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
Reported-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6423
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Tue, 1 Mar 2011 21:43:57 +0000 (21:43 +0000)]
Add lex output
lex.yy.c_shipped wasn't committed in r6420, which breaks the build
if you don't have the expert option checked that rebuilds those files.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6422
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Tue, 1 Mar 2011 19:58:47 +0000 (19:58 +0000)]
Use subsystem id from devicetree.cb instead of Kconfig and move
all boards to the new config scheme.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6421
2b7e53f0-3cfb-0310-b3e9-
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Sven Schnelle [Tue, 1 Mar 2011 19:58:15 +0000 (19:58 +0000)]
Add subsystemid option to sconfig
Allow user to add 'subsystemid <vendor> <device> [inherit]' to devicetree.cb for
PCI and PCI domain devices.
Example:
device pci 00.0 on
subsystemid dead beef
end
If the user wants to have this ID inherited to all subdevices/functions,
he can add 'inherit', like in the following example:
device pci 00.0 on
subsystemid dead beef inherit
end
If the user don't want to inherit a Subsystem for a single device, he can
specify 'subsystemid 0 0' on this particular device.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6420
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Tue, 1 Mar 2011 08:09:22 +0000 (08:09 +0000)]
Fix double inclusion of toplevel Makefile.inc
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6419
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Tue, 1 Mar 2011 07:30:14 +0000 (07:30 +0000)]
Mark non-returning function as noreturn to help some compiler versions
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6418
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Tue, 1 Mar 2011 07:26:00 +0000 (07:26 +0000)]
libpayload: Add more libpci-compatibility (#defines)
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6417
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Tue, 1 Mar 2011 07:24:53 +0000 (07:24 +0000)]
libpayload: Implement pci_cleanup()
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6416
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Tue, 1 Mar 2011 07:23:49 +0000 (07:23 +0000)]
libpayload: Implement ffs()
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6415
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Tue, 1 Mar 2011 07:13:10 +0000 (07:13 +0000)]
Some more standard types and defines (libpayload)
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6414
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1