Fix double inclusion of toplevel Makefile.inc

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6419 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/Makefile b/Makefile
index 05b54e298e67d4edca5f7f7b4ee0131b1cebcd76..4c787ef174075c22a12d5f0521f74b5c4ca9d864 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -44,6 +44,9 @@ export objk := $(objutil)/kconfig
 export KCONFIG_AUTOHEADER := $(obj)/config.h
 export KCONFIG_AUTOCONFIG := $(obj)/auto.conf
 
+# directory containing the toplevel Makefile.inc
+TOPLEVEL := .
+
 CONFIG_SHELL := sh
 KBUILD_DEFCONFIG := configs/defconfig
 UNAME_RELEASE := $(shell uname -r)
@@ -73,9 +76,8 @@ DOXYGEN_OUTPUT_DIR := doxygen
 
 all: real-all
 
-# This include must come _before_ he pattern rules below!
+# This include must come _before_ the pattern rules below!
 # Order _does_ matter for pattern rules.
-include Makefile.inc
 include util/kconfig/Makefile
 
 # Three cases where we don't need fully populated $(obj) lists:
@@ -93,6 +95,7 @@ endif
 endif
 
 ifeq ($(NOCOMPILE),1)
+include $(TOPLEVEL)/Makefile.inc
 real-all: config
 
 else
@@ -189,7 +192,7 @@ evaluate_subdirs= \
        $(if $(subdirs),$(eval $(call evaluate_subdirs)))
 
 # collect all object files eligible for building
-subdirs:=.
+subdirs:=$(TOPLEVEL)
 $(eval $(call evaluate_subdirs))
 
 src-to-obj=$(addsuffix .$(1).o, $(basename $(patsubst src/%, $(obj)/%, $($(1)-srcs))))