Zheng Bao [Wed, 17 Mar 2010 03:10:39 +0000 (03:10 +0000)]
The SB600 also has the BootFailTimer. We should disable it,
otherwise it will keeps reboot. The comment was also added in
detail to make less confusing when we debug SB600/SB700.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5240
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Wed, 17 Mar 2010 02:48:24 +0000 (02:48 +0000)]
remove more warnings, and fix some boards (watchdog.h)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5239
2b7e53f0-3cfb-0310-b3e9-
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Keith Hui [Wed, 17 Mar 2010 02:15:07 +0000 (02:15 +0000)]
From Keith Hui:
This patch implements a full SDRAM buffer strength programming algorithm in
set_dram_buffer_strength(), checked against my P2B-LS factory BIOS. With this
in place, I now have 133MHz (!) stability with three 256MB PC133 modules, and
can boot Fedora 11 all the way to the init daemon (actually upstart, but that's
another story). Not to login prompt yet. We'll find out why later.
This again assumes a 4-DIMM board because that's all I have. I need someone
with a 3-DIMM board to test it.
As a bonus, there's a big comment block within that illustrates the algorithm.
:-)
Signed-off-by: Keith Hui <buurin@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5238
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Wed, 17 Mar 2010 02:09:12 +0000 (02:09 +0000)]
fix dell s1850, ROMCC didn't seem to like SSE2 memtest here.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5237
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 17 Mar 2010 01:51:11 +0000 (01:51 +0000)]
fix a couple of warnings
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5236
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 17 Mar 2010 01:50:15 +0000 (01:50 +0000)]
clean some more files in make clean
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5235
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 17 Mar 2010 01:22:01 +0000 (01:22 +0000)]
remove warnings from cs5530 driver. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5234
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 17 Mar 2010 01:18:14 +0000 (01:18 +0000)]
make clean: delete failover.inc and romstage.inc, drop auto.inc (obsolete)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5233
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 17 Mar 2010 01:09:58 +0000 (01:09 +0000)]
drop unused variable
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5232
2b7e53f0-3cfb-0310-b3e9-
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Myles Watson [Wed, 17 Mar 2010 00:55:39 +0000 (00:55 +0000)]
Source all Kconfig files for Intel® CPU models..
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5231
2b7e53f0-3cfb-0310-b3e9-
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Eric W. Biederman [Wed, 17 Mar 2010 00:23:34 +0000 (00:23 +0000)]
Catch non-static arrays in romcc. Not allowed.
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5230
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 16 Mar 2010 23:33:29 +0000 (23:33 +0000)]
pci drivers should be const.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5229
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 16 Mar 2010 23:07:29 +0000 (23:07 +0000)]
it was reason for workaround rules already, and it's somewhat ugly:
util/x86emu is the only part of coreboot that is linked into coreboot
itself that lives in util/.
It's not a utility and it does not really belong where it lives.
---> svn mv util/x86emu src/devices/oprom
plus necessary Makefile changes to get it building again
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5228
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Tue, 16 Mar 2010 19:23:17 +0000 (19:23 +0000)]
Left over strip_quotes definition. Top level Makefile
already provides this.
Thanks Myles for catching this.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5227
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Tue, 16 Mar 2010 19:01:32 +0000 (19:01 +0000)]
Strip quotes from COREBOOT_ROM_DEPENDENCIES
Macro-ify stripping quotes
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5226
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Tue, 16 Mar 2010 16:59:03 +0000 (16:59 +0000)]
Improve dependency tracking for coreboot.rom
Improve handling of problems while building coreboot.rom
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5225
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi patrick.georgi [Tue, 16 Mar 2010 12:01:13 +0000 (12:01 +0000)]
Various changes to the buildsystem:
- Single instance of the CC build rule in Makefile, instantiated as
necessary
- Remove manual static.o and option_table.o rules, they're now covered
by those instances of the CC build rule
- Normalize object file paths, so it can be $(obj)/option_table.o
instead of $(obj)/arch/i386/../../option_table.o now
- Add -pipe to compiler flags. It might be detrimental on rare scenarios
(building with extremly high disk bandwidth, eg. RAM disk), but it
significantly helps on win32 (which seems to cache less aggressively
than most unix-alikes)
- Silence stderr on hostname and domainname invocations (cosmetic fix
for cygwin)
- Test for -Wa,--divide functionality of the target compiler (taken from
abuild). It might be possible to remove most patches in crossgcc with that.
- Report build of failover.inc and romstage.inc
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5224
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Tue, 16 Mar 2010 02:02:26 +0000 (02:02 +0000)]
Delete Config.lb in new southbridge folders.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5223
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Tue, 16 Mar 2010 01:59:28 +0000 (01:59 +0000)]
Add entries of RS780, SB700, Mahogany, Mahogany_fam10 into the
Makefile and Kconfig.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5222
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Tue, 16 Mar 2010 01:53:10 +0000 (01:53 +0000)]
The code can run on the Mahogany board, which is one of sample boards
made by AMD. Its major features are:
CPU:
* AMD AM2+
* AMD Athlon 64 x2
* AMD Athlon 64 FX
* AMD Athlon 64
* AMD Sempron CPUs
System Chipset:
* RS780E
* SB700
On Board Chipset:
* BIOS - SPI
* Azalia CODEC - Realtek ALC888
* LPC SuperIO - ITE8718F(GX).
* LAN - REALTEK 8111C
* TPM - SLB9635TT1.2
Main Memory:
* DDR II * 4 (Max 4GB)
Expansion Slots:
* PCI Express X16 slot*2 (PCI-E X8 Bus)
* PCI Express X4 Slot*1
Intersil PWM:
* Controller - Intersil 6323
Note:
1. The only difference to mahogany is the CPU is changed to K8 family 10.
2. The main structure of the code is based on
serengeti_cheetah_fam10. I am a rookie to fam10. I am still
confused about CONFIG_HT_CHAIN_UNITID_BASE and
CONFIG_HT_CHAIN_END_UNITID_BASE. I set them as the way dbm690t
does. And I have to modify the some fam10 code (see the patch
ht_chain_unitid_base.patch). I dont know how to solve this. Please
help.
Updated findings: In h3finit.c, the code goes the AMD_CB_ManualBUIDSwapList().
The swaplist is {0x00, 0x00, 0xFF, 0x00, 0xFF}. I am trying to find the meaning
of the list. The amdht wrapper needs to modify definitely.
3. With fam10 processor, the HT link can work in HT3.
4. The ACPI _PSS table is set staticly. The auto configuaration
process doesnt seem to work correctly.
5. Currently the fam10 code in coreboot doesn't support DDR3. If you
happen to get a board with DDR3 and you don't have the patience to wait,
please find another board with DDR2.
6. It will take "Uncompressing image to RAM" about 1 minute. I know it is a
issue for a long time. I disable the compressing currently. When the problem
is fixed, we can re-enable it.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5221
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Tue, 16 Mar 2010 01:42:50 +0000 (01:42 +0000)]
1. Features of mahogany.
The code can run on the Mahogany board, which is one of sample boards
made by AMD. Its major features are:
CPU (only K8 system):
* AMD AM2+
* AMD Athlon 64 x2
* AMD Athlon 64 FX
* AMD Athlon 64
* AMD Sempron CPUs
System Chipset:
* RS780E
* SB700
On Board Chipset:
* BIOS - SPI
* Azalia CODEC - Realtek ALC888
* LPC SuperIO - ITE8718F(GX).
* LAN - REALTEK 8111C
* TPM - SLB9635TT1.2
Main Memory:
* DDR II * 4 (Max 4GB)
Expansion Slots:
* PCI Express X16 slot*2 (PCI-E X8 Bus)
* PCI Express X4 Slot*1
Intersil PWM:
* Controller - Intersil 6323
2. The ACPI feature is already added. I suggest that firstly we can test
the board without the ACPI by setting the HAVE_ACPI_TABLE as 0.
With Rev F processor, the HT link can only work in HT1, whose max
frequency is 1GHz.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5220
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Tue, 16 Mar 2010 01:41:14 +0000 (01:41 +0000)]
Features supported in RS780 code:
* PCIe initialization.
* Internal Graphics initialization.
* HT Link initialization. It works in HT1 or HT3 mode.
Note:
1. I tried to add the description of every step to the code. For example,
if it is made based on rpr, section 2.4.5, I will pasted the words
from 2.4.5 to the c code. But the document I worked with might be
different with the most updated one. A new section has been added and
the 2.4.5 might be changed to 2.5.5. That migh lead to confusing. I
correct every comment if I met one. But I have to confess that I am so
reluctant to find out everyone. I believe it will be correct in the long
run.
2. The interanl graphics part is done by Libo Feng <libo.feng@amd.com>.
3. There is a conflict between RPR and our CIM code. Please see the comment in
switching_gppsb_configurations in rs780_pcie.c.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5219
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Tue, 16 Mar 2010 01:38:54 +0000 (01:38 +0000)]
Features supported in SB700 code:
* SATA initialization.
* USB initialization.
* HDA initialization.
* LPC initialization.
* IDE initialization.
* SMBUS initialization.
Note:
1. I tried to add the description of every step to the code. For example,
if it is made based on rpr, section 2.4.5, I will pasted the words
from 2.4.5 to the c code. But the document I worked with might be
different with the most updated one. A new section has been added and
the 2.4.5 might be changed to 2.5.5. That migh lead to confusing. I
correct every comment if I met one. But I have to confess that I am so
reluctant to find out everyone. I believe it will be correct in the long
run.
2. I only test the SATA port 0-3. The ports 4, 5 are "PATA emulations".
I am confused about it.
3. This patch is not only about SB700. Actually it should be
SB7x0. But I dont think it is nice to change everything to
SB7x0. It is ugly, isn't it. As far as I know, they all use the
same code with revision checking. If you guys think it is
appropriate, please modify it to sb7x0.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5218
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao zheng.bao [Tue, 16 Mar 2010 01:36:21 +0000 (01:36 +0000)]
1. This patch is about the pci header of RS780 and SB700. It is made
seperatedly because both RS780 and SB700 will modify the pci_ids.h. It
maybe will cause conflict if the sequence the patches are applied is
different with the one they are created.
2. Dev 0-10 of RS780 has AMD's Vendor ID. So we think it is better to
define the Device ID as XXX_AMD_RS780_XXX. Does anyone think it is
better to move this definition to the AMD zone? That will split the
RS780 into two parts. Is it inappropriate?
Signed-off-by: Zheng Bao <zheng.bao@amd.com
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5217
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Tue, 16 Mar 2010 01:17:19 +0000 (01:17 +0000)]
Make CLANG selectable in Kconfig
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5216
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 16 Mar 2010 01:02:18 +0000 (01:02 +0000)]
This patch is what I needed to compile coreboot with LLVM.
- call va_* directly if coreboot is running on GCC so we don't need
to maintain hacks to get to stdarg.h
- only define LIBGCC_FILE_NAME if it's an absolute path. GCC and LLVM
just print "libgcc.a" if the file is not there.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5215
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 16 Mar 2010 00:58:36 +0000 (00:58 +0000)]
back out r5212 and r5210; Follow the thread of
http://www.coreboot.org/pipermail/coreboot/2010-March/056501.html
for the details.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5214
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 15 Mar 2010 13:35:19 +0000 (13:35 +0000)]
Create a new build.h on every make call; this makes sure it contains a
valid compiler signature and time stamp. Since we maintain correct build.h
dependencies in the source code we can also drop "prepare2"
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5213
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Mon, 15 Mar 2010 10:32:59 +0000 (10:32 +0000)]
Use copy_triple only on non-flattened nodes.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5212
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Mon, 15 Mar 2010 10:04:06 +0000 (10:04 +0000)]
Add an AM2R2 entry in to the src/arch/i386/Makefile.inc.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5211
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sun, 14 Mar 2010 22:20:57 +0000 (22:20 +0000)]
Fix segfault of romcc when complex assignment operators
were applied to non-trivial LHSs, eg. c[4] |= 1;
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5210
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sun, 14 Mar 2010 21:31:05 +0000 (21:31 +0000)]
Move deprecated Kconfig options to their own file,
so it's clear that they should be gone.
More can (and should) be added, but this is a start.
Of course, eliminating the uses of the flags (and then
the flags themselves) that are in Kconfig.deprecated_options
is a noble task for the future :-)
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5209
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sun, 14 Mar 2010 21:25:03 +0000 (21:25 +0000)]
Add scan-build support to the build system.
When configured in Kconfig, just running "make"
calls scan-build as appropriate (however, it does not
check for the presence of scan-build)
The target directory for the scan-build report is configurable
and defaults to the scan-build default of /tmp/scan-build-$date-$num
abuild is adapted to properly run scanbuild when ran
with the -sb option.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5208
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 14 Mar 2010 17:01:08 +0000 (17:01 +0000)]
ICH4 update, fix ATA init, drop SATA (chipset doesn't have SATA)
fix some PCI IDs, enable USB bus mastering, add some license headers, ...
LPC code needs another look, but I think we're getting there.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5207
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sat, 13 Mar 2010 22:07:15 +0000 (22:07 +0000)]
Fix llshell
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5206
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sat, 13 Mar 2010 20:36:11 +0000 (20:36 +0000)]
Use CPU_INTEL_SLOT_1 for Slot 1 boards (trivial).
This fixes a longstanding TODO item.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5205
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Keith Hui [Sat, 13 Mar 2010 20:16:48 +0000 (20:16 +0000)]
Add SDRAMPWR_4DIMM Kconfig option (not user-visible in menuconfig).
Each Intel 440BX board should select this option if it has 4 DIMM
slots on the PCB, and _not_ select it (it defaults to 'n') if it
has 3 DIMMs on the PCB.
Signed-off-by: Keith Hui <buurin@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5204
2b7e53f0-3cfb-0310-b3e9-
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Knut Kujat [Sat, 13 Mar 2010 12:54:58 +0000 (12:54 +0000)]
Fix supermicro/h8qme_fam10 by enabling SPD ROM properly.
Also configure GPIOs so the power LED is working.
Some whitespace cleanups (but by no means comprehensive)
Signed-off-by: Knut Kujat <knuku@gap.upv.es>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5203
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Myles Watson [Thu, 11 Mar 2010 22:12:10 +0000 (22:12 +0000)]
Replace spaces with tabs. Trivial.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5202
2b7e53f0-3cfb-0310-b3e9-
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Myles Watson [Thu, 11 Mar 2010 21:34:27 +0000 (21:34 +0000)]
Replace clear_memory with memset.
Replace set_init_ram_access with the call to set_var_mtrr.
Remove unused #include statments.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5201
2b7e53f0-3cfb-0310-b3e9-
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Arne Georg Gleditsch [Wed, 10 Mar 2010 03:43:05 +0000 (03:43 +0000)]
The following patch implements Opteron Fam 10 rev D (aka Istanbul)
support for coreboot. I have not updated MAX_CPUS for all fam10
mainboards, but it might make sense to multiply those by 1.5.
Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
I assume the line
pci_write_config32(NODE_PCI(nodeid, 0), 0x168, dword);
should be put outside the loop.
Everything seems to be fine. I don't have Istanbul to test. I have
read every changes and they all look good.
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5200
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Tue, 9 Mar 2010 21:51:31 +0000 (21:51 +0000)]
sb600 has problems with the virtual wire mode setup in setup_ioapic(). It causes problems when interrupts are enabled (specifically timer).
Previously the sb600 setup was equivalent to clear_ioapic(), so that is what we will do for now.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5199
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Mon, 8 Mar 2010 23:44:30 +0000 (23:44 +0000)]
Remove Kconfig entries that disable
WAIT_BEFORE_CPUS_INIT. It's disabled by default
(see src/cpu/x86/Kconfig)
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5198
2b7e53f0-3cfb-0310-b3e9-
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Arne Georg Gleditsch [Mon, 8 Mar 2010 23:38:43 +0000 (23:38 +0000)]
Set options to make AMD CAR code compile correctly,
and increase MAX_CPUS to aid support 6-core CPUs.
Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5197
2b7e53f0-3cfb-0310-b3e9-
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Mathias Krause [Mon, 8 Mar 2010 13:08:24 +0000 (13:08 +0000)]
Trivial fix, use correct define.
Signed-off-by: Mathias Krause <Mathias.Krause@secunet.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5196
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sat, 6 Mar 2010 21:18:43 +0000 (21:18 +0000)]
More readable recursive descent macro in Makefile
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5195
2b7e53f0-3cfb-0310-b3e9-
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Keith Hui [Sat, 6 Mar 2010 18:16:25 +0000 (18:16 +0000)]
440BX: Do not hardcode DIMM number + size anymore.
The code currently assumes a 4-DIMM-slots board, this will be fixed soon.
Signed-off-by: Keith Hui <buurin@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5194
2b7e53f0-3cfb-0310-b3e9-
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Keith Hui [Sat, 6 Mar 2010 16:19:11 +0000 (16:19 +0000)]
Add support for the 0x06B1 CPU ID for Celeron (Tualatin).
Signed-off-by: Keith Hui <buurin@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5193
2b7e53f0-3cfb-0310-b3e9-
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Myles Watson [Fri, 5 Mar 2010 19:12:34 +0000 (19:12 +0000)]
Remove redundant run_bios prototype. Trivial.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5192
2b7e53f0-3cfb-0310-b3e9-
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Myles Watson [Fri, 5 Mar 2010 18:27:19 +0000 (18:27 +0000)]
1. Move run_bios prototype to device.h
2. Use time.h for get_time() and move tb_freq into functions.c
3. Move read_io and write_io to io.c and make them static
4. Make a couple of functions static in interrupt.c
5. Refactor a cast from char[] to u64 to get rid of potential alignment problems and a warning
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5191
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 5 Mar 2010 18:25:19 +0000 (18:25 +0000)]
i945 mini patch:
- don't skip the reset on S4 violations. Specs ask us to do this so we do it
- hlt on waiting for reset instead of hot looping.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5190
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 5 Mar 2010 18:03:49 +0000 (18:03 +0000)]
Fix creation of coreboot.bootblock when -O2 is specified instead of -Os (4GB image issue).
According to some GCC folks -Os should be considered a buggy and unreliable
code path, so at least keep -O2 working. coreboot_ram is only 4KB bigger.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5189
2b7e53f0-3cfb-0310-b3e9-
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Keith Hui [Fri, 5 Mar 2010 16:31:41 +0000 (16:31 +0000)]
Add support for the ASUS P2B-LS mainboard.
Signed-off-by: Keith Hui <buurin@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5188
2b7e53f0-3cfb-0310-b3e9-
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Keith Hui [Fri, 5 Mar 2010 16:18:38 +0000 (16:18 +0000)]
Add proper Slot 1 CPU support code/infrastructure.
Signed-off-by: Keith Hui <buurin@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5187
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 5 Mar 2010 10:20:28 +0000 (10:20 +0000)]
This patch fixes two things:
- -m32 is already defined by xcompile if the compiler is a 64bit compiler so
drop it from the Makefile.
- allow "obj-.. += foo.o" for util/, too. Otherwise the source files in
util/x86emu/ put their objects in util/ instead of $(obj)/util
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5186
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 5 Mar 2010 10:03:50 +0000 (10:03 +0000)]
This patch is from 2009-10-20
Convert all DEBUG_SMBUS, DEBUG_SMI, and DEBUG_RAM_SETUP custom and
local #defines into globally configurable kconfig options (and Options.lb
options for as long as newconfig still exists) which can be enabled
by the user in the "Debugging" menu.
The respective menu items only appear if a board is selected where the
chipset code actually provides such additional DEBUG output.
All three variables default to 0 / off for now.
Also, drop a small chunk of dead/useless code in the
src/northbridge/via/cn700/raminit.c file, which would otherwise break
compilation.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reworked to still apply to trunk, added X86EMU_DEBUG (and make the x86emu/yabel
code only work printf instead of a redefined version of printk and
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5185
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 1 Mar 2010 20:16:38 +0000 (20:16 +0000)]
Whitespace changes to make s2912_fam10/ms9652_fam10 more similar.
Also, fix another typo in the ms9652 board name.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5184
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 1 Mar 2010 17:21:15 +0000 (17:21 +0000)]
Drop unused doit.sh files (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5183
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 1 Mar 2010 17:19:55 +0000 (17:19 +0000)]
Various cometic and coding-style fixes (trivial).
- Fix whitespace, alignment, and indentation in a few places.
- Some more consistency fixes in license headers.
- Fix incomplete license header: src/mainboard/msi/ms9652_fam10/devicetree.cb.
- Fix typo for LIMIT_HT_SPEED_1800: s/1.6GHz/1.8GHz/.
- Fix typo in src/mainboard/msi/ms9652_fam10/Kconfig: s/MS-9256/MS-9252/.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5182
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Mon, 1 Mar 2010 17:16:06 +0000 (17:16 +0000)]
- Simplify stack size determination: MAX_CPUS * STACK_SIZE
- Check that this doesn't run into vga/oprom/bios area at link time
- Avoid overly complicated and not well understood hack which avoids that
area by leaving a hole in the stack area.
- Adapt technexion/tim5690 to put ramstage at 1MB
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5181
2b7e53f0-3cfb-0310-b3e9-
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Timothy Pearson [Mon, 1 Mar 2010 10:56:51 +0000 (10:56 +0000)]
Add msi/ms9652_fam10 board.
Updated Timothy's patch to match recent changes in the tree. It's build tested.
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5180
2b7e53f0-3cfb-0310-b3e9-
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Timothy Pearson [Mon, 1 Mar 2010 10:30:08 +0000 (10:30 +0000)]
Allow per-board setting of HT clock and width so
less than optimal PCB designs can still work reliably
with reduced clock.
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5179
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 1 Mar 2010 09:09:33 +0000 (09:09 +0000)]
Fix YABEL guards; make debugging optional; fix some warnings
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5178
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 1 Mar 2010 08:34:19 +0000 (08:34 +0000)]
This patch implements MBI (modular bios interface) support to the i830 chipset.
This is needed on the IP1000T to get VGA output. The VGA option rom will ask
through an SMI for hardware specifics (in form of a VBT, video bios table)
which the SMI handler copies into the VGA option rom.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5177
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Mon, 1 Mar 2010 07:42:02 +0000 (07:42 +0000)]
- Add rules that build either 4 or 5 ssdts (only those variants exist in the board now)
- Change ACPI_SSDTX_NUM to either 4 or 5 for boards that have ssdtX.asl
files, according to the number of ssdtX.asl there.
- Remove custom ssdt rules
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5176
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sun, 28 Feb 2010 20:56:42 +0000 (20:56 +0000)]
Use the romstraps build infrastructure created for "tinybootblock"
(chipset_bootblock_inc and chipset_bootblock_lds) instead of using
chipset specific rules for "bigbootblock" in the generic i386 Makefile.
It also adds rules for the romstraps of
* southbridge/nvidia/ck804
* southbridge/sis/sis966
* northbridge/via/vx800
for the benefit of both image layouts.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5175
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 28 Feb 2010 19:40:03 +0000 (19:40 +0000)]
disable AP_CODE_IN_CAR. The K8 code has an alternate code path to do the job,
and it's not working anyways.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5174
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 28 Feb 2010 19:12:37 +0000 (19:12 +0000)]
use names instead of numbers where possible, also print a better message if no
keyboard is connected.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5173
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 28 Feb 2010 18:37:38 +0000 (18:37 +0000)]
Add attribute((noreturn)) to romcc
It doesn't do anything, but it allows the same code to be compiled with gcc and
romcc.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5172
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sun, 28 Feb 2010 18:23:00 +0000 (18:23 +0000)]
- Add config flag for boards that have their own fadt.c
This should eventually go, as fadt seems to be better
put into the southbridge
- Add config flag for boards that have get_bus_conf.c
Might be cleaned out as well, no idea
- Use flags where appropriate.
- Move the following rules to src/arch/i386/Makefile.inc:
- fadt.o
- dsdt.o
- acpi_tables.o
- get_bus_conf.o
- Rename objs_dsl_template in toplevel Makefile to the more
appropriate objs_asl_template
- Remove all Makefiles that are empty now, which includes
src/mainboard/Makefile.k8_CAR.inc and
src/mainboard/Makefile.k8_ck804.inc
and the include statements that used these files.
- Add workaround to intel/xe7501devkit:
It uses ACPI in an unusual way: It adds a MADT, but no
DSDT. As this is highly unusual, I didn't want to add
explicit support for that scenario (and encourage such
uses that way), and added a dummy dsdt.asl instead. It
will be linked to dsdt.o, but not linked into the final
binary.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5171
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 28 Feb 2010 18:13:09 +0000 (18:13 +0000)]
assert.h: have the same information on asserts in romcc and non-romcc code.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5170
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sat, 27 Feb 2010 13:11:34 +0000 (13:11 +0000)]
Put .config, build/, coreboot-builds (abuild) and
temporary/backup files to svn:ignore
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5169
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sat, 27 Feb 2010 08:39:04 +0000 (08:39 +0000)]
- make HAVE_HARD_RESET match what newconfig did
- introduce BOARD_HAS_HARD_RESET and use it if a board provides
hard_reset in $(MAINBOARDDIR)/reset.c, instead of some chipset component
- move a couple of rules out of the mainboards' Makefiles into
src/arch/i386/Makefile.inc:
initobj-y += crt0.o
obj-y += mainboard.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
obj-$(CONFIG_BOARD_HAS_HARD_RESET) += reset.o
- remove Makefile.incs that are empty (or comment-only) after these
changes, incl. Makefile.romccboard.inc (and references to it)
- Make include not fail if Makefile.inc doesn't exist.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5168
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Stefan Reinauer [Sat, 27 Feb 2010 01:50:21 +0000 (01:50 +0000)]
This does the following:
cd coreboot/src/southbridge
svn mv i82801ca i82801cx
svn mv i82801dbm i82801dx
svn mv i82801er i82801ex
svn copy i82801xx i82801bx
svn mv i82801xx i82801ax
Plus, fixing up the filenames in these directories and the romstage.c and
Kconfig files of the mainboards using those drivers.
Plus, switching the thomson ip1000 and rca rm4100 to the i82801dx driver.
There's a lot more to be done, like
- adding device IDs for the ICH3 and newer drivers that have been kept in
i82801xx so far
- drop the additional parts support from the ax and bx drivers.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5167
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Fri, 26 Feb 2010 20:32:08 +0000 (20:32 +0000)]
Work around stack size breakage observed on fam10.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5166
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 25 Feb 2010 22:48:33 +0000 (22:48 +0000)]
drop unused file
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5165
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Thu, 25 Feb 2010 21:50:26 +0000 (21:50 +0000)]
Move the ldscripts logic to src/arch/i386/Makefile.inc
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5164
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 25 Feb 2010 18:23:23 +0000 (18:23 +0000)]
Drop i855pm port and rename i855gme to i855 instead.
This patch also changes the digitallogic/adl855pc to use that port.
It probably won't work, but at least we will get an error if something
breaks compilation of the i855 code that is there.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5163
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Thu, 25 Feb 2010 17:03:17 +0000 (17:03 +0000)]
Unify crt0s setup to src/arch/i386/Makefile.inc. This variable
is not something users have to concern themselves with anymore.
Also fixes some wrong romstrap configs for boards, fixing a couple
of them.
Also add "make printcrt0s" target for debugging crt0s when updating
modified checkouts.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5162
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 25 Feb 2010 16:09:53 +0000 (16:09 +0000)]
Various minor fixes (trivial).
- More license header cosmetics.
- New official "Building coreboot" document is now at:
http://www.coreboot.org/Build_HOWTO
- Drop "(mostly those derived from the Linux kernel)" part of the GPL-v2-only
parts from the README. Many other files are also GPL-v2-only, too.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5161
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Stefan Reinauer [Thu, 25 Feb 2010 13:45:08 +0000 (13:45 +0000)]
Make Kconfig more similar to newconfig: enable "HAVE_HIGH_TABLES" per
default.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5160
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Stefan Reinauer [Thu, 25 Feb 2010 13:40:49 +0000 (13:40 +0000)]
HAVE_MOVNTI really means SSE2. Also add sfence in the MOVNTI case.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5159
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Anish K. Patel [Wed, 24 Feb 2010 16:36:56 +0000 (16:36 +0000)]
Add Win Enterprises' PL6064 board
Signed-off-by: Anish K. Patel <anishp@win-ent.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5158
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Patrick Georgi [Wed, 24 Feb 2010 13:58:23 +0000 (13:58 +0000)]
Enable user selectable bootblocks, and provide a bootblock that
selects between "fallback" and "normal", in addition to the
already present "fallback"-only bootblock.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5157
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Patrick Georgi [Wed, 24 Feb 2010 13:18:01 +0000 (13:18 +0000)]
This patch fixes an issue with the wrong build rules being selected.
Make is free to choose any fitting rule for a target, and so some
obj-y files were compiled with initobj flags. This patch also fixes
the behavior for objects being both in initobj and obj.
At the moment all object rules are the same, but if we start not including
all .c files in romstage.c anymore we need to define __PRE_RAM__ in the
initobj rule and that's when things start breaking.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5156
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Stefan Reinauer [Wed, 24 Feb 2010 13:09:09 +0000 (13:09 +0000)]
Remove register pressure from e7501 driver by not indirectly referencing
0:0.0 through a struct passed all through the code. This behavior makes a lot
of sense for CPUs with a memory controller built-in. But this is not the case
for the e7501.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5155
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Knut Kujat [Wed, 24 Feb 2010 08:48:35 +0000 (08:48 +0000)]
Several fixes to the supermicro/h8qme_fam10 board, so it
builds and boots correctly.
Signed-off-by: Knut Kujat <knuku@gap.upv.es>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5154
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Rudolf Marek [Tue, 23 Feb 2010 21:43:42 +0000 (21:43 +0000)]
Clobber registers as appropriate in AMD CAR code, and
build a better barrier for gcc to reflush all registers
when moving the stack. memcpy was taken from Linux.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5153
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Stefan Reinauer [Tue, 23 Feb 2010 20:31:37 +0000 (20:31 +0000)]
Remove nonsensical wrapper for function in
PS/2 keyboard API.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5152
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Patrick Georgi [Tue, 23 Feb 2010 19:38:44 +0000 (19:38 +0000)]
- Remove src/arch/i386/init/ldscript_cbfs.lb as it's not used anymore
- Remove _lrom and _elrom, as they're only set but never used
- Make bootblock size dynamic in the tiny bootblock case.
It's 0.5-3K instead of 64K now.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5151
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Patrick Georgi [Tue, 23 Feb 2010 16:54:20 +0000 (16:54 +0000)]
Only handle code as "driver" that actually uses our driver
infrastructure (special linking, data structures, etc)
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5150
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Zheng Bao [Tue, 23 Feb 2010 10:33:25 +0000 (10:33 +0000)]
Find out the svnversion we are working on is quite important.
The whole command (which also parses git data, if it's a git-svn tree)
is copied from original newconfig.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5149
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Rudolf Marek [Tue, 23 Feb 2010 10:22:37 +0000 (10:22 +0000)]
Disable ACPI Resume on asus/m2v-mx_se, it's broken
since cbmem
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5148
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Jonathan A. Kollasch [Tue, 23 Feb 2010 10:18:43 +0000 (10:18 +0000)]
Adjust msi/ms7135 DCACHE_RAM_* config to previous 32KiB values,
4KiB is not enough to work.
Additionally, modify the device tree so that the undocumented LDN 6
is ignored by the resource allocator, and while here, assign the
parallel port DRQ, hardware monitor IRQ and drop NIC MAC address
on SMBus EEPROM hint, the ms7135 doesn't have such hardware.
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5147
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Uwe Hermann [Mon, 22 Feb 2010 16:41:49 +0000 (16:41 +0000)]
Random cosmetic fixes (trivial).
- Fix typos.
- Whitespace and consistency fixes.
- Make "menuconfig" help easily readable in 80x25 terminals / xterms.
- Use full/correct prototype for cbfs_and_run_core() everywhere.
- More cosmetic fixes in license headers.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5146
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Stefan Reinauer [Mon, 22 Feb 2010 14:55:16 +0000 (14:55 +0000)]
Fix SMM handler comment. Thanks for noticing, Peter!
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5145
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Patrick Georgi [Mon, 22 Feb 2010 12:58:01 +0000 (12:58 +0000)]
- Make walkcbfs capable of loading files other than the first
- Look more closely for files, which should make the code robust
against defective CBFS images, as long as the bootblock is usable.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5144
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Stefan Reinauer [Mon, 22 Feb 2010 11:27:33 +0000 (11:27 +0000)]
drop empty x86emu Makefile
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5143
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Stefan Reinauer [Mon, 22 Feb 2010 11:26:06 +0000 (11:26 +0000)]
Inteltool: Add i830/Tolapai/Ich4 support
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5142
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Stefan Reinauer [Mon, 22 Feb 2010 09:32:33 +0000 (09:32 +0000)]
mini update SMM:
- allow northbridge and cpu handlers, too
- support for older rev 2 cpus
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5141
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