The code can run on the Mahogany board, which is one of sample boards
authorZheng Bao <zheng.bao@amd.com>
Tue, 16 Mar 2010 01:53:10 +0000 (01:53 +0000)
committerZheng Bao <Zheng.Bao@amd.com>
Tue, 16 Mar 2010 01:53:10 +0000 (01:53 +0000)
commit584ab84e92a4db3b96c253bb559d64a8f82cf367
treef0f488a5fd539c6afec4d4ae64bf9ea184960ef0
parentdec279fa300243bc3c5afe039a5ff6f1fc3264de
The code can run on the Mahogany board, which is one of sample boards
made by AMD. Its major features are:
 CPU:
  * AMD AM2+
  * AMD Athlon 64 x2
  * AMD Athlon 64 FX
  * AMD Athlon 64
  * AMD Sempron CPUs
 System Chipset:
  * RS780E
  * SB700
 On Board Chipset:
  * BIOS - SPI
  * Azalia CODEC - Realtek ALC888
  * LPC SuperIO - ITE8718F(GX).
  * LAN - REALTEK 8111C
  * TPM - SLB9635TT1.2
 Main Memory:
  * DDR II * 4 (Max 4GB)
 Expansion Slots:
  * PCI Express X16 slot*2 (PCI-E X8 Bus)
  * PCI Express X4 Slot*1
 Intersil PWM:
  * Controller - Intersil 6323

Note:
1. The only difference to mahogany is the CPU is changed to K8 family 10.
2. The main structure of the code is based on
   serengeti_cheetah_fam10. I am a rookie to fam10. I am still
   confused about CONFIG_HT_CHAIN_UNITID_BASE and
   CONFIG_HT_CHAIN_END_UNITID_BASE. I set them as the way dbm690t
   does.  And I have to modify the some fam10 code (see the patch
   ht_chain_unitid_base.patch). I dont know how to solve this. Please
   help.
   Updated findings: In h3finit.c, the code goes the AMD_CB_ManualBUIDSwapList().
   The swaplist is {0x00, 0x00, 0xFF, 0x00, 0xFF}. I am trying to find the meaning
   of the list. The amdht wrapper needs to modify definitely.
3. With fam10 processor, the HT link can work in HT3.
4. The ACPI _PSS table is set staticly. The auto configuaration
   process doesnt seem to work correctly.
5. Currently the fam10 code in coreboot doesn't support DDR3. If you
   happen to get a board with DDR3 and you don't have the patience to wait,
   please find another board with DDR2.
6. It will take "Uncompressing image to RAM" about 1 minute. I know it is a
   issue for a long time. I disable the compressing currently. When the problem
   is fixed, we can re-enable it.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5221 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
24 files changed:
src/mainboard/amd/mahogany_fam10/Kconfig [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/acpi/cpstate.asl [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/acpi/debug.asl [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/acpi/globutil.asl [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/acpi/ide.asl [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/acpi/routing.asl [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/acpi/sata.asl [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/acpi/statdef.asl [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/acpi/usb.asl [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/acpi_tables.c [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/apc_auto.c [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/chip.h [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/cmos.layout [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/devicetree.cb [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/dsdt.asl [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/fadt.c [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/get_bus_conf.c [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/irq_tables.c [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/mainboard.c [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/mb_sysconf.h [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/mptable.c [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/resourcemap.c [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/romstage.c [new file with mode: 0644]
src/mainboard/amd/mahogany_fam10/spd_addr.h [new file with mode: 0644]