HAVE_MOVNTI really means SSE2. Also add sfence in the MOVNTI case.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/Kconfig b/src/Kconfig
index 675446ba6e616cd166e4505f18ba4691cb4204bd..99aabdf23a7a552e9c7c8514393f40faf2defeaa 100644 (file)
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -184,10 +184,6 @@ config HAVE_MAINBOARD_RESOURCES
        bool
        default n
 
-config HAVE_MOVNTI
-       bool
-       default n
-
 config HAVE_OPTION_TABLE
        bool
        default y

diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index 3c4c41967f5c9333772ca3dc2a2947c3a8dc3b5d..c0cf76887f81d7ba81115b3e8b4d730134a46ee7 100644 (file)
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -32,14 +32,26 @@ config SMP
          This option is used to enable certain functions to make coreboot
          work correctly on symmetric multi processor (SMP) systems.
 
-# Set MMX and SSE in socket or model if the CPU has them.
-# If all CPUs for the socket have MMX or SSE, set them there.
-# These options are only needed for boards compiled with romcc.
 config MMX
        bool
+       help
+         Select MMX in your socket or model Kconfig if your CPU has MMX
+         streaming SIMD instructions. ROMCC can build more efficient
+         code if it can spill to MMX registers.
 
 config SSE
        bool
+       help
+         Select SSE in your socket or model Kconfig if your CPU has SSE
+         streaming SIMD instructions. ROMCC can build more efficient
+         code if it can spill to SSE (aka XMM) registers.
+
+config SSE2
+       bool
+       help
+         Select SSE2 in your socket or model Kconfig if your CPU has SSE2
+         streaming SIMD instructions. Some parts of coreboot can be built
+         with more efficient code if SSE2 instructions are available.
 
 config VAR_MTRR_HOLE
        bool

diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index 974eed69bcf42345b985445755c01329afc68e9d..3882861f59f5db868b1b7aa08b2b4fefe2992a1c 100644 (file)
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -1,9 +1,9 @@
 config CPU_AMD_MODEL_10XXX
        bool
-       select HAVE_MOVNTI
        select USE_PRINTK_IN_CAR
        select USE_DCACHE_RAM
        select SSE
+       select SSE2
        select HAVE_INIT_TIMER
 
 config CPU_ADDR_BITS

diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig
index 83a7fe102bad9ed047c843e888ca64a28e987909..e17563758788322300047ebfa7b29f8f7fadfbc0 100644 (file)
--- a/src/cpu/amd/model_fxx/Kconfig
+++ b/src/cpu/amd/model_fxx/Kconfig
@@ -1,9 +1,10 @@
 config CPU_AMD_MODEL_FXX
        bool
-       select HAVE_MOVNTI
        select USE_PRINTK_IN_CAR
        select USE_DCACHE_RAM
+       select MMX
        select SSE
+       select SSE2
        select HAVE_INIT_TIMER
 
 config CPU_ADDR_BITS

diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig
index cd6483a2fc7c63b2122e8bb78124ba6a116d36be..4ddba39c80da9956b9cbcf413fea470f76d7005b 100644 (file)
--- a/src/cpu/intel/model_1067x/Kconfig
+++ b/src/cpu/intel/model_1067x/Kconfig
@@ -1,4 +1,4 @@
 config CPU_INTEL_CORE2
        bool
        select SMP
-       select HAVE_MOVNTI
+       select SSE2

diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig
index 187bcd067b7b4398c91b17436e3f9afcd2fc1521..03428169c4128ddc174b1a1968bf1099df652e46 100644 (file)
--- a/src/cpu/intel/model_106cx/Kconfig
+++ b/src/cpu/intel/model_106cx/Kconfig
@@ -1,4 +1,4 @@
 config CPU_INTEL_ATOM_230
        bool
        select SMP
-       select HAVE_MOVNTI
+       select SSE2

diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig
index cbc5797e54ab3f3adf054e16a8c793a350c2e641..eda7473138151daf6ea7ef14425778b2a1eb2493 100644 (file)
--- a/src/cpu/intel/model_6ex/Kconfig
+++ b/src/cpu/intel/model_6ex/Kconfig
@@ -1,4 +1,4 @@
 config CPU_INTEL_CORE
        bool
        select SMP
-       select HAVE_MOVNTI
+       select SSE2

diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig
index 484114cf036f56193bb2c749c3a2049df100f0ee..4ddba39c80da9956b9cbcf413fea470f76d7005b 100644 (file)
--- a/src/cpu/intel/model_6fx/Kconfig
+++ b/src/cpu/intel/model_6fx/Kconfig
@@ -1 +1,4 @@
-# select HAVE_MOVNTI
+config CPU_INTEL_CORE2
+       bool
+       select SMP
+       select SSE2

diff --git a/src/cpu/intel/model_f0x/Kconfig b/src/cpu/intel/model_f0x/Kconfig
index fe68d96ec4b80c29eb9f73332baee0205906ecc2..bf26cfe04815fc5cc1d40aa9011786e619074a67 100644 (file)
--- a/src/cpu/intel/model_f0x/Kconfig
+++ b/src/cpu/intel/model_f0x/Kconfig
@@ -1,4 +1,4 @@
 config CPU_INTEL_MODEL_F0X
        bool
        select SMP
-       select HAVE_MOVNTI
+       select SSE2

diff --git a/src/cpu/intel/model_f1x/Kconfig b/src/cpu/intel/model_f1x/Kconfig
index 89d382fb158663d9a57431dbbefaae89085dce69..328930cb8c243b517a5d43425f9593b91b90ae81 100644 (file)
--- a/src/cpu/intel/model_f1x/Kconfig
+++ b/src/cpu/intel/model_f1x/Kconfig
@@ -1,4 +1,4 @@
 config CPU_INTEL_MODEL_F1X
        bool
        select SMP
-       select HAVE_MOVNTI
+       select SSE2

diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig
index c92cc8c7c5493d13262d0f47d61a2eb1ea9c3677..1672fda7e920509fbe0fe53b70b4bfc7a48f045c 100644 (file)
--- a/src/cpu/intel/model_f2x/Kconfig
+++ b/src/cpu/intel/model_f2x/Kconfig
@@ -1,4 +1,4 @@
 config CPU_INTEL_MODEL_F2X
        bool
        select SMP
-       select HAVE_MOVNTI
+       select SSE2

diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig
index c9cf932dcb75d760484b808cf31724e45c259694..1a2fa36922ccddb2c5afa12d5e8c7d1c0d1deaf7 100644 (file)
--- a/src/cpu/intel/model_f3x/Kconfig
+++ b/src/cpu/intel/model_f3x/Kconfig
@@ -1,4 +1,4 @@
 config CPU_INTEL_MODEL_F3X
        bool
        select SMP
-       select HAVE_MOVNTI
+       select SSE2

diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig
index 5c464341d894db6b783555b44feb2d2e662243a0..e765e335d69021084608266a5efff33b97ffdf10 100644 (file)
--- a/src/cpu/intel/model_f4x/Kconfig
+++ b/src/cpu/intel/model_f4x/Kconfig
@@ -1,4 +1,4 @@
 config CPU_INTEL_MODEL_F4X
        bool
        select SMP
-       select HAVE_MOVNTI
+       select SSE2

diff --git a/src/cpu/via/model_c7/Kconfig b/src/cpu/via/model_c7/Kconfig
index 8a2fe88a442a94ac6f1a479a742df4b201d4e418..c9146ad0da21a792f223559a3fd6e856cae4424e 100644 (file)
--- a/src/cpu/via/model_c7/Kconfig
+++ b/src/cpu/via/model_c7/Kconfig
@@ -1,3 +1,4 @@
 config CPU_VIA_C7
        bool
        select UDELAY_TSC
+       select SSE2

diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c
index 4f00030b893fbc018d6b2dd67da912ae1ca32181..6268aaa6cd516e319b792f3916a1288ab70a3106 100644 (file)
--- a/src/lib/ramtest.c
+++ b/src/lib/ramtest.c
@@ -1,6 +1,8 @@
 static void write_phys(unsigned long addr, unsigned long value)
 {
-#if CONFIG_HAVE_MOVNTI
+       // Assembler in lib/ is very ugly. But we properly guarded
+       // it so let's obey this one for now
+#if CONFIG_SSE2
        asm volatile(
                "movnti %1, (%0)"
                : /* outputs */
@@ -50,6 +52,10 @@ static void ram_fill(unsigned long start, unsigned long stop)
                }
                write_phys(addr, addr);
        };
+#if CONFIG_SSE2
+       // Needed for movnti
+       asm volatile ("sfence" ::: "memory");
+#endif
        /* Display final address */
 #if CONFIG_USE_PRINTK_IN_CAR
        printk_debug("%08lx\r\nDRAM filled\r\n", addr);