smmobj-y += vtxprintf.o
initobj-y += vtxprintf.o
+initobj-$(CONFIG_USE_DCACHE_RAM) += console.o
driver-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.o
driver-$(CONFIG_USBDEBUG_DIRECT) += usbdebug_direct_console.o
#include <console/console.h>
#include <build.h>
#include <arch/hlt.h>
+#include <arch/io.h>
#ifndef __PRE_RAM__
-#include <arch/io.h>
#include <string.h>
#include <pc80/mc146818rtc.h>
#endif
+#ifdef __ROMCC__
+/* if included by romcc, include the sources, too. romcc can't use prototypes */
+#include <console/console.c>
+#endif
+
#endif /* CONSOLE_CONSOLE_H_ */
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "cpu/x86/bist.h"
*/
#include <stdint.h>
+#include <stdlib.h>
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
#include <console/console.h>
-#include "console/console.c"
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
-#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
#include "southbridge/amd/cs5536/cs5536_early_smbus.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/raminit.h"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/raminit.h"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "console/console.c"
-#include "pc80/serial.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_10xxx_rev.h>
#include "northbridge/amd/amdfam10/raminit.h"
#include <arch/io.h>
#include <device/pnp_def.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/raminit.h"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "cpu/x86/bist.h"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
#include <reset.h>
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "console/console.c"
-#include "pc80/serial.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_10xxx_rev.h>
#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "console/console.c"
-#include "pc80/serial.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_10xxx_rev.h>
#include "northbridge/amd/amdfam10/raminit.h"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <stdlib.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "cpu/x86/bist.h"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "superio/nsc/pc87351/pc87351_early_serial.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/raminit.h"
#define CK804_NUM 1
#include <cpu/amd/model_fxx_rev.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "southbridge/nvidia/ck804/ck804_early_smbus.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
#include "northbridge/intel/i82810/raminit.h"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "superio/smsc/lpc47b272/lpc47b272_early_serial.c"
#include "northbridge/intel/i82810/raminit.h"
#include <stdlib.h>
#include <cpu/x86/lapic.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <stdlib.h>
#include <cpu/x86/lapic.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "superio/nsc/pc97317/pc97317_early_serial.c"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "superio/nsc/pc97317/pc97317_early_serial.c"
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/via/cn700/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include <stdlib.h>
#include "pc80/udelay_io.c"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801dx/i82801dx.h"
#include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
#include <arch/hlt.h>
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
//#include "lib/delay.c"
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
//#include "southbridge/intel/i440bx/i440bx_early_smbus.c"
#include "superio/nsc/pc97317/pc97317_early_serial.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "pc80/udelay_io.c"
#include "lib/delay.c"
#include "cpu/x86/lapic/boot_cpu.c"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#include "southbridge/sis/sis966/sis966_enable_usbdebug_direct.c"
#include "pc80/usbdebug_direct_serial.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
#include "pc80/usbdebug_direct_serial.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
/* TODO: It's a PC87364 actually! */
#include "superio/nsc/pc87360/pc87360_early_serial.c"
#include <stdlib.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <stdlib.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "superio/winbond/w83977f/w83977f_early_serial.c"
#include "southbridge/amd/cs5530/cs5530_enable_rom.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "superio/winbond/w83977tf/w83977tf_early_serial.c"
#include "southbridge/amd/cs5530/cs5530_enable_rom.c"
#include <arch/io.h>
#include <device/pnp_def.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
-#include "pc80/serial.c"
-#include "console/console.c"
#include <cpu/x86/bist.h>
#if CONFIG_USBDEBUG_DIRECT
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/x86/bist.h>
#include "lib/ramtest.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include <cpu/x86/lapic.h>
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i3100/i3100_early_smbus.c"
#include "southbridge/intel/i3100/i3100_early_lpc.c"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "pc80/udelay_io.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i3100/i3100_early_smbus.c"
#include "southbridge/intel/i3100/i3100_early_lpc.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801cx/i82801cx_early_smbus.c"
#include "northbridge/intel/e7501/raminit.h"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
#include "northbridge/amd/amdk8/raminit.h"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
#include "northbridge/amd/amdk8/raminit.h"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
#include "northbridge/amd/amdk8/raminit.h"
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/via/cn700/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
-#include "pc80/serial.c"
-#include "console/console.c"
#include <cpu/x86/bist.h>
#if CONFIG_USBDEBUG_DIRECT
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/raminit.h"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "cpu/x86/bist.h"
#include <arch/io.h>
#include <device/pnp_def.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <arch/io.h>
#include <device/pnp_def.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
#include "northbridge/intel/i82810/raminit.h"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "northbridge/intel/i82810/raminit.h"
#define CK804_USE_ACI 1
#include <cpu/amd/model_fxx_rev.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "southbridge/nvidia/ck804/ck804_early_smbus.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
#include "pc80/usbdebug_direct_serial.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "southbridge/nvidia/mcp55/mcp55_early_smbus.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
#include "pc80/usbdebug_direct_serial.c"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
#include "northbridge/intel/i82810/raminit.h"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
#include "pc80/usbdebug_direct_serial.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "cpu/x86/bist.h"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "cpu/x86/bist.h"
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
#include "pc80/udelay_io.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
#include "northbridge/intel/i82830/raminit.h"
#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
-#include "pc80/serial.c"
-#include "console/console.c"
#include <cpu/x86/bist.h>
#if CONFIG_USBDEBUG_DIRECT
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_10xxx_rev.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_10xxx_rev.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/raminit.h"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/raminit.h"
#include <arch/hlt.h>
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "superio/nsc/pc97317/pc97317_early_serial.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <arch/llshell.h>
-#include "pc80/serial.c"
#include "pc80/udelay_io.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
#include "northbridge/intel/i82830/raminit.h"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
#include <stdlib.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <stdlib.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <stdlib.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <stdlib.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
#include "pc80/usbdebug_direct_serial.c"
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
#include "pc80/usbdebug_direct_serial.c"
#include <stdlib.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/via/cn700/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/via/vt8623/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/via/vx800/vx800.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/via/cn400/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include <arch/hlt.h>
#include <stdlib.h>
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/via/vt8601/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include <arch/hlt.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/via/cn700/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "northbridge/via/cx700/raminit.h"
#include "cpu/x86/bist.h"
*/
#include <stdint.h>
+#include <stdlib.h>
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
-#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
#include "southbridge/amd/cs5536/cs5536_early_smbus.c"
obj-$(CONFIG_UDELAY_IO) += udelay_io.o
obj-y += keyboard.o
-#initobj-y += serial.o
+initobj-$(CONFIG_USE_DCACHE_RAM) += serial.o
subdirs-y += vga
$(obj)/pc80/mc146818rtc.o : $(OPTION_TABLE_H)
#include <lib.h> /* Prototypes */
+#include <arch/io.h>
/* Base Address */
#ifndef CONFIG_TTYS0_BASE