Fix ECC disable option for AMD Fam10 DDR2 and DDR3.
[coreboot.git] / src / northbridge / amd / amdmct / mct / mct_d.c
2012-03-02 Marc JonesFix ECC disable option for AMD Fam10 DDR2 and DDR3.
2011-03-28 Zheng BaoAdd AMD C32 support.
2011-01-06 Zheng BaoFix some settings fo AMD MCT. It is based on BIOS test...
2010-10-08 Zheng BaoTrivial. Spell checking.
2010-09-28 Zheng BaoTrivial. re-Indent the code.
2010-09-27 Xavi Drudis FerranObviously missing brackets.
2010-09-21 Zheng BaoComplete the code which was missing.
2010-09-09 Arne Georg GleditschPlease find appended. This patch gets rid of the ...
2010-09-09 Arne Georg GleditschAlso improve boot time on AMD for the DDR3 code path.
2010-09-09 Arne Georg GleditschApparently, it's not crucial to clear this at the exact...
2010-09-04 Kerry SheAMD DDR2 and DDR3 MCT function InitPhyCompensation...
2010-04-30 Myles WatsonGet rid of a few more warnings.
2010-04-27 Stefan ReinauerSince some people disapprove of white space cleanups...
2010-04-16 Stefan Reinauerzero warnings days: unify mp tables. fix warnings.
2010-04-15 Myles WatsonRemove a few more warnings from fam10.
2010-03-22 Stefan Reinauerprintk_foo -> printk(BIOS_FOO, ...)
2009-09-14 Marc JonesUse the coreboot pci config read/write functions instea...
2009-08-25 Zheng BaoWithout this patch, if we only got a DIMM in Channel...
2009-06-06 Marco SchmidtFix for Erratum 350 for AMD Fam10h CPUs.
2008-12-05 Stefan ReinauerFixes to AMD MCT code, found by Marco Schmidt <mschmidt...
2008-07-23 Marc JonesMemory initialization support for AMD Fam10 B3 (B0...
2008-04-11 Marc Jones (marc... Bring Fam10 memory controller init up to date with...
2008-01-18 Stefan ReinauerPlease bear with me - another rename checkin. This...
2007-12-19 Marc JonesInitial AMD Barcelona support for rev Bx.