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Fix ECC disable option for AMD Fam10 DDR2 and DDR3.
[coreboot.git]
/
src
/
northbridge
/
amd
/
amdmct
/
mct
/
mct_d.c
2012-03-02
Marc Jones
Fix ECC disable option for AMD Fam10 DDR2 and DDR3.
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2011-03-28
Zheng Bao
Add AMD C32 support.
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2011-01-06
Zheng Bao
Fix some settings fo AMD MCT. It is based on BIOS test...
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2010-10-08
Zheng Bao
Trivial. Spell checking.
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2010-09-28
Zheng Bao
Trivial. re-Indent the code.
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2010-09-27
Xavi Drudis Ferran
Obviously missing brackets.
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2010-09-21
Zheng Bao
Complete the code which was missing.
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2010-09-09
Arne Georg Gleditsch
Please find appended. This patch gets rid of the ...
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2010-09-09
Arne Georg Gleditsch
Also improve boot time on AMD for the DDR3 code path.
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2010-09-09
Arne Georg Gleditsch
Apparently, it's not crucial to clear this at the exact...
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2010-09-04
Kerry She
AMD DDR2 and DDR3 MCT function InitPhyCompensation...
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2010-04-30
Myles Watson
Get rid of a few more warnings.
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2010-04-27
Stefan Reinauer
Since some people disapprove of white space cleanups...
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2010-04-16
Stefan Reinauer
zero warnings days: unify mp tables. fix warnings.
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2010-04-15
Myles Watson
Remove a few more warnings from fam10.
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2010-03-22
Stefan Reinauer
printk_foo -> printk(BIOS_FOO, ...)
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2009-09-14
Marc Jones
Use the coreboot pci config read/write functions instea...
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2009-08-25
Zheng Bao
Without this patch, if we only got a DIMM in Channel...
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2009-06-06
Marco Schmidt
Fix for Erratum 350 for AMD Fam10h CPUs.
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2008-12-05
Stefan Reinauer
Fixes to AMD MCT code, found by Marco Schmidt <mschmidt...
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2008-07-23
Marc Jones
Memory initialization support for AMD Fam10 B3 (B0...
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2008-04-11
Marc Jones (marc...
Bring Fam10 memory controller init up to date with...
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2008-01-18
Stefan Reinauer
Please bear with me - another rename checkin. This...
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2007-12-19
Marc Jones
Initial AMD Barcelona support for rev Bx.
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