Also improve boot time on AMD for the DDR3 code path.

Fix a typo, too.

Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numscale.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5792 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index c571b2349dbeae5336082240d10fef10f2e3ee84..5043b754b7986d8345b16b0334232ceab591e0ec 100644 (file)
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -3189,7 +3189,7 @@ static void mct_FinalMCT_D(struct MCTStatStruc *pMCTstat,
        print_t("\tmct_FinalMCT_D: Clr Cl, Wb\n");
 
 
-       /* ClrClToNB_D postponed til we're done executing from ROM */
+       /* ClrClToNB_D postponed until we're done executing from ROM */
        mct_ClrWbEnhWsbDis_D(pMCTstat, pDCTstat);
 }
 

diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index 6eea6e47220dba84e2ead8f172a113f87d67723d..b6782bc007916d0c8cb289879684710cf379b186 100644 (file)
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@ -2873,7 +2873,7 @@ static u16 Get_WrDatGross_MaxMin(struct DCTStatStruc *pDCTstat,
 static void mct_FinalMCT_D(struct MCTStatStruc *pMCTstat,
                                struct DCTStatStruc *pDCTstat)
 {
-       mct_ClrClToNB_D(pMCTstat, pDCTstat);
+       /* ClrClToNB_D postponed until we're done executing from ROM */
        mct_ClrWbEnhWsbDis_D(pMCTstat, pDCTstat);
 }