Apparently, it's not crucial to clear this at the exact moment we switch

to using ram, so something like the appended is perhaps more
appropriate.  Confirmed to work on hw.

Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numscale.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c
index 992c9579131f43192eb64786f7515a9b78c81c19..6f61fc37fd87100a9e60564e8b28e99af7b1d117 100644 (file)
--- a/src/cpu/amd/model_10xxx/model_10xxx_init.c
+++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c
@@ -113,6 +113,11 @@ static void model_10xxx_init(device_t dev)
        msr.hi &= ~(1 << (46 - 32));
        wrmsr(NB_CFG_MSR, msr);
 
+       /* Clear ClLinesToNbDis */
+       msr = rdmsr(BU_CFG2_MSR);
+       msr.lo &= ~(1 << 15);
+       wrmsr(BU_CFG2_MSR, msr);
+
        /* Write protect SMM space with SMMLOCK. */
        msr = rdmsr(HWCR_MSR);
        msr.lo |= (1 << 0);

diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index afeb4e98d21f22a5499184999653b39590c43fd2..c571b2349dbeae5336082240d10fef10f2e3ee84 100644 (file)
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -3189,7 +3189,7 @@ static void mct_FinalMCT_D(struct MCTStatStruc *pMCTstat,
        print_t("\tmct_FinalMCT_D: Clr Cl, Wb\n");
 
 
-       mct_ClrClToNB_D(pMCTstat, pDCTstat);
+       /* ClrClToNB_D postponed til we're done executing from ROM */
        mct_ClrWbEnhWsbDis_D(pMCTstat, pDCTstat);
 }