2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2008 coresystems GmbH
5 * Copyright (C) 2009 Thomas Jourdan <thomas.jourdan@gmail.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; version 2 of
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 #include <device/pci.h>
25 #include <arch/acpi.h>
26 #include <cpu/x86/smm.h>
28 #define ACPI_PM1_STS (pmbase + 0x00)
29 #define ACPI_PM1_EN (pmbase + 0x02)
30 #define ACPI_PM1_CNT (pmbase + 0x04)
31 #define ACPI_PM1_TMR (pmbase + 0x08)
32 #define ACPI_PROC_CNT (pmbase + 0x10)
33 #define ACPI_LV2 (pmbase + 0x14)
34 #define ACPI_GPE0_STS (pmbase + 0x28)
35 #define ACPI_GPE0_EN (pmbase + 0x2C)
36 #define ACPI_SMI_EN (pmbase + 0x30)
37 #define ACPI_SMI_STS (pmbase + 0x34)
38 #define ACPI_ALT_GP_SMI_EN (pmbase + 0x38)
39 #define ACPI_ALT_GP_SMI_STS (pmbase + 0x3A)
40 #define ACPI_MON_SMI (pmbase + 0x40)
41 #define ACPI_DEVACT_STS (pmbase + 0x44)
42 #define ACPI_DEVTRAP_EN (pmbase + 0x48)
43 #define ACPI_BUS_ADDR_TRACK (pmbase + 0x4C)
44 #define ACPI_BUS_CYC_TRACK (pmbase + 0x4E)
46 #define ACPI_PM1a_EVT_BLK ACPI_PM1_STS
47 #define ACPI_PM1a_CNT_BLK ACPI_PM1_CNT
48 #define ACPI_PM_TMR_BLK ACPI_PM1_TMR
49 #define ACPI_P_BLK ACPI_PROC_CNT
50 #define ACPI_GPE0_BLK ACPI_GPE0_STS
52 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
54 acpi_header_t *header = &(fadt->header);
55 u16 pmbase = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x1f,0)), 0x40) & 0xfffe;
57 memset((void *) fadt, 0, sizeof(acpi_fadt_t));
58 memcpy(header->signature, "FACP", 4);
61 memcpy(header->oem_id, "CORE ", 6);
62 memcpy(header->oem_table_id, "COREBOOT", 8);
63 memcpy(header->asl_compiler_id, "CORE", 4);
64 header->asl_compiler_revision = 0;
66 fadt->firmware_ctrl = (unsigned long) facs;
67 fadt->dsdt = (unsigned long) dsdt;
68 fadt->preferred_pm_profile = 7; /* Performance Server */
70 #if CONFIG_HAVE_SMI_HANDLER == 1
71 fadt->smi_cmd = APM_CNT;
75 fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
76 fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
77 fadt->s4bios_req = 0x0;
78 fadt->pstate_cnt = 0xe2;
80 fadt->pm1a_evt_blk = pmbase;
81 fadt->pm1b_evt_blk = 0x0;
82 fadt->pm1a_cnt_blk = pmbase + 0x4;
83 fadt->pm1b_cnt_blk = 0x0;
84 fadt->pm2_cnt_blk = 0x0;
85 fadt->pm_tmr_blk = pmbase + 0x8;
86 fadt->gpe0_blk = pmbase + 0x28;
89 fadt->pm1_evt_len = 0x4;
90 fadt->pm1_cnt_len = 0x2;
91 fadt->pm2_cnt_len = 0x0;
92 fadt->pm_tmr_len = 0x4;
93 fadt->gpe0_blk_len = 0x8;
94 fadt->gpe1_blk_len = 0x0;
95 fadt->gpe1_base = 0x0;
97 fadt->p_lvl2_lat = 0x65;
98 fadt->p_lvl3_lat = 0x3e9;
99 fadt->flush_size = 0x400;
100 fadt->flush_stride = 0x10;
101 fadt->duty_offset = 0x1;
102 fadt->duty_width = 0x3;
103 fadt->day_alrm = 0xd;
104 fadt->mon_alrm = 0x00;
105 fadt->century = 0x00;
106 fadt->iapc_boot_arch = 0x03;
109 fadt->reset_reg.space_id = 1;
110 fadt->reset_reg.bit_width = 8;
111 fadt->reset_reg.bit_offset = 0;
112 fadt->reset_reg.resv = 0;
113 fadt->reset_reg.addrl = 0xcf9;
114 fadt->reset_reg.addrh = 0;
115 fadt->reset_value = 6;
119 fadt->x_firmware_ctl_l = (u32)facs;
120 fadt->x_firmware_ctl_h = 0;
121 fadt->x_dsdt_l = (u32)dsdt;
124 fadt->x_pm1a_evt_blk.space_id = 1;
125 fadt->x_pm1a_evt_blk.bit_width = 32;
126 fadt->x_pm1a_evt_blk.bit_offset = 0;
127 fadt->x_pm1a_evt_blk.resv = 0;
128 fadt->x_pm1a_evt_blk.addrl = pmbase;
129 fadt->x_pm1a_evt_blk.addrh = 0x0;
131 fadt->x_pm1b_evt_blk.space_id = 1;
132 fadt->x_pm1b_evt_blk.bit_width = 32;
133 fadt->x_pm1b_evt_blk.bit_offset = 0;
134 fadt->x_pm1b_evt_blk.resv = 0;
135 fadt->x_pm1b_evt_blk.addrl = 0x0;
136 fadt->x_pm1b_evt_blk.addrh = 0x0;
138 fadt->x_pm1a_cnt_blk.space_id = 1;
139 fadt->x_pm1a_cnt_blk.bit_width = 16;
140 fadt->x_pm1a_cnt_blk.bit_offset = 0;
141 fadt->x_pm1a_cnt_blk.resv = 0;
142 fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
143 fadt->x_pm1a_cnt_blk.addrh = 0x0;
145 fadt->x_pm1b_cnt_blk.space_id = 1;
146 fadt->x_pm1b_cnt_blk.bit_width = 0;
147 fadt->x_pm1b_cnt_blk.bit_offset = 0;
148 fadt->x_pm1b_cnt_blk.resv = 0;
149 fadt->x_pm1b_cnt_blk.addrl = 0x0;
150 fadt->x_pm1b_cnt_blk.addrh = 0x0;
152 fadt->x_pm2_cnt_blk.space_id = 1;
153 fadt->x_pm2_cnt_blk.bit_width = 0;
154 fadt->x_pm2_cnt_blk.bit_offset = 0;
155 fadt->x_pm2_cnt_blk.resv = 0;
156 fadt->x_pm2_cnt_blk.addrl = 0x0;
157 fadt->x_pm2_cnt_blk.addrh = 0x0;
159 fadt->x_pm_tmr_blk.space_id = 1;
160 fadt->x_pm_tmr_blk.bit_width = 32;
161 fadt->x_pm_tmr_blk.bit_offset = 0;
162 fadt->x_pm_tmr_blk.resv = 0;
163 fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
164 fadt->x_pm_tmr_blk.addrh = 0x0;
166 fadt->x_gpe0_blk.space_id = 1;
167 fadt->x_gpe0_blk.bit_width = 64;
168 fadt->x_gpe0_blk.bit_offset = 0;
169 fadt->x_gpe0_blk.resv = 0;
170 fadt->x_gpe0_blk.addrl = pmbase + 0x28;
171 fadt->x_gpe0_blk.addrh = 0x0;
173 fadt->x_gpe1_blk.space_id = 1;
174 fadt->x_gpe1_blk.bit_width = 32;
175 fadt->x_gpe1_blk.bit_offset = 0;
176 fadt->x_gpe1_blk.resv = 0;
177 fadt->x_gpe1_blk.addrl = 0x0;
178 fadt->x_gpe1_blk.addrh = 0x0;
181 acpi_checksum((void *) fadt, header->length);