Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5921
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
18 files changed:
#include <cpu/x86/pae.h>
#include <pc80/mc146818rtc.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/pae.h>
#include <pc80/mc146818rtc.h>
#include <cpu/x86/lapic.h>
#include "northbridge/amd/amdfam10/amdfam10.h"
#include "northbridge/amd/amdfam10/amdfam10.h"
#include <cpu/amd/model_10xxx_rev.h>
#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/amd/model_10xxx_rev.h>
#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
* Copyright 2005 AMD
* 2005.08 yhlu add microcode support
*/
* Copyright 2005 AMD
* 2005.08 yhlu add microcode support
*/
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/x86/pae.h>
#include <pc80/mc146818rtc.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/pae.h>
#include <pc80/mc146818rtc.h>
#include <cpu/x86/lapic.h>
#include "northbridge/amd/amdk8/amdk8.h"
#include "northbridge/amd/amdk8/amdk8.h"
#include <cpu/amd/model_fxx_rev.h>
#include <cpu/amd/microcode.h>
#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
#include <cpu/amd/model_fxx_rev.h>
#include <cpu/amd/microcode.h>
#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
#include <cpu/amd/multicore.h>
#include <cpu/amd/multicore.h>
#include <cpu/amd/model_fxx_msr.h>
#if CONFIG_WAIT_BEFORE_CPUS_INIT
#include <cpu/amd/model_fxx_msr.h>
#if CONFIG_WAIT_BEFORE_CPUS_INIT
msr_t base;
msr_t mask;
};
msr_t base;
msr_t mask;
};
struct mtrr_state {
struct mtrr mtrrs[MTRR_COUNT];
msr_t top_mem, top_mem2;
struct mtrr_state {
struct mtrr mtrrs[MTRR_COUNT];
msr_t top_mem, top_mem2;
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
- * Description: Microcode patch support for k8 by yhlu
- */
-
-
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/amd/microcode.h>
static uint8_t microcode_updates[] __attribute__ ((aligned(16))) = {
#include <cpu/amd/microcode.h>
static uint8_t microcode_updates[] __attribute__ ((aligned(16))) = {
}
void model_fxx_update_microcode(unsigned cpu_deviceid)
}
void model_fxx_update_microcode(unsigned cpu_deviceid)
equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid );
if(equivalent_processor_rev_id != 0)
amd_update_microcode(microcode_updates, equivalent_processor_rev_id);
equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid );
if(equivalent_processor_rev_id != 0)
amd_update_microcode(microcode_updates, equivalent_processor_rev_id);
#include <cpu/x86/lapic.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/cache.h>
static void vsm_end_post_smi(void)
{
__asm__ volatile (
static void vsm_end_post_smi(void)
{
__asm__ volatile (
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
#include <cpu/x86/name.h>
static const uint32_t microcode_updates[] = {
#include <cpu/x86/name.h>
static const uint32_t microcode_updates[] = {
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
#include <cpu/x86/name.h>
#include <usbdebug.h>
#include <cpu/x86/name.h>
#include <usbdebug.h>
#include <console/console.h>
#include <device/device.h>
#include <console/console.h>
#include <device/device.h>
-#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
static uint32_t microcode_updates[] = {
/* Dummy terminator */
static uint32_t microcode_updates[] = {
/* Dummy terminator */
static void model_69x_init(device_t dev)
{
/* Turn on caching if we haven't already */
static void model_69x_init(device_t dev)
{
/* Turn on caching if we haven't already */
static struct device_operations cpu_dev_ops = {
.init = model_69x_init,
};
static struct device_operations cpu_dev_ops = {
.init = model_69x_init,
};
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0690 }, /* Pentium M */
{ X86_VENDOR_INTEL, 0x0695 },
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0690 }, /* Pentium M */
{ X86_VENDOR_INTEL, 0x0695 },
#include <console/console.h>
#include <device/device.h>
#include <console/console.h>
#include <device/device.h>
-#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
static uint32_t microcode_updates[] = {
/* Dummy terminator */
static uint32_t microcode_updates[] = {
/* Dummy terminator */
static void model_6dx_init(device_t dev)
{
/* Turn on caching if we haven't already */
static void model_6dx_init(device_t dev)
{
/* Turn on caching if we haven't already */
static struct device_operations cpu_dev_ops = {
.init = model_6dx_init,
};
static struct device_operations cpu_dev_ops = {
.init = model_6dx_init,
};
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x06D0 }, /* Pentium M on 90nm with 2MiB of L2 cache */
{ X86_VENDOR_INTEL, 0x06D6 }, /* Pentium M on 90nm with 2MiB of L2 cache */
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x06D0 }, /* Pentium M on 90nm with 2MiB of L2 cache */
{ X86_VENDOR_INTEL, 0x06D6 }, /* Pentium M on 90nm with 2MiB of L2 cache */
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
#include <cpu/x86/name.h>
#include <usbdebug.h>
#include <cpu/x86/name.h>
#include <usbdebug.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
#include <cpu/x86/name.h>
#include <usbdebug.h>
#include <cpu/x86/name.h>
#include <usbdebug.h>
#include <console/console.h>
#include <device/device.h>
#include <console/console.h>
#include <device/device.h>
-#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
static uint32_t microcode_updates[] = {
/* WARNING - Intel has a new data structure that has variable length
static uint32_t microcode_updates[] = {
/* WARNING - Intel has a new data structure that has variable length
static void model_6xx_init(device_t dev)
{
/* Turn on caching if we haven't already */
static void model_6xx_init(device_t dev)
{
/* Turn on caching if we haven't already */
#include <console/console.h>
#include <device/device.h>
#include <console/console.h>
#include <device/device.h>
-#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
/* 256KB cache */
static uint32_t microcode_updates[] = {
/* 256KB cache */
static uint32_t microcode_updates[] = {
static void model_f0x_init(device_t dev)
{
/* Turn on caching if we haven't already */
static void model_f0x_init(device_t dev)
{
/* Turn on caching if we haven't already */
static struct device_operations cpu_dev_ops = {
.init = model_f0x_init,
};
static struct device_operations cpu_dev_ops = {
.init = model_f0x_init,
};
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0f0A },
{ 0, 0 },
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0f0A },
{ 0, 0 },
#include <console/console.h>
#include <device/device.h>
#include <console/console.h>
#include <device/device.h>
-#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
/* 256KB cache */
static uint32_t microcode_updates[] = {
/* 256KB cache */
static uint32_t microcode_updates[] = {
static void model_f1x_init(device_t dev)
{
/* Turn on caching if we haven't already */
static void model_f1x_init(device_t dev)
{
/* Turn on caching if we haven't already */
static struct device_operations cpu_dev_ops = {
.init = model_f1x_init,
};
static struct device_operations cpu_dev_ops = {
.init = model_f1x_init,
};
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0f12 },
{ 0, 0 },
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0f12 },
{ 0, 0 },
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
/* 512KB cache */
static uint32_t microcode_updates[] = {
/* 512KB cache */
static uint32_t microcode_updates[] = {
static struct device_operations cpu_dev_ops = {
.init = model_f2x_init,
};
static struct device_operations cpu_dev_ops = {
.init = model_f2x_init,
};
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0f22 },
{ X86_VENDOR_INTEL, 0x0f24 },
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0f22 },
{ X86_VENDOR_INTEL, 0x0f24 },
#include <console/console.h>
#include <device/device.h>
#include <console/console.h>
#include <device/device.h>
-#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
static uint32_t microcode_updates[] = {
/* WARNING - Intel has a new data structure that has variable length
static uint32_t microcode_updates[] = {
/* WARNING - Intel has a new data structure that has variable length
static void model_f3x_init(device_t cpu)
{
/* Turn on caching if we haven't already */
static void model_f3x_init(device_t cpu)
{
/* Turn on caching if we haven't already */
static struct device_operations cpu_dev_ops = {
.init = model_f3x_init,
};
static struct device_operations cpu_dev_ops = {
.init = model_f3x_init,
};
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0f34 }, /* Xeon */
{ 0, 0 },
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0f34 }, /* Xeon */
{ 0, 0 },
#include <console/console.h>
#include <device/device.h>
#include <console/console.h>
#include <device/device.h>
-#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
static uint32_t microcode_updates[] = {
/* WARNING - Intel has a new data structure that has variable length
static uint32_t microcode_updates[] = {
/* WARNING - Intel has a new data structure that has variable length
static void model_f4x_init(device_t cpu)
{
/* Turn on caching if we haven't already */
static void model_f4x_init(device_t cpu)
{
/* Turn on caching if we haven't already */
static struct device_operations cpu_dev_ops = {
.init = model_f4x_init,
};
static struct device_operations cpu_dev_ops = {
.init = model_f4x_init,
};
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0f41 }, /* Xeon */
{ 0, 0 },
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0f41 }, /* Xeon */
{ 0, 0 },
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
static void model_c3_init(device_t dev)
{
static void model_c3_init(device_t dev)
{
#include <console/console.h>
#include <delay.h>
#include <stdlib.h>
#include <console/console.h>
#include <delay.h>
#include <stdlib.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/cache.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
#define MSR_IA32_PERF_STATUS 0x00000198
#define MSR_IA32_PERF_CTL 0x00000199
#define MSR_IA32_PERF_STATUS 0x00000198
#define MSR_IA32_PERF_CTL 0x00000199