else
makerule coreboot.rom
depends "coreboot.strip buildrom $(PAYLOAD-1)"
- action "PAYLOAD=$(PAYLOAD-1); if [ $(CONFIG_ROMFS) -eq 1 ]; then PAYLOAD=/dev/null; touch romfs-support; fi; ./buildrom $< $@ $$PAYLOAD $(ROM_IMAGE_SIZE) $(ROM_SECTION_SIZE)"
- action "if [ $(CONFIG_COMPRESSED_PAYLOAD_LZMA) -eq 1 -a $(CONFIG_ROMFS) -eq 1 ]; then echo l > romfs-support; fi"
+ action "PAYLOAD=$(PAYLOAD-1); if [ $(CONFIG_CBFS) -eq 1 ]; then PAYLOAD=/dev/null; touch cbfs-support; fi; ./buildrom $< $@ $$PAYLOAD $(ROM_IMAGE_SIZE) $(ROM_SECTION_SIZE)"
+ action "if [ $(CONFIG_COMPRESSED_PAYLOAD_LZMA) -eq 1 -a $(CONFIG_CBFS) -eq 1 ]; then echo l > cbfs-support; fi"
end
end
object elfboot.o
object hardwaremain.o
-if CONFIG_ROMFS
+if CONFIG_CBFS
object selfboot.o
end
if CONFIG_FS_PAYLOAD
#include <part/hard_reset.h>
#include <part/init_timer.h>
#include <boot/elf.h>
-#include <romfs.h>
+#include <cbfs.h>
#if HAVE_ACPI_RESUME == 1
#include <arch/acpi.h>
#endif
* write our configuration tables.
*/
lb_mem = write_tables();
-#if CONFIG_ROMFS == 1
+#if CONFIG_CBFS == 1
# if USE_FALLBACK_IMAGE == 1
- void (*pl)(void) = romfs_load_payload(lb_mem, "fallback/payload");
+ void (*pl)(void) = cbfs_load_payload(lb_mem, "fallback/payload");
# else
- void (*pl)(void) = romfs_load_payload(lb_mem, "normal/payload");
+ void (*pl)(void) = cbfs_load_payload(lb_mem, "normal/payload");
# endif
#endif
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
-#include <romfs.h>
+#include <cbfs.h>
#ifndef CONFIG_BIG_ENDIAN
#define ntohl(x) ( ((x&0xff)<<24) | ((x&0xff00)<<8) | \
unsigned short ip_checksum;
};
-int romfs_self_decompress(int algo, void *src,struct segment *new)
+int cbfs_self_decompress(int algo, void *src,struct segment *new)
{
u8 *dst;
/* for uncompressed, it's easy: just point at the area in ROM */
- if (algo == ROMFS_COMPRESS_NONE) {
+ if (algo == CBFS_COMPRESS_NONE) {
new->s_srcaddr = (u32) src;
new->s_filesz = new->s_memsz;
return 0;
switch(algo) {
#ifdef CONFIG_COMPRESSION_LZMA
- case ROMFS_COMPRESS_LZMA: {
+ case CBFS_COMPRESS_LZMA: {
unsigned long ulzma(unsigned char *src, unsigned char *dst);
ulzma(src, dst);
}
#endif
#ifdef CONFIG_COMPRESSION_NRV2B
- case ROMFS_COMPRESS_NRV2B: {
+ case CBFS_COMPRESS_NRV2B: {
unsigned long unrv2b(u8 *src, u8 *dst, unsigned long *ilen_p);
unsigned long tmp;
unrv2b(src, dst, &tmp);
}
#endif
default:
- printk_info( "ROMFS: Unknown compression type %d\n",
+ printk_info( "CBFS: Unknown compression type %d\n",
algo);
return -1;
}
static int build_self_segment_list(
struct segment *head,
unsigned long bounce_buffer, struct lb_memory *mem,
- struct romfs_payload *payload, u32 *entry)
+ struct cbfs_payload *payload, u32 *entry)
{
struct segment *new;
struct segment *ptr;
u8 *data;
int datasize;
- struct romfs_payload_segment *segment, *first_segment;
+ struct cbfs_payload_segment *segment, *first_segment;
memset(head, 0, sizeof(*head));
head->phdr_next = head->phdr_prev = head;
head->next = head->prev = head;
datasize = ntohl(segment->len);
/* figure out decompression, do it, get pointer to the area */
- if (romfs_self_decompress(ntohl(segment->compression),
+ if (cbfs_self_decompress(ntohl(segment->compression),
((unsigned char *) first_segment) +
ntohl(segment->offset), new)) {
- printk_emerg("romfs_self_decompress failed\n");
+ printk_emerg("cbfs_self_decompress failed\n");
return;
}
printk_debug("New segment dstaddr 0x%lx memsize 0x%lx srcaddr 0x%lx filesize 0x%lx\n",
}
static int load_self_segments(
- struct segment *head, struct romfs_payload *payload)
+ struct segment *head, struct cbfs_payload *payload)
{
unsigned long offset;
struct segment *ptr;
return 0;
}
-int selfboot(struct lb_memory *mem, struct romfs_payload *payload)
+int selfboot(struct lb_memory *mem, struct cbfs_payload *payload)
{
void *entry;
struct segment head;
export always
comment "Enable FAT filesystem support"
end
-define CONFIG_ROMFS
+define CONFIG_CBFS
default 0
export always
- comment "The new ROMFS file system"
+ comment "The new CBFS file system"
end
define AUTOBOOT_DELAY
default 2
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <string.h>
-#include <romfs.h>
+#include <cbfs.h>
struct rom_header * pci_rom_probe(struct device *dev)
{
struct rom_header *rom_header;
struct pci_data *rom_data;
- if (CONFIG_ROMFS) {
+ if (CONFIG_CBFS) {
void *v;
/* if it's in FLASH, then it's as if dev->on_mainboard was true */
- v = romfs_load_optionrom(dev->vendor, dev->device, NULL);
+ v = cbfs_load_optionrom(dev->vendor, dev->device, NULL);
printk_debug("In cbfs, rom address for %s = %lx\n",
dev_path(dev), rom_address);
if (v) {
--- /dev/null
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008 Jordan Crouse <jordan@cosmicpenguin.net>
+ *
+ * This file is dual-licensed. You can choose between:
+ * - The GNU GPL, version 2, as published by the Free Software Foundation
+ * - The revised BSD license (without advertising clause)
+ *
+ * ---------------------------------------------------------------------------
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ * ---------------------------------------------------------------------------
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ * ---------------------------------------------------------------------------
+ */
+
+#ifndef _CBFS_H_
+#define _CBFS_H_
+
+/** These are standard values for the known compression
+ alogrithms that coreboot knows about for stages and
+ payloads. Of course, other LAR users can use whatever
+ values they want, as long as they understand them. */
+
+#define CBFS_COMPRESS_NONE 0
+#define CBFS_COMPRESS_LZMA 1
+#define CBFS_COMPRESS_NRV2B 2
+
+/** These are standard component types for well known
+ components (i.e - those that coreboot needs to consume.
+ Users are welcome to use any other value for their
+ components */
+
+#define CBFS_TYPE_STAGE 0x10
+#define CBFS_TYPE_PAYLOAD 0x20
+#define CBFS_TYPE_OPTIONROM 0x30
+
+/** this is the master cbfs header - it need to be
+ located somewhere in the bootblock. Where it
+ actually lives is up to coreboot. A pointer to
+ this header will live at 0xFFFFFFFc, so we can
+ easily find it. */
+
+#define CBFS_HEADER_MAGIC 0x4F524243
+#define CBFS_HEADPTR_ADDR 0xFFFFFFFc
+#define VERSION1 0x31313131
+
+struct cbfs_header {
+ u32 magic;
+ u32 version;
+ u32 romsize;
+ u32 bootblocksize;
+ u32 align;
+ u32 offset;
+ u32 pad[2];
+} __attribute__((packed));
+
+/** This is a component header - every entry in the CBFS
+ will have this header.
+
+ This is how the component is arranged in the ROM:
+
+ -------------- <- 0
+ component header
+ -------------- <- sizeof(struct component)
+ component name
+ -------------- <- offset
+ data
+ ...
+ -------------- <- offset + len
+*/
+
+#define CBFS_FILE_MAGIC "LARCHIVE"
+
+struct cbfs_file {
+ char magic[8];
+ u32 len;
+ u32 type;
+ u32 checksum;
+ u32 offset;
+} __attribute__((packed));
+
+/*** Component sub-headers ***/
+
+/* Following are component sub-headers for the "standard"
+ component types */
+
+/** This is the sub-header for stage components. Stages are
+ loaded by coreboot during the normal boot process */
+
+struct cbfs_stage {
+ u32 compression; /** Compression type */
+ u64 entry; /** entry point */
+ u64 load; /** Where to load in memory */
+ u32 len; /** length of data to load */
+ u32 memlen; /** total length of object in memory */
+} __attribute__((packed));
+
+/** this is the sub-header for payload components. Payloads
+ are loaded by coreboot at the end of the boot process */
+
+struct cbfs_payload_segment {
+ u32 type;
+ u32 compression;
+ u32 offset;
+ u64 load_addr;
+ u32 len;
+ u32 mem_len;
+} __attribute__((packed));
+
+struct cbfs_payload {
+ struct cbfs_payload_segment segments;
+};
+
+#define PAYLOAD_SEGMENT_CODE 0x45444F43
+#define PAYLOAD_SEGMENT_DATA 0x41544144
+#define PAYLOAD_SEGMENT_BSS 0x20535342
+#define PAYLOAD_SEGMENT_PARAMS 0x41524150
+#define PAYLOAD_SEGMENT_ENTRY 0x52544E45
+
+struct cbfs_optionrom {
+ u32 compression;
+ u32 len;
+} __attribute__((packed));
+
+#define CBFS_NAME(_c) (((char *) (_c)) + sizeof(struct cbfs_file))
+#define CBFS_SUBHEADER(_p) ( (void *) ((((u8 *) (_p)) + ntohl((_p)->offset))) )
+
+void * cbfs_load_payload(struct lb_memory *lb_mem, const char *name);
+void * cbfs_load_stage(const char *name);
+int cbfs_execute_stage(const char *name);
+void * cbfs_get_file(const char *name);
+void *cbfs_load_optionrom(u16 vendor, u16 device, void * dest);
+int run_address(void *f);
+
+#endif
+
initobject memcmp.o
end
-if CONFIG_ROMFS
- object romfs.o
+if CONFIG_CBFS
+ object cbfs.o
end
--- /dev/null
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008, Jordan Crouse <jordan@cosmicpenguin.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+
+#include <types.h>
+#include <string.h>
+#include <console/console.h>
+#include <boot/coreboot_tables.h>
+#include <cbfs.h>
+
+#ifndef CONFIG_BIG_ENDIAN
+#define ntohl(x) ( ((x&0xff)<<24) | ((x&0xff00)<<8) | \
+ ((x&0xff0000) >> 8) | ((x&0xff000000) >> 24) )
+#else
+#define ntohl(x) (x)
+#endif
+
+int run_address(void *f);
+
+int cbfs_decompress(int algo, void *src, void *dst, int len)
+{
+ switch(algo) {
+ case CBFS_COMPRESS_NONE:
+ memcpy(dst, src, len);
+ return 0;
+
+#ifdef CONFIG_COMPRESSION_LZMA
+
+ case CBFS_COMPRESS_LZMA: {
+ unsigned long ulzma(unsigned char *src, unsigned char *dst);
+ ulzma(src, dst);
+ }
+ return 0;
+#endif
+
+#ifdef CONFIG_COMPRESSION_NRV2B
+ case CBFS_COMPRESS_NRV2B: {
+ unsigned long unrv2b(u8 *src, u8 *dst, unsigned long *ilen_p);
+ unsigned long tmp;
+
+ unrv2b(src, dst, &tmp);
+ }
+ return 0;
+#endif
+ default:
+ printk_info( "CBFS: Unknown compression type %d\n",
+ algo);
+ return -1;
+ }
+}
+
+int cbfs_check_magic(struct cbfs_file *file)
+{
+ return !strcmp(file->magic, CBFS_FILE_MAGIC) ? 1 : 0;
+}
+
+struct cbfs_header *cbfs_master_header(void)
+{
+ struct cbfs_header *header;
+
+ void *ptr = (void *)*((unsigned long *) CBFS_HEADPTR_ADDR);
+ printk_debug("Check CBFS header at %p\n", ptr);
+ header = (struct cbfs_header *) ptr;
+
+ printk_debug("magic is %08x\n", ntohl(header->magic));
+ if (ntohl(header->magic) != CBFS_HEADER_MAGIC) {
+ printk_err("NO CBFS HEADER\n");
+ return NULL;
+ }
+
+ printk_debug("Found CBFS header at %p\n", ptr);
+ return header;
+}
+
+struct cbfs_file *cbfs_find(const char *name)
+{
+ struct cbfs_header *header = cbfs_master_header();
+ unsigned long offset;
+
+ if (header == NULL)
+ return NULL;
+ offset = 0 - ntohl(header->romsize) + ntohl(header->offset);
+
+ while(1) {
+ struct cbfs_file *file = (struct cbfs_file *) offset;
+ if (cbfs_check_magic(file)) printk_info("Check %s\n", CBFS_NAME(file));
+ if (cbfs_check_magic(file) &&
+ !strcmp(CBFS_NAME(file), name))
+ return file;
+
+ offset += ntohl(header->align);
+
+ if (offset < 0xFFFFFFFF - ntohl(header->romsize))
+ return NULL;
+ }
+}
+
+struct cbfs_stage *cbfs_find_file(const char *name, int type)
+{
+ struct cbfs_file *file = cbfs_find(name);
+
+ if (file == NULL) {
+ printk_info( "CBFS: Could not find file %s\n",
+ name);
+ return NULL;
+ }
+
+ if (ntohl(file->type) != type) {
+ printk_info( "CBFS: File %s is of type %x instead of"
+ "type %x\n", name, file->type, type);
+
+ return NULL;
+ }
+
+ return (void *) CBFS_SUBHEADER(file);
+}
+
+void *cbfs_load_optionrom(u16 vendor, u16 device, void * dest)
+{
+ char name[17];
+ struct cbfs_optionrom *orom;
+ u8 *src;
+
+ sprintf(name,"pci%04x,%04x.rom", vendor, device);
+
+ orom = (struct cbfs_optionrom *)
+ cbfs_find_file(name, CBFS_TYPE_OPTIONROM);
+
+ if (orom == NULL)
+ return NULL;
+
+ /* They might have specified a dest address. If so, we can decompress.
+ * If not, there's not much hope of decompressing or relocating the rom.
+ * in the common case, the expansion rom is uncompressed, we
+ * pass 0 in for the dest, and all we have to do is find the rom and
+ * return a pointer to it.
+ */
+
+ /* BUG: the cbfstool is (not yet) including a cbfs_optionrom header */
+ src = ((unsigned char *) orom); // + sizeof(struct cbfs_optionrom);
+
+ if (! dest)
+ return src;
+
+ if (cbfs_decompress(ntohl(orom->compression),
+ src,
+ dest,
+ ntohl(orom->len)))
+ return NULL;
+
+ return dest;
+}
+
+void * cbfs_load_payload(struct lb_memory *lb_mem, const char *name)
+{
+ int selfboot(struct lb_memory *mem, struct cbfs_payload *payload);
+ struct cbfs_payload *payload = (struct cbfs_payload *)
+ cbfs_find_file(name, CBFS_TYPE_PAYLOAD);
+
+ struct cbfs_payload_segment *segment, *first_segment;
+
+ if (payload == NULL)
+ return (void *) -1;
+ printk_debug("Got a payload\n");
+ first_segment = segment = &payload->segments;
+ selfboot(lb_mem, payload);
+ printk_emerg("SELFBOOT RETURNED!\n");
+
+ return (void *) -1;
+}
+
+void * cbfs_load_stage(const char *name)
+{
+ struct cbfs_stage *stage = (struct cbfs_stage *)
+ cbfs_find_file(name, CBFS_TYPE_STAGE);
+ /* this is a mess. There is no ntohll. */
+ /* for now, assume compatible byte order until we solve this. */
+ u32 entry;
+
+ if (stage == NULL)
+ return (void *) -1;
+
+ printk_info("Stage: load @ %d/%d bytes, enter @ %llx\n",
+ ntohl((u32) stage->load), ntohl(stage->memlen),
+ stage->entry);
+ memset((void *) ntohl((u32) stage->load), 0, ntohl(stage->memlen));
+
+ if (cbfs_decompress(ntohl(stage->compression),
+ ((unsigned char *) stage) +
+ sizeof(struct cbfs_stage),
+ (void *) ntohl((u32) stage->load),
+ ntohl(stage->len)))
+ return (void *) -1;
+
+ entry = stage->entry;
+// return (void *) ntohl((u32) stage->entry);
+ return (void *) entry;
+}
+
+void * cbfs_get_file(const char *name)
+{
+ return cbfs_find(name);
+}
+
+int cbfs_execute_stage(const char *name)
+{
+ struct cbfs_stage *stage = (struct cbfs_stage *)
+ cbfs_find_file(name, CBFS_TYPE_STAGE);
+
+ if (stage == NULL)
+ return 1;
+
+ if (ntohl(stage->compression) != CBFS_COMPRESS_NONE) {
+ printk_info( "CBFS: Unable to run %s: Compressed file"
+ "Not supported for in-place execution\n", name);
+ return 1;
+ }
+
+ /* FIXME: This isn't right */
+ printk_info( "CBFS: run @ %p\n", (void *) ntohl((u32) stage->entry));
+ return run_address((void *) ntohl((u32) stage->entry));
+}
+
+/**
+ * run_address is passed the address of a function taking no parameters and
+ * jumps to it, returning the result.
+ * @param f the address to call as a function.
+ * returns value returned by the function.
+ */
+
+int run_address(void *f)
+{
+ int (*v) (void);
+ v = f;
+ return v();
+}
+
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1 # Override this in targets/*/Config.lb.
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default MAXIMUM_CONSOLE_LOGLEVEL = 9
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
#
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default MAXIMUM_CONSOLE_LOGLEVEL = 9
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_PIRQ_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses USE_FAILOVER_IMAGE
default MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON"
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default MAXIMUM_CONSOLE_LOGLEVEL = 8
default MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON"
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default MAXIMUM_CONSOLE_LOGLEVEL = 9
default MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON"
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1 # Override this in targets/*/Config.lb.
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_UDELAY_TSC=1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default MAXIMUM_CONSOLE_LOGLEVEL = 6
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default MAXIMUM_CONSOLE_LOGLEVEL = 6
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses PCIC0_CFGADDR
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses PCIC0_CFGDATA
uses ISA_IO_BASE
uses ISA_MEM_BASE
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses DEFAULT_CONSOLE_LOGLEVEL
uses MAXIMUM_CONSOLE_LOGLEVEL
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
default CONFIG_CONSOLE_SERIAL8250=1
default DEFAULT_CONSOLE_LOGLEVEL=8
default MAXIMUM_CONSOLE_LOGLEVEL=8
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
## ROM_SIZE is the size of boot ROM that this board will use.
default ROM_SIZE = 256*1024
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
uses HAVE_PIRQ_TABLE
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses MMCONF_SUPPORT
uses MMCONF_BASE_ADDRESS
uses CONFIG_GFXUMA
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
#
uses MAINBOARD
default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
#
-# ROMFS
+# CBFS
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
### End Options.lb
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
## Based on Options.lb from AMD's DB800 mainboard.
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default MAXIMUM_CONSOLE_LOGLEVEL = 8
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
## Based on Options.lb from AMD's DB800 mainboard.
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default MAXIMUM_CONSOLE_LOGLEVEL = 8
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses CONFIG_SANDPOINT_ALTIMUS
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses CONFIG_SANDPOINT_TALUS
uses CONFIG_SANDPOINT_UNITY
uses CONFIG_SANDPOINT_VALIS
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses ISA_IO_BASE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses ISA_MEM_BASE
uses PCIC0_CFGADDR
uses PCIC0_CFGDATA
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses USE_FAILOVER_IMAGE
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses USE_FAILOVER_IMAGE
default MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON"
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses CC
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses CONFIG_CONSOLE_SERIAL8250
uses CONFIG_CONSOLE_VGA
uses CONFIG_COMPRESSED_PAYLOAD_LZMA
default MAINBOARD_VENDOR = "RCA"
default MAINBOARD_PART_NUMBER = "RM4100"
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default HOSTCC="gcc"
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default MAXIMUM_CONSOLE_LOGLEVEL = 6
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses CC
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses CONFIG_CONSOLE_SERIAL8250
uses CONFIG_CONSOLE_VGA
uses CONFIG_COMPRESSED_PAYLOAD_LZMA
default MAINBOARD_VENDOR = "THOMSON"
default MAINBOARD_PART_NUMBER = "IP1000"
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses TTYS0_DIV
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses TTYS0_BASE
uses CONFIG_BRIQ_750FX
uses CONFIG_BRIQ_7400
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default CONFIG_PCI_ROM_RUN = 1
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses HAVE_ACPI_TABLES
uses HAVE_ACPI_RESUME
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
### End Options.lb
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
default HAVE_HARD_RESET = 0
default HAVE_PIRQ_TABLE = 1
default IRQ_SLOT_COUNT = 9
-default HAVE_ACPI_TABLES = 0
+default HAVE_ACPI_TABLES = 1
default HAVE_OPTION_TABLE = 1
default ROM_IMAGE_SIZE = 64 * 1024
default FALLBACK_SIZE = ROM_SIZE
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses HAVE_MP_TABLE
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
uses MAXIMUM_CONSOLE_LOGLEVEL
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses DEFAULT_CONSOLE_LOGLEVEL
uses CONFIG_CONSOLE_SERIAL8250
uses TTYS0_BAUD
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
##
uses CONFIG_SMP
-uses CONFIG_ROMFS
+uses CONFIG_CBFS
uses HAVE_MP_TABLE
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
#
-# ROMFS
+# CBFS
#
#
-default CONFIG_ROMFS=0
+default CONFIG_CBFS=0
end
file = safe_open(makefilepath, 'w+')
writemakefileheader(file, makefilepath)
- # Hack to get the necessary settings (CONFIG_ROMFS):
+ # Hack to get the necessary settings (CONFIG_CBFS):
file.write("include %s/Makefile.settings\n\n" % romimages.keys()[0])
# main rule
- file.write("ifeq \"$(CONFIG_ROMFS)\" \"1\"\n")
+ file.write("ifeq \"$(CONFIG_CBFS)\" \"1\"\n")
file.write("\nall: ")
for i in buildroms:
file.write(" %sfs" % i.name)
file.write("\n")
file.write("endif\n\n")
- # romtool rules
- file.write("\nromtool:\n\tmkdir -p tools/lzma\n\t$(MAKE) -C $(TOP)/util/romtool obj=$(shell pwd)\n\n")
+ # cbfstool rules
+ file.write("\ncbfstool:\n\tmkdir -p tools/lzma\n\t$(MAKE) -C $(TOP)/util/cbfstool obj=$(shell pwd)\n\n")
file.write("include Makefile.settings\n\n")
for i, o in romimages.items():
romsize = getoption("ROM_SIZE", image)
# i.name? That can not be right, can it?
- file.write("%sfs: %s romtool\n" %(i.name,i.name));
- file.write("\trm -f coreboot.romfs\n");
- file.write("\t./romtool %sfs create %s %s %s.bootblock\n" % (i.name, romsize, bootblocksize, i.name))
+ file.write("%sfs: %s cbfstool\n" %(i.name,i.name));
+ file.write("\trm -f coreboot.cbfs\n");
+ file.write("\t./cbfstool %sfs create %s %s %s.bootblock\n" % (i.name, romsize, bootblocksize, i.name))
for i in buildroms:
for j in i.roms:
#failover is a hack that will go away soon.
if (j != "failover") and (rommapping[j] != "/dev/null"):
- file.write("\tif [ -f %s/romfs-support ]; then ./romtool %sfs add-payload %s %s/payload `cat %s/romfs-support`; fi\n" % (j, i.name, rommapping[j], j, j))
- file.write("\t ./romtool %sfs print\n" % i.name)
+ file.write("\tif [ -f %s/cbfs-support ]; then ./cbfstool %sfs add-payload %s %s/payload `cat %s/cbfs-support`; fi\n" % (j, i.name, rommapping[j], j, j))
+ file.write("\t ./cbfstool %sfs print\n" % i.name)
- file.write(".PHONY: all clean romtool")
+ file.write(".PHONY: all clean cbfstool")
for i in romimages.keys():
file.write(" %s-clean" % i)
for i, o in romimages.items():
projects / coreboot.git / commitdiff