Intel northbridge I945: Apply un-written naming rules

Use NORTHBRIDGE_INTEL_I945 to select the driver directory for build.

Use _SUBTYPE_945GC and _SUBTYPE_945GM to define at compile-time
which model of I945 the driver is built for.

Change-Id: I11b1e0998d0fc28f8946bad4f0989036a9b18af4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/684
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

diff --git a/src/mainboard/getac/p470/Kconfig b/src/mainboard/getac/p470/Kconfig
index 6ca11e5074f3dccbbd4cf7480b49f9b3dd4965ee..42ce0e031eb3db28bd6660c5f7d90d5d950dff4c 100644 (file)
--- a/src/mainboard/getac/p470/Kconfig
+++ b/src/mainboard/getac/p470/Kconfig
@@ -22,7 +22,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        def_bool y
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
-       select NORTHBRIDGE_INTEL_I945GM
+       select NORTHBRIDGE_INTEL_I945
+       select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
        select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SOUTHBRIDGE_TI_PCIXX12

diff --git a/src/mainboard/ibase/mb899/Kconfig b/src/mainboard/ibase/mb899/Kconfig
index ac87466fda671cd6492618c67075d74678a67d74..58d1d995f2b1d1dac05859dc2cd36aa13ce5ced0 100644 (file)
--- a/src/mainboard/ibase/mb899/Kconfig
+++ b/src/mainboard/ibase/mb899/Kconfig
@@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        def_bool y
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
-       select NORTHBRIDGE_INTEL_I945GM
+       select NORTHBRIDGE_INTEL_I945
+       select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
        select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SUPERIO_WINBOND_W83627EHG

diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig
index efc8025bb803ece4c5803679bd596d43be494474..32ef3e1df805333c08b77b57a06ea2ff6d2c0935 100644 (file)
--- a/src/mainboard/intel/d945gclf/Kconfig
+++ b/src/mainboard/intel/d945gclf/Kconfig
@@ -22,7 +22,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        def_bool y
        select ARCH_X86
        select CPU_INTEL_SOCKET_441
-       select NORTHBRIDGE_INTEL_I945GC
+       select NORTHBRIDGE_INTEL_I945
+       select NORTHBRIDGE_INTEL_SUBTYPE_I945GC
        select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SUPERIO_SMSC_LPC47M15X

diff --git a/src/mainboard/kontron/986lcd-m/Kconfig b/src/mainboard/kontron/986lcd-m/Kconfig
index ec5c07317e271d7bc01775a3a761825a0f6308e2..e50bf1f5aaa2aed33cc7d955fefef17fcda6d036 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/Kconfig
+++ b/src/mainboard/kontron/986lcd-m/Kconfig
@@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        def_bool y
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
-       select NORTHBRIDGE_INTEL_I945GM
+       select NORTHBRIDGE_INTEL_I945
+       select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
        select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SUPERIO_WINBOND_W83627THG

diff --git a/src/mainboard/lenovo/t60/Kconfig b/src/mainboard/lenovo/t60/Kconfig
index d1abcf656aca7d2e86836079cc0e28ce94420bf5..8bb2d2d7919757d102795523d4bd4a798d536fdb 100644 (file)
--- a/src/mainboard/lenovo/t60/Kconfig
+++ b/src/mainboard/lenovo/t60/Kconfig
@@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        def_bool y
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
-       select NORTHBRIDGE_INTEL_I945GM
+       select NORTHBRIDGE_INTEL_I945
+       select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
        select SOUTHBRIDGE_INTEL_I82801GX
        select SUPERIO_NSC_PC87382
        select SUPERIO_NSC_PC87384

diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig
index 69f83a8b2483642c60d0c677c160168ed4f8c8f1..3fdfe2f892c008d3b73c337ff36f7538930caea7 100644 (file)
--- a/src/mainboard/lenovo/x60/Kconfig
+++ b/src/mainboard/lenovo/x60/Kconfig
@@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        def_bool y
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
-       select NORTHBRIDGE_INTEL_I945GM
+       select NORTHBRIDGE_INTEL_I945
+       select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
        select SOUTHBRIDGE_INTEL_I82801GX
        select SOUTHBRIDGE_RICOH_RL5C476
        select SUPERIO_NSC_PC87382

diff --git a/src/mainboard/roda/rk886ex/Kconfig b/src/mainboard/roda/rk886ex/Kconfig
index d5de7dc31132212285a295fe4f0f4a4faf93bc68..53b475ceca0fd9dd3875a754543aa33fe77e5efe 100644 (file)
--- a/src/mainboard/roda/rk886ex/Kconfig
+++ b/src/mainboard/roda/rk886ex/Kconfig
@@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        def_bool y
        select ARCH_X86
        select CPU_INTEL_SOCKET_MFCPGA478
-       select NORTHBRIDGE_INTEL_I945GM
+       select NORTHBRIDGE_INTEL_I945
+       select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
        select CHECK_SLFRCS_ON_RESUME
        select SOUTHBRIDGE_INTEL_I82801GX
        select SOUTHBRIDGE_TI_PCI7420

diff --git a/src/northbridge/intel/Makefile.inc b/src/northbridge/intel/Makefile.inc
index c599dabf22f7ad14c4eff60a95c4cf9f3e7ee963..6153052e4d123f5fa2790d3dd1c51b1070acb7f6 100644 (file)
--- a/src/northbridge/intel/Makefile.inc
+++ b/src/northbridge/intel/Makefile.inc
@@ -8,7 +8,6 @@ subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I440LX) += i440lx
 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82810) += i82810
 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82830) += i82830
 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855) += i855
-subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945GC) += i945
-subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945GM) += i945
+subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945) += i945
 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_SCH) += sch
 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I5000) += i5000

diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index 42cc7ce17466bc76be525e9bbf0476961f69bbb4..093411faae7bb5a8a1699ccc43c215847a736ea0 100644 (file)
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -17,15 +17,19 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-config NORTHBRIDGE_INTEL_I945GC
+config NORTHBRIDGE_INTEL_I945
        bool
-       select HAVE_DEBUG_RAM_SETUP
 
-config NORTHBRIDGE_INTEL_I945GM
-       bool
+if NORTHBRIDGE_INTEL_I945
+
+config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
+       def_bool y
        select HAVE_DEBUG_RAM_SETUP
 
-if NORTHBRIDGE_INTEL_I945GC || NORTHBRIDGE_INTEL_I945GM
+config NORTHBRIDGE_INTEL_SUBTYPE_I945GC
+       def_bool n
+config NORTHBRIDGE_INTEL_SUBTYPE_I945GM
+       def_bool n
 
 config VGA_BIOS_ID
        string

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 14c66c4e218dae1868c9c54eb2544b03ac386c26..f27dca0ac3c2e6215c69fe5efc915a9faef55017 100644 (file)
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -91,7 +91,7 @@ static void i945m_detect_chipset(void)
                printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8);      /* Others reserved. */
        }
        printk(BIOS_DEBUG, "\n");
-#if CONFIG_NORTHBRIDGE_INTEL_I945GC
+#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC
        printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n");
 #endif
 }
@@ -140,7 +140,7 @@ static void i945_detect_chipset(void)
                printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8);      /* Others reserved. */
        }
        printk(BIOS_DEBUG, "\n");
-#if CONFIG_NORTHBRIDGE_INTEL_I945GM
+#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
        printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n");
 #endif
 }

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index a4512d7ba80743c5d5561fb4d5cffe955399b513..478a9c8b70c7e6f297d308f19d19660f3c6d017b 100644 (file)
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -113,7 +113,7 @@ void sdram_dump_mchbar_registers(void)
 static int memclk(void)
 {
        int offset = 0;
-#if CONFIG_NORTHBRIDGE_INTEL_I945GM
+#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
        offset++;
 #endif
        switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) {
@@ -125,7 +125,7 @@ static int memclk(void)
        return -1;
 }
 
-#if CONFIG_NORTHBRIDGE_INTEL_I945GM
+#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
 static u16 fsbclk(void)
 {
        switch (MCHBAR32(CLKCFG) & 7) {
@@ -136,7 +136,7 @@ static u16 fsbclk(void)
        }
        return 0xffff;
 }
-#elif CONFIG_NORTHBRIDGE_INTEL_I945GC
+#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC
 static u16 fsbclk(void)
 {
        switch (MCHBAR32(CLKCFG) & 7) {
@@ -1075,7 +1075,7 @@ static const u32 *slew_group_lookup(int dual_channel, int index)
        return nc;
 }
 
-#if CONFIG_NORTHBRIDGE_INTEL_I945GM
+#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
 /* Strength multiplier tables */
 static const u8 dual_channel_strength_multiplier[] = {
        0x44, 0x11, 0x11, 0x11, 0x44, 0x44, 0x44, 0x11,
@@ -1130,7 +1130,7 @@ static const u8 single_channel_strength_multiplier[] = {
        0x33, 0x00, 0x00, 0x11, 0x00, 0x44, 0x33, 0x11,
        0x33, 0x00, 0x11, 0x00, 0x44, 0x44, 0x33, 0x11
 };
-#elif CONFIG_NORTHBRIDGE_INTEL_I945GC
+#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC
 static const u8 dual_channel_strength_multiplier[] = {
        0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22,
        0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22,
@@ -2186,7 +2186,7 @@ static void sdram_program_clock_crossing(void)
        /**
         * We add the indices according to our clocks from CLKCFG.
         */
-#if CONFIG_NORTHBRIDGE_INTEL_I945GM
+#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
        static const u32 data_clock_crossing[] = {
                0x00100401, 0x00000000, /* DDR400 FSB400 */
                0xffffffff, 0xffffffff, /*  nonexistant  */
@@ -2231,7 +2231,7 @@ static void sdram_program_clock_crossing(void)
                0xffffffff, 0xffffffff, /*  nonexistant  */
        };
 
-#elif CONFIG_NORTHBRIDGE_INTEL_I945GC
+#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC
        /* i945 G/P */
        static const u32 data_clock_crossing[] = {
                0xffffffff, 0xffffffff, /*  nonexistant  */
@@ -2822,9 +2822,9 @@ static void sdram_enable_memory_clocks(struct sys_info *sysinfo)
 {
        u8 clocks[2] = { 0, 0 };
 
-#if CONFIG_NORTHBRIDGE_INTEL_I945GM
+#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
 #define CLOCKS_WIDTH 2
-#elif CONFIG_NORTHBRIDGE_INTEL_I945GC
+#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC
 #define CLOCKS_WIDTH 3
 #endif
        if (sysinfo->dimm[0] != SYSINFO_DIMM_NOT_POPULATED)