2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2009 coresystems GmbH
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; version 2 of the License.
10 ## This program is distributed in the hope that it will be useful,
11 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
12 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 ## GNU General Public License for more details.
15 ## You should have received a copy of the GNU General Public License
16 ## along with this program; if not, write to the Free Software
17 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 if BOARD_INTEL_D945GCLF
21 config BOARD_SPECIFIC_OPTIONS # dummy
24 select CPU_INTEL_SOCKET_441
25 select NORTHBRIDGE_INTEL_I945
26 select NORTHBRIDGE_INTEL_SUBTYPE_I945GC
27 select CHECK_SLFRCS_ON_RESUME
28 select SOUTHBRIDGE_INTEL_I82801GX
29 select SUPERIO_SMSC_LPC47M15X
31 select GENERATE_ACPI_TABLES
32 select GENERATE_PIRQ_TABLE
33 select GENERATE_MP_TABLE
34 select HAVE_OPTION_TABLE
35 select HAVE_PIRQ_TABLE
37 select HAVE_ACPI_TABLES
38 select HAVE_ACPI_RESUME
40 select HAVE_SMI_HANDLER
41 select BOARD_ROMSIZE_KB_512
43 select CHANNEL_XOR_RANDOMIZATION
47 default intel/d945gclf
49 config MAINBOARD_PART_NUMBER
53 config MMCONF_BASE_ADDRESS
65 config MAX_PHYSICAL_CPUS
69 endif # BOARD_INTEL_D945GCLF