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(parent: 2006b38) | patch
Initial AMD Barcelona support for rev Bx.
authorMarc Jones <marc.jones@amd.com>
Wed, 19 Dec 2007 01:32:08 +0000 (01:32 +0000)
committerMarc Jones <marc.jones@amd.com>
Wed, 19 Dec 2007 01:32:08 +0000 (01:32 +0000)
commit8ae8c8822068ef1722c08073ffa4ecc25633cbee
tree8c7bbf2f7b791081e486439a9b7ffb2fd6e649actree | snapshot
parent2006b38fed2f5f3680de1736f7fc878823f2f93bcommit | diff
Initial AMD Barcelona support for rev Bx.
These are the core files for HyperTransport, DDR2 Memory, and multi-core initialization.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Reviewed-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Myles Watson <myles@pel.cs.byu.edu>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
90 files changed:
src/config/Options.lb diff | blob | history
src/cpu/amd/car/cache_as_ram.inc diff | blob | history
src/cpu/amd/microcode/microcode.c diff | blob | history
src/cpu/amd/model_10xxx/Config.lb [new file with mode: 0644] blob
src/cpu/amd/model_10xxx/apic_timer.c [new file with mode: 0644] blob
src/cpu/amd/model_10xxx/fidvid.c [new file with mode: 0644] blob
src/cpu/amd/model_10xxx/fidvid_common.c [new file with mode: 0644] blob
src/cpu/amd/model_10xxx/init_cpus.c [new file with mode: 0644] blob
src/cpu/amd/model_10xxx/mc_patch_01000018.h [new file with mode: 0644] blob
src/cpu/amd/model_10xxx/mc_patch_01000020.h [new file with mode: 0644] blob
src/cpu/amd/model_10xxx/mc_patch_01000033.h [new file with mode: 0644] blob
src/cpu/amd/model_10xxx/mc_patch_01000035.h [new file with mode: 0644] blob
src/cpu/amd/model_10xxx/model_10xxx_init.c [new file with mode: 0644] blob
src/cpu/amd/model_10xxx/pstate.c [new file with mode: 0644] blob
src/cpu/amd/model_10xxx/update_microcode.c [new file with mode: 0644] blob
src/cpu/amd/quadcore/Config.lb [new file with mode: 0644] blob
src/cpu/amd/quadcore/amd_sibling.c [new file with mode: 0644] blob
src/cpu/amd/quadcore/quadcore.c [new file with mode: 0644] blob
src/cpu/amd/quadcore/quadcore_id.c [new file with mode: 0644] blob
src/cpu/amd/socket_F_1207/Config.lb [new file with mode: 0644] blob
src/cpu/amd/socket_F_1207/chip.h [new file with mode: 0644] blob
src/cpu/amd/socket_F_1207/socket_F_1207.c [new file with mode: 0644] blob
src/include/cpu/amd/amdfam10_sysconf.h [new file with mode: 0644] blob
src/include/cpu/amd/model_10xxx_msr.h [new file with mode: 0644] blob
src/include/cpu/amd/model_10xxx_rev.h [new file with mode: 0644] blob
src/include/cpu/amd/quadcore.h [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/Config.lb [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/amdfam10.h [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/amdfam10_acpi.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/amdfam10_conf.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/amdfam10_nums.h [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/amdfam10_pci.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/chip.h [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/debug.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/early_ht.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/get_pci1234.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/misc_control.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/northbridge.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/northbridge.h [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/raminit.h [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/raminit_amdmct.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/reset_test.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/resourcemap.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/root_complex/Config.lb [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/root_complex/chip.h [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/setup_resource_map.c [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/spd_ddr2.h [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/ssdt.dsl [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/sspr1.dsl [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/sspr2.dsl [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/sspr3.dsl [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/sspr4.dsl [new file with mode: 0644] blob
src/northbridge/amd/amdfam10/sspr5.dsl [new file with mode: 0644] blob
src/northbridge/amd/amdht/AsPsDefs.h [new file with mode: 0644] blob
src/northbridge/amd/amdht/AsPsNb.c [new file with mode: 0644] blob
src/northbridge/amd/amdht/AsPsNb.h [new file with mode: 0644] blob
src/northbridge/amd/amdht/comlib.c [new file with mode: 0644] blob
src/northbridge/amd/amdht/comlib.h [new file with mode: 0644] blob
src/northbridge/amd/amdht/h3ffeat.h [new file with mode: 0644] blob
src/northbridge/amd/amdht/h3finit.c [new file with mode: 0644] blob
src/northbridge/amd/amdht/h3finit.h [new file with mode: 0644] blob
src/northbridge/amd/amdht/h3gtopo.h [new file with mode: 0644] blob
src/northbridge/amd/amdht/h3ncmn.c [new file with mode: 0644] blob
src/northbridge/amd/amdht/h3ncmn.h [new file with mode: 0644] blob
src/northbridge/amd/amdht/ht_wrapper.c [new file with mode: 0644] blob
src/northbridge/amd/amdht/porting.h [new file with mode: 0644] blob
src/northbridge/amd/amdmct/amddefs.h [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mct.h [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mct_d.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mct_d.h [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mct_d_gcc.h [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mct_fd.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctardk3.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctardk4.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctchi_d.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctcsi_d.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctdqs_d.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctecc_d.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctgr.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mcthdi.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctmtr_d.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctndi_d.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctpro_d.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctsrc.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctsrc1p.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mctsrc2p.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/mct/mcttmrl.c [new file with mode: 0644] blob
src/northbridge/amd/amdmct/wrappers/mcti.h [new file with mode: 0644] blob
src/northbridge/amd/amdmct/wrappers/mcti_d.c [new file with mode: 0644] blob
my coreboot WIP stuff (asus m5a99x-evo board)