1947bde77ba738377e2817691e3c0acee3d1a8eb
[calu.git] / cpu / src / extension_b.vhd
1 library IEEE;
2 use IEEE.std_logic_1164.all;
3 use IEEE.numeric_std.all;
4
5 use work.common_pkg.all;
6 use work.core_pkg.all;
7
8 use work.mem_pkg.all;
9 use work.extension_pkg.all;
10
11 architecture behav of extension is
12
13
14 begin
15
16
17 syn: process(clk, reset)
18
19 begin
20
21         if (reset = RESET_VALUE) then
22                 
23         elsif rising_edge(clk) then
24                 
25         end if;
26         
27 end process; 
28
29
30 end behav;
31