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1947bde77ba738377e2817691e3c0acee3d1a8eb
[calu.git]
/
cpu
/
src
/
extension_b.vhd
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.numeric_std.all;
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use work.common_pkg.all;
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use work.core_pkg.all;
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use work.mem_pkg.all;
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use work.extension_pkg.all;
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architecture behav of extension is
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begin
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syn: process(clk, reset)
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begin
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if (reset = RESET_VALUE) then
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elsif rising_edge(clk) then
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end if;
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end process;
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end behav;
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