display: nicht jede zeile neu... ausserdem vorerst fixe werte im ram

diff --git a/src/display.vhd b/src/display.vhd
index d01b1150a45716f6fc9d8785531f9a65975f4f7d..507c7397427c552f30c3cc342596e8a9fab302c5 100644 (file)
--- a/src/display.vhd
+++ b/src/display.vhd
@@ -108,11 +108,12 @@ begin
                                end if;
                        when S_NOP1 =>
                                if free = '1' then
-                                       if unsigned(d_spalte_int) = 71 then
-                                               state_next <= SIDLE;
-                                       else
-                                               state_next <= S_COUNTUP;
-                                       end if;
+                                       state_next <= SIDLE;
+                                       --if unsigned(d_spalte_int) = 71 then
+                                       --      state_next <= SIDLE;
+                                       --else
+                                       --      state_next <= S_COUNTUP;
+                                       --end if;
                                end if;
                end case;
        end process;
@@ -131,7 +132,7 @@ begin
                        when SIDLE =>
                                null;
                        when S_NEW_INPUT =>
-                               d_spalte_next <= (others => '0');
+                               null;
                        when S_NEW_RESULT =>
                                d_spalte_next <= (others => '0');
                                case d_zeile_int is

diff --git a/src/history.vhd b/src/history.vhd
index cd6dbcda6e6f2fc7e3a7a79b26256c56ed999e2f..4572456eccd9c9521ca0dc45786c6051198a886c 100644 (file)
--- a/src/history.vhd
+++ b/src/history.vhd
@@ -158,12 +158,12 @@ begin
                        when S_S_INIT =>
                                null;
                        when S_S_WRITE =>
-                               wr_next <= '1';
+                               -- wr_next <= '1';
                                address_next <= '0' & s_cnt_int;
                                data_in_next <= s_char;
                                s_cnt_next <= std_logic_vector(unsigned(s_cnt_int) + 1);
                        when S_S_BS =>
-                               wr_next <= '1';
+                               -- wr_next <= '1';
                                address_next <= '0' & std_logic_vector(unsigned(s_cnt_int) - 1);
                                data_in_next <= (others => '0');
                                if unsigned(s_cnt_int) /= 0 then

diff --git a/src/sp_ram.vhd b/src/sp_ram.vhd
index 4d39020db802fbca901b720e72ba6143a3bb38f2..de0f66892b3981fe84b63504dfa80c485bee5558 100644 (file)
--- a/src/sp_ram.vhd
+++ b/src/sp_ram.vhd
@@ -20,7 +20,8 @@ end entity sp_ram;
 architecture beh of sp_ram is
        subtype RAM_ENTRY_TYPE is hbyte;
        type RAM_TYPE is array (1 to (2 ** ADDR_WIDTH)) of RAM_ENTRY_TYPE;
-       signal ram : RAM_TYPE := (others => x"00");
+       signal ram : RAM_TYPE := (1 => x"41", 2 => x"42", 3 => x"43", 4 => x"44",
+       5 => x"45", 6 => x"46", 7 => x"47", 8 => x"48", 9 => x"49", 10 => x"50", others => x"00");
 begin
        process(sys_clk)
        begin