This patch sets max freq defaults for ddr2 and ddr3for fam10.
[coreboot.git] / src / northbridge / amd / amdmct / wrappers / mcti_d.c
2011-06-03 Marc JonesThis patch sets max freq defaults for ddr2 and ddr3for...
2011-02-28 Xavi Drudis FerranImproving BKDG implementation of P-states,
2011-02-28 Xavi Drudis FerranImproving BKDG implementation of P-states,
2010-11-13 Scott DuplichanMTRR related improvements for AMD family 10h and family...
2010-08-30 Kerry SheMulti-DIMMS on AMD ddr3 MCT channel B works.
2010-08-22 Xavi Drudis Ferrandocumented workaround erratum 414, see
2010-08-22 Xavi Drudis Ferrandocumented workaround erratum 372, see
2010-07-08 Stefan ReinauerFix all warnings in the tree
2010-07-08 Stefan Reinauerget rid of even more fam10 and k8 warnings.
2010-04-23 Zheng BaoDDR3 support for AMD Fam10.
2010-04-16 Stefan Reinauerzero warnings days: unify mp tables. fix warnings.
2010-04-15 Myles WatsonRemove a few more warnings from fam10.
2009-08-24 Zheng BaoThis patch is about the DA-C2 and RB-C2. Chip with...
2009-08-19 Zheng BaoThe Errata350 is "Write 0000_8000h to register F2x...
2009-07-01 Zheng BaoAdd AMD family 10 AM2r2 support.
2009-06-06 Marco SchmidtFix for Erratum 350 for AMD Fam10h CPUs.
2008-12-05 Stefan ReinauerFixes to AMD MCT code, found by Marco Schmidt <mschmidt...
2008-04-11 Marc Jones (marc... Bring Fam10 memory controller init up to date with...
2008-01-18 Stefan ReinauerPlease bear with me - another rename checkin. This...
2007-12-19 Marc JonesInitial AMD Barcelona support for rev Bx.