wurms gitweb - coreboot.git/history - src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram

2009-11-06	Myles Watson	Split the two usages of __ROMCC__:	blob \| commitdiff \| raw
2009-09-23	Stefan Reinauer	simplify source tree hierarchy: move files from sdram...	blob \| commitdiff \| raw \| diff to current
2009-06-30	Stefan Reinauer	This patch unifies the use of config options in v2...	blob \| commitdiff \| raw \| diff to current
2009-04-30	Patrick Georgi	Refactor copy_and_run so that it uses a single code...	blob \| commitdiff \| raw \| diff to current
2009-03-13	Stefan Reinauer	This, ladies and gentlement, is commit #4000.	blob \| commitdiff \| raw \| diff to current
2008-04-25	Marc Jones	Remove inline from FAM10 CPU initialization functions.	blob \| commitdiff \| raw \| diff to current
2008-04-22	Marc Jones	Find matching settings for each CPUs FID, VID, and...	blob \| commitdiff \| raw \| diff to current
2008-04-22	Marc Jones	Add early MSR and PCI register initialization.	blob \| commitdiff \| raw \| diff to current
2008-01-18	Stefan Reinauer	Please bear with me - another rename checkin. This...	blob \| commitdiff \| raw \| diff to current
2007-12-19	Marc Jones	Initial AMD Serengeti_Cheetah_FAM10 platform for Barcel...	blob \| commitdiff \| raw \| diff to current

my coreboot WIP stuff (asus m5a99x-evo board)