i945: fix tsc udelay()

The comparision is the wrong way round: as long as tsc
is below tsc1, the timeout is not reached

Change-Id: I75de74ef750b5a45be0156efaf10d7239a0b1136
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/530
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

diff --git a/src/northbridge/intel/i945/udelay.c b/src/northbridge/intel/i945/udelay.c
index 6b3882bc18532a0b3487d7f21c2c75cdd09cfb62..9170335bd58c56c5c5736a225a847904012c7739 100644 (file)
--- a/src/northbridge/intel/i945/udelay.c
+++ b/src/northbridge/intel/i945/udelay.c
@@ -78,7 +78,7 @@ void udelay(u32 us)
 
        do {
                tsc = rdtsc();
-       } while ((tsc.hi > tsc1.hi)
-                || ((tsc.hi == tsc1.hi) && (tsc.lo > tsc1.lo)));
+       } while ((tsc.hi < tsc1.hi)
+                || ((tsc.hi == tsc1.hi) && (tsc.lo < tsc1.lo)));
 
 }