0, //Descriptor flags
PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 8, 11),
//PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1)
- {ConnectorTypeDP, Aux1, Hdp1}
+ {ConnectorTypeHDMI, Aux1, Hdp1}
},
// Initialize Ddi descriptor (DDI interface Lanes 12:15, DdB, ...)
{
DESCRIPTOR_TERMINATE_LIST, //Descriptor flags !!!IMPORTANT!!! Terminate last element of array
PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 12, 15),
//PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux2, Hdp2)
- {ConnectorTypeDP, Aux2, Hdp2}
+ {ConnectorTypeHDMI, Aux2, Hdp2}
}
};
//#define BLDCFG_SET_HTCRC_SYNC_FLOOD FALSE
//#define BLDCFG_USE_UNIT_ID_CLUMPING FALSE
//#define BLDCFG_SYSTEM_PHYSICAL_SOCKET_MAP 0
-#define BLDCFG_CFG_GNB_HD_AUDIO FALSE//TRUE
+#define BLDCFG_CFG_GNB_HD_AUDIO TRUE
//#define BLDCFG_CFG_ABM_SUPPORT FALSE
//#define BLDCFG_CFG_DYNAMIC_REFRESH_RATE 0
//#define BLDCFG_CFG_LCD_BACK_LIGHT_CONTROL 0
} /* end AMRT */
/* The internal GFX bridge */
- Device(AGPB) {
+ Device(HDMI) {
Name(_ADR, 0x00010000)
Name(_PRW, Package() {0x18, 4})
Method(_PRT,0) {
- Return (APR1)
+ If(PMOD){ Return(APR1) } /* APIC mode */
+ Return (PR1) /* PIC Mode */
}
- } /* end AGPB */
+ } /* end HDMI */
/* The external GFX bridge */
Device(PBR2) {