select NORTHBRIDGE_AMD_AGESA_FAMILY14_ROOT_COMPLEX
select NORTHBRIDGE_AMD_AGESA_FAMILY14
select SOUTHBRIDGE_AMD_CIMX_SB800
- select SUPERIO_FINTEK_F81865F
select BOARD_HAS_FADT
select HAVE_BUS_CONFIG
select HAVE_OPTION_TABLE
device pci 14.1 on end # IDE 0x439c
device pci 14.2 on end # HDA 0x4383
device pci 14.3 on # LPC 0x439d
- chip superio/fintek/f81865f
- device pnp 4e.0 off # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 4e.3 off end # Parallel Port
- device pnp 4e.4 off end # Hardware Monitor
- device pnp 4e.5 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- end
- device pnp 4e.6 off end # GPIO
- device pnp 4e.a off end # PME
- device pnp 4e.10 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 4e.11 off # COM2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- end # f81865f
end #LPC
device pci 14.4 off end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0}
device pci 14.5 on end # USB 2
#include <console/loglevel.h>
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
-#include "superio/fintek/f81865f/f81865f_early_serial.c"
#include "cpu/x86/lapic/boot_cpu.c"
#include "sb_cimx.h"
#include "SBPLATFORM.h"
sb_Poweron_Init();
post_code(0x31);
- f81865f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
}