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(parent: 14cde9e) | patch
eric patch
authorYinghai Lu <yinghailu@gmail.com>
Fri, 8 Jul 2005 02:49:49 +0000 (02:49 +0000)
committerYinghai Lu <yinghailu@gmail.com>
Fri, 8 Jul 2005 02:49:49 +0000 (02:49 +0000)
commit13f1c2af8be2cd7f7e99a678f5d428a65b771811
tree27cad5581f1fa150f573149d48e82f70ba1b1d9ftree | snapshot
parent14cde9e96a777f9d75016a13b23fab0480515f58commit | diff
eric patch
        1. x86_setup_mtrr take address bit.
        2. generic ht, pcix, pcie beidge...
        3. scan bus and reset_bus
        4. ht read ctrl to decide if the ht chain
           is ready
        5. Intel e7520 and e7525 support
        6. new ich5r support
        7. intel sb 6300 support.

yhlu patch
1. split x86_setup_mtrrs to fixed and var
2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource
3. in_conherent.c K8_SCAN_PCI_BUS

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
315 files changed:
src/config/Options.lb diff | blob | history
src/cpu/amd/car/cache_as_ram_post.c diff | blob | history
src/cpu/amd/model_fxx/model_fxx_init.c diff | blob | history
src/cpu/amd/model_fxx/model_fxx_msr.h diff | blob | history
src/cpu/amd/mtrr/amd_mtrr.c diff | blob | history
src/cpu/intel/model_f0x/model_f0x_init.c diff | blob | history
src/cpu/intel/model_f1x/model_f1x_init.c diff | blob | history
src/cpu/intel/model_f2x/model_f2x_init.c diff | blob | history
src/cpu/intel/model_f3x/model_f3x_init.c diff | blob | history
src/cpu/intel/model_f4x/Config.lb [new file with mode: 0644] blob
src/cpu/intel/model_f4x/microcode_MBDF410D.h [new file with mode: 0644] blob
src/cpu/intel/model_f4x/model_f4x_init.c [new file with mode: 0644] blob
src/cpu/intel/socket_mPGA604_800Mhz/Config.lb diff | blob | history
src/cpu/x86/mtrr/earlymtrr.c diff | blob | history
src/cpu/x86/mtrr/mtrr.c diff | blob | history
src/devices/Config.lb diff | blob | history
src/devices/agp_device.c [new file with mode: 0644] blob
src/devices/device.c diff | blob | history
src/devices/device_util.c diff | blob | history
src/devices/hypertransport.c diff | blob | history
src/devices/pci_device.c diff | blob | history
src/devices/pciexp_device.c [new file with mode: 0644] blob
src/devices/pcix_device.c [new file with mode: 0644] blob
src/devices/pnp_device.c diff | blob | history
src/devices/root_device.c diff | blob | history
src/drivers/generic/debug/debug_dev.c diff | blob | history
src/include/cpu/x86/mtrr.h diff | blob | history
src/include/device/agp.h [new file with mode: 0644] blob
src/include/device/cardbus.h [new file with mode: 0644] blob
src/include/device/device.h diff | blob | history
src/include/device/hypertransport.h diff | blob | history
src/include/device/path.h diff | blob | history
src/include/device/pci.h diff | blob | history
src/include/device/pci_def.h diff | blob | history
src/include/device/pci_ids.h diff | blob | history
src/include/device/pciexp.h [new file with mode: 0644] blob
src/include/device/pcix.h [new file with mode: 0644] blob
src/include/device/resource.h diff | blob | history
src/include/part/fallback_boot.h diff | blob | history
src/include/part/watchdog.h [new file with mode: 0644] blob
src/lib/Config.lb diff | blob | history
src/lib/clog2.c diff | blob | history
src/lib/fallback_boot.c diff | blob | history
src/mainboard/Iwill/DK8S2/Config.lb diff | blob | history
src/mainboard/Iwill/DK8S2/Options.lb diff | blob | history
src/mainboard/Iwill/DK8S2/reset.c [new file with mode: 0644] blob
src/mainboard/Iwill/DK8X/Config.lb diff | blob | history
src/mainboard/Iwill/DK8X/Options.lb diff | blob | history
src/mainboard/Iwill/DK8X/reset.c [new file with mode: 0644] blob
src/mainboard/amd/quartet/Config.lb diff | blob | history
src/mainboard/amd/quartet/Options.lb diff | blob | history
src/mainboard/amd/quartet/reset.c [new file with mode: 0644] blob
src/mainboard/amd/serenade/Config.lb diff | blob | history
src/mainboard/amd/serenade/Options.lb diff | blob | history
src/mainboard/amd/serenade/reset.c [new file with mode: 0644] blob
src/mainboard/amd/solo/Config.lb diff | blob | history
src/mainboard/amd/solo/Options.lb diff | blob | history
src/mainboard/amd/solo/reset.c [new file with mode: 0644] blob
src/mainboard/arima/hdama/Config.lb diff | blob | history
src/mainboard/arima/hdama/Options.lb diff | blob | history
src/mainboard/arima/hdama/auto.c diff | blob | history
src/mainboard/arima/hdama/debug.c [new file with mode: 0644] blob
src/mainboard/arima/hdama/mptable.c diff | blob | history
src/mainboard/arima/hdama/reset.c [new file with mode: 0644] blob
src/mainboard/emulation/qemu-i386/Options.lb diff | blob | history
src/mainboard/ibm/e325/Config.lb diff | blob | history
src/mainboard/ibm/e325/Options.lb diff | blob | history
src/mainboard/ibm/e325/reset.c [new file with mode: 0644] blob
src/mainboard/intel/jarrell/Config.lb [new file with mode: 0644] blob
src/mainboard/intel/jarrell/Options.lb [new file with mode: 0644] blob
src/mainboard/intel/jarrell/auto.c [new file with mode: 0644] blob
src/mainboard/intel/jarrell/chip.h [new file with mode: 0644] blob
src/mainboard/intel/jarrell/cmos.layout [new file with mode: 0644] blob
src/mainboard/intel/jarrell/debug.c [new file with mode: 0644] blob
src/mainboard/intel/jarrell/failover.c [new file with mode: 0644] blob
src/mainboard/intel/jarrell/irq_tables.c [new file with mode: 0644] blob
src/mainboard/intel/jarrell/jarrell_fixups.c [new file with mode: 0644] blob
src/mainboard/intel/jarrell/mainboard.c [new file with mode: 0644] blob
src/mainboard/intel/jarrell/microcode_updates.c [new file with mode: 0644] blob
src/mainboard/intel/jarrell/mptable.c [new file with mode: 0644] blob
src/mainboard/intel/jarrell/power_reset_check.c [new file with mode: 0644] blob
src/mainboard/intel/jarrell/reset.c [new file with mode: 0644] blob
src/mainboard/intel/jarrell/watchdog.c [new file with mode: 0644] blob
src/mainboard/island/aruma/Config.lb diff | blob | history
src/mainboard/island/aruma/Options.lb diff | blob | history
src/mainboard/island/aruma/reset.c [new file with mode: 0644] blob
src/mainboard/newisys/khepri/Config.lb diff | blob | history
src/mainboard/newisys/khepri/Options.lb diff | blob | history
src/mainboard/newisys/khepri/reset.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/Config.lb [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/Options.lb [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/auto.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/chip.h [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/cmos.layout [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/debug.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/failover.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/irq_tables.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/mainboard.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/mptable.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/reset.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dai_g/watchdog.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/Config.lb [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/Options.lb [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/auto.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/chip.h [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/cmos.layout [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/debug.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/failover.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/irq_tables.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/mainboard.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/microcode_updates.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/mptable.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/reset.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/watchdog.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g/x6dhe_g_fixups.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/Config.lb [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/Options.lb [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/auto.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/auto.updated.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/chip.h [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/cmos.layout [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/debug.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/failover.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/irq_tables.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/mainboard.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/microcode_updates.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/mptable.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/reset.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/watchdog.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhe_g2/x6dhe_g2_fixups.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/Config.lb [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/Options.lb [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/auto.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/chip.h [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/cmos.layout [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/debug.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/failover.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/irq_tables.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/mainboard.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/microcode_updates.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/mptable.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/reset.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/watchdog.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig/x6dhr_fixups.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/Config.lb [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/Options.lb [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/auto.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/chip.h [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/cmos.layout [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/debug.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/failover.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/irq_tables.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/mainboard.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/microcode_updates.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/mptable.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/reset.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/watchdog.c [new file with mode: 0644] blob
src/mainboard/supermicro/x6dhr_ig2/x6dhr2_fixups.c [new file with mode: 0644] blob
src/mainboard/tyan/s2735/Config.lb diff | blob | history
src/mainboard/tyan/s2735/Options.lb diff | blob | history
src/mainboard/tyan/s2735/reset.c [new file with mode: 0644] blob
src/mainboard/tyan/s2850/Config.lb diff | blob | history
src/mainboard/tyan/s2850/Options.lb diff | blob | history
src/mainboard/tyan/s2850/auto.c diff | blob | history
src/mainboard/tyan/s2850/mptable.c diff | blob | history
src/mainboard/tyan/s2850/reset.c [new file with mode: 0644] blob
src/mainboard/tyan/s2875/Config.lb diff | blob | history
src/mainboard/tyan/s2875/Options.lb diff | blob | history
src/mainboard/tyan/s2875/auto.c diff | blob | history
src/mainboard/tyan/s2875/mptable.c diff | blob | history
src/mainboard/tyan/s2875/reset.c [new file with mode: 0644] blob
src/mainboard/tyan/s2880/Config.lb diff | blob | history
src/mainboard/tyan/s2880/Options.lb diff | blob | history
src/mainboard/tyan/s2880/auto.c diff | blob | history
src/mainboard/tyan/s2880/irq_tables.c diff | blob | history
src/mainboard/tyan/s2880/mptable.c diff | blob | history
src/mainboard/tyan/s2880/reset.c [new file with mode: 0644] blob
src/mainboard/tyan/s2881/Config.lb diff | blob | history
src/mainboard/tyan/s2881/Options.lb diff | blob | history
src/mainboard/tyan/s2881/auto.c diff | blob | history
src/mainboard/tyan/s2881/cache_as_ram_auto.c diff | blob | history
src/mainboard/tyan/s2881/mptable.c diff | blob | history
src/mainboard/tyan/s2881/reset.c [new file with mode: 0644] blob
src/mainboard/tyan/s2882/Config.lb diff | blob | history
src/mainboard/tyan/s2882/Options.lb diff | blob | history
src/mainboard/tyan/s2882/auto.c diff | blob | history
src/mainboard/tyan/s2882/cache_as_ram_auto.c diff | blob | history
src/mainboard/tyan/s2882/irq_tables.c diff | blob | history
src/mainboard/tyan/s2882/reset.c [new file with mode: 0644] blob
src/mainboard/tyan/s2885/Config.lb diff | blob | history
src/mainboard/tyan/s2885/Options.lb diff | blob | history
src/mainboard/tyan/s2885/auto.c diff | blob | history
src/mainboard/tyan/s2885/cache_as_ram_auto.c diff | blob | history
src/mainboard/tyan/s2885/mptable.c diff | blob | history
src/mainboard/tyan/s2885/reset.c [new file with mode: 0644] blob
src/mainboard/tyan/s2891/Config.lb diff | blob | history
src/mainboard/tyan/s2891/Options.lb diff | blob | history
src/mainboard/tyan/s2891/auto.c diff | blob | history
src/mainboard/tyan/s2891/cache_as_ram_auto.c diff | blob | history
src/mainboard/tyan/s2891/irq_tables.c diff | blob | history
src/mainboard/tyan/s2891/mptable.c diff | blob | history
src/mainboard/tyan/s2892/Options.lb diff | blob | history
src/mainboard/tyan/s2892/auto.c diff | blob | history
src/mainboard/tyan/s2892/cache_as_ram_auto.c diff | blob | history
src/mainboard/tyan/s2892/mptable.c diff | blob | history
src/mainboard/tyan/s2895/Options.lb diff | blob | history
src/mainboard/tyan/s2895/auto.c diff | blob | history
src/mainboard/tyan/s2895/cache_as_ram_auto.c diff | blob | history
src/mainboard/tyan/s2895/irq_tables.c diff | blob | history
src/mainboard/tyan/s2895/mptable.c diff | blob | history
src/mainboard/tyan/s4880/Config.lb diff | blob | history
src/mainboard/tyan/s4880/Options.lb diff | blob | history
src/mainboard/tyan/s4880/auto.c diff | blob | history
src/mainboard/tyan/s4880/cache_as_ram_auto.c diff | blob | history
src/mainboard/tyan/s4880/reset.c [new file with mode: 0644] blob
src/mainboard/tyan/s4882/Config.lb diff | blob | history
src/mainboard/tyan/s4882/Options.lb diff | blob | history
src/mainboard/tyan/s4882/auto.c diff | blob | history
src/mainboard/tyan/s4882/cache_as_ram_auto.c diff | blob | history
src/mainboard/tyan/s4882/reset.c [new file with mode: 0644] blob
src/northbridge/amd/amdk8/coherent_ht.c diff | blob | history
src/northbridge/amd/amdk8/debug.c diff | blob | history
src/northbridge/amd/amdk8/early_ht.c diff | blob | history
src/northbridge/amd/amdk8/incoherent_ht.c diff | blob | history
src/northbridge/amd/amdk8/misc_control.c diff | blob | history
src/northbridge/amd/amdk8/northbridge.c diff | blob | history
src/northbridge/amd/amdk8/setup_resource_map.c diff | blob | history
src/northbridge/intel/E7520/Config.lb [new file with mode: 0644] blob
src/northbridge/intel/E7520/chip.h [new file with mode: 0644] blob
src/northbridge/intel/E7520/e7520.h [new file with mode: 0644] blob
src/northbridge/intel/E7520/memory_initialized.c [new file with mode: 0644] blob
src/northbridge/intel/E7520/northbridge.c [new file with mode: 0644] blob
src/northbridge/intel/E7520/northbridge.h [new file with mode: 0644] blob
src/northbridge/intel/E7520/pciexp_porta.c [new file with mode: 0644] blob
src/northbridge/intel/E7520/pciexp_porta1.c [new file with mode: 0644] blob
src/northbridge/intel/E7520/pciexp_portb.c [new file with mode: 0644] blob
src/northbridge/intel/E7520/pciexp_portc.c [new file with mode: 0644] blob
src/northbridge/intel/E7520/raminit.c [new file with mode: 0644] blob
src/northbridge/intel/E7520/raminit.h [new file with mode: 0644] blob
src/northbridge/intel/E7520/raminit_test.c [new file with mode: 0644] blob
src/northbridge/intel/E7525/Config.lb [new file with mode: 0644] blob
src/northbridge/intel/E7525/chip.h [new file with mode: 0644] blob
src/northbridge/intel/E7525/e7525.h [new file with mode: 0644] blob
src/northbridge/intel/E7525/memory_initialized.c [new file with mode: 0644] blob
src/northbridge/intel/E7525/northbridge.c [new file with mode: 0644] blob
src/northbridge/intel/E7525/northbridge.h [new file with mode: 0644] blob
src/northbridge/intel/E7525/pciexp_porta.c [new file with mode: 0644] blob
src/northbridge/intel/E7525/pciexp_porta1.c [new file with mode: 0644] blob
src/northbridge/intel/E7525/pciexp_portb.c [new file with mode: 0644] blob
src/northbridge/intel/E7525/pciexp_portc.c [new file with mode: 0644] blob
src/northbridge/intel/E7525/raminit.c [new file with mode: 0644] blob
src/northbridge/intel/E7525/raminit.h [new file with mode: 0644] blob
src/northbridge/intel/E7525/raminit_test.c [new file with mode: 0644] blob
src/southbridge/amd/amd8111/amd8111_reset.c diff | blob | history
src/southbridge/amd/amd8131-disable/Config.lb [new file with mode: 0644] blob
src/southbridge/amd/amd8131-disable/amd8131_bridge.c [new file with mode: 0644] blob
src/southbridge/amd/amd8131/amd8131_bridge.c diff | blob | history
src/southbridge/intel/esb6300/Config.lb [new file with mode: 0644] blob
src/southbridge/intel/esb6300/chip.h [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300.c [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300.h [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_ac97.c [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_bridge1c.c [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_early_smbus.c [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_ehci.c [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_ide.c [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_lpc.c [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_pci.c [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_pic.c [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_sata.c [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_smbus.c [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_smbus.h [new file with mode: 0644] blob
src/southbridge/intel/esb6300/esb6300_uhci.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_reset.c diff | blob | history
src/southbridge/intel/i82870/p64h2_pcibridge.c diff | blob | history
src/southbridge/intel/ich5r/Config.lb [new file with mode: 0644] blob
src/southbridge/intel/ich5r/chip.h [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r.c [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r.h [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r_ac97.c [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r_early_smbus.c [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r_ehci.c [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r_ide.c [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r_lpc.c [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r_pci.c [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r_sata.c [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r_smbus.c [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r_smbus.h [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r_uhci.c [new file with mode: 0644] blob
src/southbridge/intel/ich5r/ich5r_watchdog.c [new file with mode: 0644] blob
src/southbridge/intel/pxhd/Config.lb [new file with mode: 0644] blob
src/southbridge/intel/pxhd/chip.h [new file with mode: 0644] blob
src/southbridge/intel/pxhd/pxhd.h [new file with mode: 0644] blob
src/southbridge/intel/pxhd/pxhd_bridge.c [new file with mode: 0644] blob
src/superio/NSC/pc87427/Config.lb [new file with mode: 0644] blob
src/superio/NSC/pc87427/chip.h [new file with mode: 0644] blob
src/superio/NSC/pc87427/pc87427.h [new file with mode: 0644] blob
src/superio/NSC/pc87427/pc87427_early_init.c [new file with mode: 0644] blob
src/superio/NSC/pc87427/superio.c [new file with mode: 0644] blob
src/superio/smsc/lpc47b397/superio.c diff | blob | history
src/superio/winbond/w83627hf/superio.c diff | blob | history
src/superio/winbond/w83627hf/w83627hf.h diff | blob | history
src/superio/winbond/w83627hf/w83627hf_early_init.c [new file with mode: 0644] blob
targets/tyan/s2850/Config.lb diff | blob | history
targets/tyan/s2880/Config.lb diff | blob | history
targets/tyan/s2881/Config.lb diff | blob | history
targets/tyan/s2882/Config.lb diff | blob | history
targets/tyan/s2885/Config.lb diff | blob | history
targets/tyan/s2891/Config.lb diff | blob | history
targets/tyan/s2892/Config.lb diff | blob | history
targets/tyan/s2895/Config.lb diff | blob | history
targets/tyan/s4880/Config.lb diff | blob | history
targets/tyan/s4882/Config.lb diff | blob | history
util/romcc/Makefile diff | blob | history
util/romcc/tests.sh diff | blob | history
my coreboot WIP stuff (asus m5a99x-evo board)