src/superio/winbond/w83627hf/superio.c

   1 /* Copyright 2000  AG Electronics Ltd. */
   2 /* Copyright 2003-2004 Linux Networx */
   3 /* Copyright 2004 Tyan
   4    By LYH change from PC87360 */
   5 /* This code is distributed without warranty under the GPL v2 (see COPYING) */
   6
   7 #include <arch/io.h>
   8 #include <device/device.h>
   9 #include <device/pnp.h>
  10 #include <console/console.h>
  11 #include <string.h>
  12 #include <bitops.h>
  13 #include <uart8250.h>
  14 #include <pc80/keyboard.h>
  15 #include <pc80/mc146818rtc.h>
  16 #include "chip.h"
  17 #include "w83627hf.h"
  18
  19
  20 static void pnp_enter_ext_func_mode(device_t dev)
  21 {
  22         outb(0x87, dev->path.u.pnp.port);
  23         outb(0x87, dev->path.u.pnp.port);
  24 }
  25 static void pnp_exit_ext_func_mode(device_t dev)
  26 {
  27         outb(0xaa, dev->path.u.pnp.port);
  28 }
  29
  30 static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
  31 {
  32         outb(reg, port_base);
  33         outb(value, port_base + 1);
  34 }
  35
  36 static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg)
  37 {
  38         outb(reg, port_base);
  39         return inb(port_base + 1);
  40 }
  41
  42 static void enable_hwm_smbus(device_t dev) {
  43         /* set the pin 91,92 as I2C bus */
  44         uint8_t reg, value;
  45         reg = 0x2b;
  46         value = pnp_read_config(dev, reg);
  47         value &= 0x3f;
  48         pnp_write_config(dev, reg, value);
  49 }
  50
  51 static void init_acpi(device_t dev)
  52 {
  53         uint8_t  value = 0x20;
  54         int power_on = 1;
  55
  56         get_option(&power_on, "power_on_after_fail");
  57         pnp_enter_ext_func_mode(dev);
  58         pnp_write_index(dev->path.u.pnp.port,7,0x0a);
  59         value = pnp_read_config(dev, 0xE4);
  60         value &= ~(3<<5);
  61         if(power_on) {
  62                 value |= (1<<5);
  63         }
  64         pnp_write_config(dev, 0xE4, value);
  65         pnp_exit_ext_func_mode(dev);
  66 }
  67
  68 static void init_hwm(unsigned long base)
  69 {
  70         uint8_t  reg, value;
  71         int i;
  72
  73         unsigned  hwm_reg_values[] = {
  74 /*            reg  mask  data */
  75               0x40, 0xff, 0x81,  /* start HWM */
  76               0x48, 0xaa, 0x2a,  /* set SMBus base to 0x54>>1   */
  77               0x4a, 0x21, 0x21,  /* set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1 */
  78               0x4e, 0x80, 0x00,
  79               0x43, 0x00, 0xff,
  80               0x44, 0x00, 0x3f,
  81               0x4c, 0xbf, 0x18,
  82               0x4d, 0xff, 0x80   /* turn off beep */
  83
  84         };
  85
  86         for(i = 0; i<  sizeof(hwm_reg_values)/sizeof(hwm_reg_values[0]); i+=3 ) {
  87                 reg = hwm_reg_values[i];
  88                 value = pnp_read_index(base, reg);
  89                 value &= 0xff & hwm_reg_values[i+1];
  90                 value |= 0xff & hwm_reg_values[i+2];
  91 #if 0
  92                 printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value);
  93 #endif
  94                 pnp_write_index(base, reg, value);
  95         }
  96 }
  97
  98 static void w83627hf_init(device_t dev)
  99 {
 100         struct superio_winbond_w83627hf_config *conf;
 101         struct resource *res0, *res1;
 102         if (!dev->enabled) {
 103                 return;
 104         }
 105         conf = dev->chip_info;
 106         switch(dev->path.u.pnp.device) {
 107         case W83627HF_SP1:
 108                 res0 = find_resource(dev, PNP_IDX_IO0);
 109                 init_uart8250(res0->base, &conf->com1);
 110                 break;
 111         case W83627HF_SP2:
 112                 res0 = find_resource(dev, PNP_IDX_IO0);
 113                 init_uart8250(res0->base, &conf->com2);
 114                 break;
 115         case W83627HF_KBC:
 116                 res0 = find_resource(dev, PNP_IDX_IO0);
 117                 res1 = find_resource(dev, PNP_IDX_IO1);
 118                 init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
 119                 break;
 120         case W83627HF_HWM:
 121                 res0 = find_resource(dev, PNP_IDX_IO0);
 122 #define HWM_INDEX_PORT 5
 123                 init_hwm(res0->base + HWM_INDEX_PORT);
 124                 break;
 125         case W83627HF_ACPI:
 126                 init_acpi(dev);
 127                 break;
 128         }
 129 }
 130
 131 void w83627hf_pnp_set_resources(device_t dev)
 132 {
 133         pnp_enter_ext_func_mode(dev);
 134         pnp_set_resources(dev);
 135         pnp_exit_ext_func_mode(dev);
 136
 137 }
 138
 139 void w83627hf_pnp_enable_resources(device_t dev)
 140 {
 141         pnp_enter_ext_func_mode(dev);
 142         pnp_enable_resources(dev);
 143         switch(dev->path.u.pnp.device) {
 144         case W83627HF_HWM:
 145                 printk_debug("w83627hf hwm smbus enabled\n");
 146                 enable_hwm_smbus(dev);
 147                 break;
 148         }
 149         pnp_exit_ext_func_mode(dev);
 150
 151 }
 152
 153 void w83627hf_pnp_enable(device_t dev)
 154 {
 155
 156         if (!dev->enabled) {
 157                 pnp_enter_ext_func_mode(dev);
 158
 159                 pnp_set_logical_device(dev);
 160                 pnp_set_enable(dev, 0);
 161
 162                 pnp_exit_ext_func_mode(dev);
 163         }
 164 }
 165
 166 static struct device_operations ops = {
 167         .read_resources   = pnp_read_resources,
 168         .set_resources    = w83627hf_pnp_set_resources,
 169         .enable_resources = w83627hf_pnp_enable_resources,
 170         .enable           = w83627hf_pnp_enable,
 171         .init             = w83627hf_init,
 172 };
 173
 174 static struct pnp_info pnp_dev_info[] = {
 175         { &ops, W83627HF_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
 176         { &ops, W83627HF_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
 177         { &ops, W83627HF_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
 178         { &ops, W83627HF_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
 179         // No 4 { 0,},
 180         { &ops, W83627HF_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
 181         { &ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
 182         { &ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, },
 183         { &ops, W83627HF_GPIO2, },
 184         { &ops, W83627HF_GPIO3, },
 185         { &ops, W83627HF_ACPI, },
 186         { &ops, W83627HF_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
 187 };
 188
 189 static void enable_dev(struct device *dev)
 190 {
 191         pnp_enable_devices(dev, &ops,
 192                 sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
 193 }
 194
 195 struct chip_operations superio_winbond_w83627hf_ops = {
 196         CHIP_NAME("Winbond w83627hf")
 197         .enable_dev = enable_dev,
 198 };