From b9778f6feb7109647a067796939a985572ed0ee3 Mon Sep 17 00:00:00 2001 From: Stefan Rebernig Date: Mon, 29 Nov 2010 15:32:53 +0100 Subject: [PATCH] st --- cpu/src/common_pkg.vhd | 4 ++++ cpu/src/decode_stage_b.vhd | 3 ++- cpu/src/decoder_b.vhd | 7 ++++--- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/cpu/src/common_pkg.vhd b/cpu/src/common_pkg.vhd index ba8d1a6..8d3ac51 100755 --- a/cpu/src/common_pkg.vhd +++ b/cpu/src/common_pkg.vhd @@ -74,6 +74,8 @@ package common_pkg is immediate : std_logic_vector(WORD_WIDTH-1 downto 0); + displacement : gp_register_t; + jmptype : std_logic_vector(1 downto 0); high_low, fill, signext, bp: std_logic; @@ -101,6 +103,8 @@ package common_pkg is op_group : op_info_t; op_detail : op_opt_t; brpr : std_logic; + + displacement : gp_register_t; src1 : gp_register_t; src2 : gp_register_t; diff --git a/cpu/src/decode_stage_b.vhd b/cpu/src/decode_stage_b.vhd index de4b162..92c0f71 100644 --- a/cpu/src/decode_stage_b.vhd +++ b/cpu/src/decode_stage_b.vhd @@ -66,7 +66,7 @@ begin dec_op_inst.saddr1 <= (others => '0'); dec_op_inst.saddr2 <= (others => '0'); dec_op_inst.daddr <= (others => '0'); - + dec_op_inst.displacement <= (others => '0'); elsif rising_edge(clk) then rtw_rec <= rtw_rec_nxt; @@ -116,6 +116,7 @@ begin dec_op_inst_nxt.saddr2 <= instr_spl.reg_src2_addr; dec_op_inst_nxt.daddr <= instr_spl.reg_dest_addr; --(others => '0'); dec_op_inst_nxt.op_group <= instr_spl.op_group; + dec_op_inst_nxt.displacement <= instr_spl.displacement; end process; diff --git a/cpu/src/decoder_b.vhd b/cpu/src/decoder_b.vhd index d1b49c1..11d2e3b 100644 --- a/cpu/src/decoder_b.vhd +++ b/cpu/src/decoder_b.vhd @@ -31,6 +31,7 @@ begin instr_s.signext := '0'; instr_s.bp := '0'; instr_s.op_detail := (others => '0'); + instr_s.displacement := (others => '0'); instr_s.op_group := ADDSUB_OP; @@ -259,9 +260,9 @@ begin if (instr_s.opcode = "01111" or instr_s.opcode = "10001" or instr_s.opcode = "10011" or instr_s.opcode = "10101") then --when "01111" => --stw - instr_s.reg_src1_addr := instruction(22 downto 19); -- register value - instr_s.reg_src2_addr := instruction(18 downto 15); -- mem addr - instr_s.immediate(14 downto 0) := instruction(14 downto 0); + instr_s.reg_src2_addr := instruction(22 downto 19); -- register value + instr_s.reg_src1_addr := instruction(18 downto 15); -- mem addr + instr_s.displacement(14 downto 0) := instruction(14 downto 0); end if; -- when "10001" => --sth -- 2.25.1