cpu/src/execute_stage.vhd

   1 library IEEE;
   2 use IEEE.std_logic_1164.all;
   3 use IEEE.numeric_std.all;
   4
   5 entity execute_stage is
   6
   7         generic (
   8                         -- active reset value
   9                         RESET_VALUE : std_logic;
  10                         -- active logic value
  11                         LOGIC_ACT : std_logic;
  12
  13                         );
  14         port(
  15                 --System inputs
  16                         clk : in std_logic;
  17                         reset : in std_logic;
  18                         dec_instr : in dec_op
  19                 );
  20
  21 end execute_stage;