Rudolf Marek [Mon, 30 Jun 2008 21:45:17 +0000 (21:45 +0000)]
Mine AMIC flash chip needs 4 bytes RDID. Following patch adds support for that.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3399
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 30 Jun 2008 21:38:30 +0000 (21:38 +0000)]
This patch adds support for VIA SPI controller on VT8237S. It is similar with
few documented exceptions to ICH7 SPI controller.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3398
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Carl-Daniel Hailfinger [Sun, 29 Jun 2008 10:57:13 +0000 (10:57 +0000)]
Add a debug marker after ICH SPI opcode programming.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3397
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sun, 29 Jun 2008 06:41:12 +0000 (06:41 +0000)]
Adds a field to the serial port descriptor about the configured line speed.
Signed-Off-By: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3396
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Peter Stuge [Sun, 29 Jun 2008 01:30:41 +0000 (01:30 +0000)]
flashrom: Fix ICH7 non-SPI that broke in r3393
r3393 assumed that ICH7 always used SPI. This patch resets ich7_detected back
to 0 when BOOT BIOS Straps indicate something else than SPI.
Also fixes a build error in ichspi.c with gcc 4.2.2.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3395
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Carl-Daniel Hailfinger [Sat, 28 Jun 2008 23:02:22 +0000 (23:02 +0000)]
Use symbolic constants for PCI subsystem probing in flashrom.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3394
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Fri, 27 Jun 2008 16:28:34 +0000 (16:28 +0000)]
* ICH7 SPI support
* fix some variable names in ichspi.c (Offset -> offset)
* Dump ICH7 SPI bar with -V
* Improve error message in case IOPL goes wrong. (It might not even be an IOPL)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3393
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Fri, 27 Jun 2008 15:18:20 +0000 (15:18 +0000)]
indent according to development guidelines (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3392
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 26 Jun 2008 19:42:25 +0000 (19:42 +0000)]
Initial support for the A-Trend ATC-6240 board.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3391
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Jens Kühnel [Thu, 26 Jun 2008 11:57:27 +0000 (11:57 +0000)]
Winbond W39V080FA: Probe and Read are OK.
Signed-off-by: Jens Kühnel <coreboot@jens.kuehnel.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3390
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Tue, 24 Jun 2008 08:18:13 +0000 (08:18 +0000)]
flashrom: Test status OK for ST M50FW040 PROBE READ
Per test report from Alex Perez. Thanks Alex!
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3389
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Peter Stuge [Tue, 24 Jun 2008 04:17:14 +0000 (04:17 +0000)]
flashrom: Test status OK for Macronix MX25L8005 PROBE READ ERASE WRITE
Per test report from Andrew Paprocki. Thanks Andrew!
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3388
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Tue, 24 Jun 2008 02:09:09 +0000 (02:09 +0000)]
flashrom: Increase delay in probe_jedec() after Product ID Entry to 10ms
We should follow data sheet timing, even if chips have been tested to answer
faster in the field.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3387
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Tue, 24 Jun 2008 01:22:03 +0000 (01:22 +0000)]
flashrom: Slight restructure of SPI probe_ functions
Preparation for a probe optimization patch. This patch does not change any
functionality. spi_probe_rdid was tested to still work on my M57SLI rev 2.
The idea is to have error checks return error immediately when something
fails, rather than having code inside an if block where the condition
tests for success.
This means: Less indentation, more clear what the code is checking.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3386
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sun, 22 Jun 2008 18:50:25 +0000 (18:50 +0000)]
Some flashrom documentation fixes, and removal of duplicated info (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3385
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Sun, 22 Jun 2008 17:54:03 +0000 (17:54 +0000)]
flashrom: A few changes were committed before the DoC remove, update README.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3384
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 22 Jun 2008 17:15:03 +0000 (17:15 +0000)]
as per Peter's suggestion. clean binary in make clean
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3383
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Sun, 22 Jun 2008 17:06:41 +0000 (17:06 +0000)]
flashrom: Remove dead M-Systems Disk on Chip code
DOC support has been disabled by default for many years. The write function
does nothing but print text. It has a call to write_page_md2802() commented
out, but that function does not exist. This is dead code with ugly #ifdefs.
Updates README to reflect that there was a time when there was code, but it
didn't work. Removes M-Systems #defines and also includes svn rm msys_doc.*
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3382
2b7e53f0-3cfb-0310-b3e9-
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Ronald Hoogenboom [Sun, 22 Jun 2008 14:33:17 +0000 (14:33 +0000)]
Enable hardware fan control for m57sli.
Tested on v1 and v2 of the board.
Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3381
2b7e53f0-3cfb-0310-b3e9-
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Joseph Smith [Sun, 22 Jun 2008 04:22:46 +0000 (04:22 +0000)]
This patch allows support for multiple so-dimms, single or double sided.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3380
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Sun, 22 Jun 2008 02:04:49 +0000 (02:04 +0000)]
flashrom: Update test status to TEST_OK_PREW for ST M50FLW080A and SST49LF008A
Many thanks to Julio Cesar Costa for the test report!
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3379
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Sun, 22 Jun 2008 02:00:39 +0000 (02:00 +0000)]
flashrom: Some Makefile cleaning
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3378
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Sat, 21 Jun 2008 04:39:17 +0000 (04:39 +0000)]
flashrom: Fix OBJS in Makefile to compile stm50flw0x0x.c like the others
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3377
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Sat, 21 Jun 2008 04:23:10 +0000 (04:23 +0000)]
flashrom: Uppercase AMIC since that's what they write in datasheets.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3376
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Sat, 21 Jun 2008 01:02:20 +0000 (01:02 +0000)]
flashrom: Update comment to match delay change in probe_jedec() r3373
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3375
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Sat, 21 Jun 2008 00:21:22 +0000 (00:21 +0000)]
flashrom: Update test status for Atmel AT29C020 and SST29EE010
Thanks to Urja Rannikko for reporting test results with these flash chips.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3374
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Sat, 21 Jun 2008 00:19:52 +0000 (00:19 +0000)]
flashrom: Increase delay in probe_jedec() to 2ms to reliably detect AT29C020
Run time is increased a few 100ms but this is needed for reliability.
I consider this trivial.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3373
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Fri, 20 Jun 2008 02:58:42 +0000 (02:58 +0000)]
flashrom: Show expected and read byte on verify failure. Trivial.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3372
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Fri, 20 Jun 2008 00:02:52 +0000 (00:02 +0000)]
coreinfo: Enable serial support
Remove the lines preventing serial + curses thanks to r3370. Trivial.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3371
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Jordan Crouse [Fri, 20 Jun 2008 00:01:42 +0000 (00:01 +0000)]
libpayload: Support curses for serial
Support the curses interface over serial by supporting a minimal vt100
terminal.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3370
2b7e53f0-3cfb-0310-b3e9-
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Bari Ari [Fri, 20 Jun 2008 00:01:14 +0000 (00:01 +0000)]
Extend the VIA vt8237r southbridge decode range for the ROM to 1MB.
Signed-off-by: Bari Ari <bari@onelabs.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3369
2b7e53f0-3cfb-0310-b3e9-
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Jens Kuehnel [Wed, 18 Jun 2008 13:36:34 +0000 (13:36 +0000)]
flashrom: Add support for AMIC Technology A49LF040A and do not probe W29EE011 anymore
Jens sent the first patch that added A49LF040A to flash.h and flashchips.c
using _jedec and _49lf040 functions.
An issue was found with probe_w29ee011() for the Winbond W29EE011, which
caused the A49LF040A to no longer respond to any commands.
Ward made a patch to disable probing by default for the W29EE011 following
some discussion. Using -c W29EE011 will make flashrom probe for the chip.
Peter did some more datasheet diving and found that the Pm49FL00x functions
suited this chip quite well because of the block locking registers in
A49LF040A, and finally tested PROBE READ ERASE WRITE to work on ALIX.3c3.
Ward confirmed that this works on alix.2c3 too.
Signed-off-by: Jens Kuehnel <coreboot@jens.kuehnel.org>
Signed-off-by: Ward Vandewege <ward@gnu.org>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3368
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Wed, 18 Jun 2008 02:08:40 +0000 (02:08 +0000)]
flashrom: Force read unknown flash chips
When flash chip detection fails, it is still useful and possible to read the
flash chip contents. If no flash chip is found in normal probes and the
-f -r -c CHIPNAME options are given, a successful probe for the specified
chip is forced, and then flashrom reads the flash chip using either the read
function for the specified chip, or if there is none, a simple memcpy().
The patch also moves the global variable int force in flashrom.c into main()
and passes it as a parameter to layout.c:show_id(), which was the only other
function that used the variable. This is needed to avoid confusion with the
new parameter int force which is added to flashrom.c:probe_flash() and used
to force probe success for the chip named in char *chip_to_probe.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3367
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Fri, 13 Jun 2008 01:39:45 +0000 (01:39 +0000)]
flashrom: Board enable and autodetection for GIGABYTE GA-7VT600
Uses the VT8237 ISA bridge with mainboard subsystem ID and Realtek 8139 with
mainboard subsystem ID for board detection.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3366
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Wed, 11 Jun 2008 02:24:15 +0000 (02:24 +0000)]
flashrom: Add support for Amic Technology
A29040B flash chip.
PROBE READ tested by Lyos Gemini Norezel on BioStar P4M80-M4.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3365
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Wed, 11 Jun 2008 02:22:42 +0000 (02:22 +0000)]
flashrom: Board enable and autodetection for BioStar P4M80-M4.
Thanks to Reinder for clean room reverse engineering and data sheet diving!
This board is autodetected because there are some good BioStar subsystem IDs.
Matching uses onboard VT6420 SATA RAID with subsystem BioStar 3206 and
onboard UniChrome Pro IGP graphics with subsystem BioStar 1202.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3364
2b7e53f0-3cfb-0310-b3e9-
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Pierre Pronchery [Sun, 8 Jun 2008 23:05:24 +0000 (23:05 +0000)]
Changes Makefile generation so that recursive "make" calls read
"$(MAKE)" instead, as GNU make (or "gmake") is currently necessary to build.
Signed-off-by: Pierre Pronchery <khorben@defora.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3363
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sat, 7 Jun 2008 12:35:11 +0000 (12:35 +0000)]
fix via epia cn abuild.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3362
2b7e53f0-3cfb-0310-b3e9-
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Tom Sylla [Sat, 7 Jun 2008 11:36:30 +0000 (11:36 +0000)]
Add dump support for Winbond (NSC) PC87427. Dumps available from real hardware.
Signed-off-by: Tom Sylla <tsylla@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3361
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Tue, 3 Jun 2008 00:22:00 +0000 (00:22 +0000)]
Ward writes:
SST SST49LF160C is confirmed to work for PROBE READ ERASE WRITE, at least on
2 MCP55-based boards (gigabyte m57sli v1 and supermicro h8dmr).
On the m57sli board, it only works > 512K when booted into coreboot; the
proprietary bios seems to do something weird where it locks rom access down
to the first 512K of the chip.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3360
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 28 May 2008 08:40:23 +0000 (08:40 +0000)]
abuild: fix gnu getopt detection (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3359
2b7e53f0-3cfb-0310-b3e9-
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Mart Raudsepp [Tue, 27 May 2008 23:51:55 +0000 (23:51 +0000)]
Revert r3357 and fix it as intended to (forgotten header commit instead of typo)
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3358
2b7e53f0-3cfb-0310-b3e9-
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Mart Raudsepp [Tue, 27 May 2008 22:20:30 +0000 (22:20 +0000)]
Fix typo introduced in r3356 that breaks build (trivial).
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3357
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Tue, 27 May 2008 20:54:09 +0000 (20:54 +0000)]
flashrom: MX25L4005, S25FL016A, W39V040B, W39V080A, SST49LF008A tests.
I have tested MX25L4005, S25FL016A and W39V080A myself.
Thanks also to the following testers:
SST49LF008A Bernhard M. Wiedemann
W39V040B Dan Lenski
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3356
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Tue, 27 May 2008 20:07:47 +0000 (20:07 +0000)]
coreinfo: Specify a name, listname and desc item for coreinfo
These values are consumed by the chooser payload. listname is
presented on the chooser menu.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3355
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Tue, 27 May 2008 20:06:54 +0000 (20:06 +0000)]
libpayload: Add PAYLOAD_INFO macro
Adds the PAYLOAD_INFO macro to store payload information in a data
section in the ELF which can be consumed by other entities.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3354
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 27 May 2008 20:06:30 +0000 (20:06 +0000)]
not sure why this ever worked. Add --xml / -x to the supported options (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3353
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Tue, 27 May 2008 19:57:53 +0000 (19:57 +0000)]
libpayload: Add a function to verify the checksum on a LAR file
This function verifies the checksum on a LAR file.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3352
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 27 May 2008 18:29:26 +0000 (18:29 +0000)]
sync latest version of abuild (0.6) (trivial patch)
- parallel building
- fix non-gnu-getopt systems
- silent mode
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3351
2b7e53f0-3cfb-0310-b3e9-
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Mart Raudsepp [Tue, 27 May 2008 09:10:52 +0000 (09:10 +0000)]
Mark SST49LF004A/B as tested (trivial).
Tested by me on actual hardware (all operations) - Artec Group DBE62 with SST 49LF004B
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3350
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Uwe Hermann [Mon, 26 May 2008 23:12:25 +0000 (23:12 +0000)]
Mark the following chips as tested (trivial).
- AMD Am29F040B
- SST SST39SF020A
- Winbond W29C020C
- Winbond W29EE011
- Winbond W49F002U
All of them tested by me on actual hardware (all operations).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3349
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 22 May 2008 22:47:04 +0000 (22:47 +0000)]
A bunch of cosmetic improvements (trivial).
- Fix typos and inconsistencies.
- Drop duplicate line which tells us the chip name twice.
- Also print the chip vendor, not only the name.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3348
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 22 May 2008 21:26:42 +0000 (21:26 +0000)]
Mark more chips as tested (all operations), tested on ASUS P4B266 (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3347
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 22 May 2008 21:19:38 +0000 (21:19 +0000)]
Add support for the ASUS P4B266 board.
Tested on actual hardware.
This patch add an ich_gpio_raise() function which can be re-used by other
board-specific funtions which need to raise GPIOs on ICHx southbridges.
This also fixes bug #7, see http://tracker.coreboot.org/trac/coreboot/ticket/7,
as it turned out the ICH2 (and other ICHx) code works fine.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3346
2b7e53f0-3cfb-0310-b3e9-
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Rudolf Marek [Thu, 22 May 2008 13:42:23 +0000 (13:42 +0000)]
Add support for Amic A25L40P SPI flash.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3345
2b7e53f0-3cfb-0310-b3e9-
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Andriy Gapon [Thu, 22 May 2008 13:22:45 +0000 (13:22 +0000)]
Changes to make flashrom compile (and work) on FreeBSD.
This patch addresses different argument order of outX() calls,
FreeBSD-specific headers, difference in certain type names and system
interface names, and also FreeBSD-specific way of gaining IO port
access.
Signed-off-by: Andriy Gapon <avg@icyb.net.ua>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3344
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Myles Watson [Wed, 21 May 2008 22:10:38 +0000 (22:10 +0000)]
This is a simple patch which allows payloads to be placed in memory in
the range of 0xf0000-0x100000, where the Coreboot tables live in v2.
As long as the payload doesn't need the tables, it seems harmless, so
why not just print a warning?
This allows v2 to load "legacybios" without having to have a separate loader.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
It'll be fine for testing and doesn't really break anything that did
work before...
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3343
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Uwe Hermann [Wed, 21 May 2008 13:49:03 +0000 (13:49 +0000)]
Add KEY_ESC (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3342
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Peter Stuge [Wed, 21 May 2008 07:10:15 +0000 (07:10 +0000)]
Myles reported SST49LF080A status -> TESTED_PREW
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3341
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Tue, 20 May 2008 20:16:34 +0000 (20:16 +0000)]
coreinfo: Use the ESC key to exit the payload
Enable the ESC key to close coreinfo - useful if you are using a chooser
and want to return to it.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3340
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Tue, 20 May 2008 20:16:03 +0000 (20:16 +0000)]
coreinfo: Fix the subwindow refresh based on the libpayload changes
Changes to libpayload to fix subwindows broke coreinfo. This fixes it,
and improves performance by eliminating the entire screen refresh every
second.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3339
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Tue, 20 May 2008 20:10:49 +0000 (20:10 +0000)]
libpayload: Add an exec() and i386_do_exec() function
Add functions for libpayload to execute other payloads in memory,
and have those functions return cleanly.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3338
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Tue, 20 May 2008 20:09:42 +0000 (20:09 +0000)]
libpayload: Add larfptr function
Add a function to get a pointer to the start of a LAR entry.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3337
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Tue, 20 May 2008 20:08:11 +0000 (20:08 +0000)]
libpayload: Fix curses subwindows
This fixes subwindows in curses so that they draw and refresh correctly.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3336
2b7e53f0-3cfb-0310-b3e9-
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Corey Osgood [Tue, 20 May 2008 18:10:24 +0000 (18:10 +0000)]
Add post-RAM init code for the Fintek
F71805F Super I/O.
Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Richard Stellingwerff <remenic@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3335
2b7e53f0-3cfb-0310-b3e9-
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Aaron Lwe [Mon, 19 May 2008 12:17:43 +0000 (12:17 +0000)]
Add support for the VIA EPIA-CN baord, which uses C7 + CN700 + VT8237R.
This also contains various improvements of the CN700 code in svn.
Signed-off-by: Aaron Lwe <aaron.lwe@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3334
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Uwe Hermann [Sat, 17 May 2008 21:33:35 +0000 (21:33 +0000)]
Initial support for the Intel 82845 (Brookdale) and ICH2 (trivial).
Tested on hardware:
Intel Northbridge: 8086:1a30 (i845)
Intel Southbridge: 8086:2440 (ICH2)
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3333
2b7e53f0-3cfb-0310-b3e9-
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Nikolay Petukhov [Sat, 17 May 2008 01:08:58 +0000 (01:08 +0000)]
flashrom: Support Pm49FL004/2 Block Locking Registers
The PMC chips understand both LPC and FWH flash commands. When in FWH mode
(MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block
Locking Registers by default lock the flash chip for write and erase - in
addition to any chipset write protection.
This patch adds unlock operations before Pm49FL004/2 write and erase, and
it includes an svn mv pm49fl004.c pm49fl00x.c
Thanks go to Nikolay for this patch.
Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Bari Ari <bari@onelabs.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3332
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Carl-Daniel Hailfinger [Fri, 16 May 2008 21:11:53 +0000 (21:11 +0000)]
I looked at the datasheet and erase_sector_39sf020() is totally and
completely wrong. It was a straight cut'n'paste from SST 28SF040 code
and the person doing the cut'n'paste didn't even bother to check the
data sheet. The SST 39SF020 is completely incompatible with the 28SF040.
No need for replacement. According to the data sheet, standard JEDEC
commands will work and we have those commands in the tree already.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3331
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Uwe Hermann [Fri, 16 May 2008 18:56:24 +0000 (18:56 +0000)]
Doesn't have to be executable (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3330
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Fri, 16 May 2008 18:08:54 +0000 (18:08 +0000)]
Geode platforms that use a LPC Super I/O had the LPC serial IRQ set to all
the possible IRQs generated by the SIO. This included IRQ 7 as the default
parallel port IRQ. This overlapped with the MFGPT driver setting IRQ7 for it's
own use. This fix removes IRQ7 from the serial IRQ list for all the mainboards
that were setting it to prevent the conflict and crash when the MFGPT driver
loads.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3329
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Joseph Smith [Fri, 16 May 2008 15:43:35 +0000 (15:43 +0000)]
New Target and initial support for the Thomson IP1000.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3328
2b7e53f0-3cfb-0310-b3e9-
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Carl-Daniel Hailfinger [Fri, 16 May 2008 14:39:39 +0000 (14:39 +0000)]
ICH8 and ICH9 have an almost identical SPI interface, only the location
of the SPIBAR differs. Add ICH8 support to the ICH9 code.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3327
2b7e53f0-3cfb-0310-b3e9-
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Dominik Geyer [Fri, 16 May 2008 13:00:28 +0000 (13:00 +0000)]
Add support for the Atmel AT25DF321 SPI flash (tested).
Change ST M25P32 status to tested.
Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3326
2b7e53f0-3cfb-0310-b3e9-
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Dominik Geyer [Fri, 16 May 2008 12:55:55 +0000 (12:55 +0000)]
Add support for SPI chips on ICH9. This is done by using the generic SPI
interface.
Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3325
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Carl-Daniel Hailfinger [Fri, 16 May 2008 00:19:52 +0000 (00:19 +0000)]
Enable IT8716F LPC-to-SPI write cycle translation in flashrom if the
IT8716F decodes any address to the attached SPI ROM.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3324
2b7e53f0-3cfb-0310-b3e9-
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Carl-Daniel Hailfinger [Thu, 15 May 2008 22:32:08 +0000 (22:32 +0000)]
Print detailed status register information for SST25VF series flash.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3323
2b7e53f0-3cfb-0310-b3e9-
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Joseph Smith [Thu, 15 May 2008 13:44:33 +0000 (13:44 +0000)]
This patch allows the RCA RM4100 to reboot. Upon rebooting in auto.c it detects if the memory is already initialized, if so it issues a hard reset through the southbridge.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3322
2b7e53f0-3cfb-0310-b3e9-
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Carl-Daniel Hailfinger [Thu, 15 May 2008 03:24:43 +0000 (03:24 +0000)]
Lots of new SST flash chip IDs. Only a subset has been added to
flashchips.c, but the IDs in flash.h will make lookups easier if anybody
wants to add support for them.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3321
2b7e53f0-3cfb-0310-b3e9-
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Carl-Daniel Hailfinger [Thu, 15 May 2008 03:19:49 +0000 (03:19 +0000)]
Add support for the JEDEC RES (Read Electronic Signature and Resume from
Powerdown) SPI command to flashrom to identify older SPI chips which
can't handle JEDEC RDID. Since RES gives a one-byte identifier which is
shared among many different vendors and even different sizes, we want to
match RES as a last resort if RDID returns 0xff 0xff 0xff.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
This is a heavily reworked version of a patch by Fredrik Tolf, which was
Signed-off-by: Fredrik Tolf <fredrik@dolda2000.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3320
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Uwe Hermann [Wed, 14 May 2008 22:56:47 +0000 (22:56 +0000)]
Some NSC Super I/Os can have their config port at 0x15c (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3319
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Wed, 14 May 2008 21:20:55 +0000 (21:20 +0000)]
Cosmetics, whitespace, coding style, partially ident-aided (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3318
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Wed, 14 May 2008 20:10:02 +0000 (20:10 +0000)]
libpayload: implement wborder function
Implement the wborder function for curses to draw a box around a window.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3317
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Wed, 14 May 2008 20:07:31 +0000 (20:07 +0000)]
libpayload: Fix the putc function
Reverse rows and columns on the video putc() function, and watch printf
work again.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3316
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 14 May 2008 20:05:00 +0000 (20:05 +0000)]
add ICH7-M and ICH7 DH to inteltool (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3315
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Carl-Daniel Hailfinger [Wed, 14 May 2008 14:51:22 +0000 (14:51 +0000)]
Add more infrastructure for flashrom ICH9 support.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3314
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 14 May 2008 14:47:32 +0000 (14:47 +0000)]
fix license mentioning in manpage (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3313
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 14 May 2008 14:22:59 +0000 (14:22 +0000)]
trivial patch: move maintainable parts to the top and add ICH7-M DH southbridge
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3312
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 14 May 2008 13:52:50 +0000 (13:52 +0000)]
trivial patch to fix options. Thanks to Uwe Hermann for the hint!
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3311
2b7e53f0-3cfb-0310-b3e9-
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Claus Gindhart [Wed, 14 May 2008 12:22:38 +0000 (12:22 +0000)]
Add the Intel 6300ESB as known chipset to the chipset struct enables.
Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3310
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Carl-Daniel Hailfinger [Wed, 14 May 2008 12:09:31 +0000 (12:09 +0000)]
Fix crash caused by division by zero for unknown flash chips.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3309
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Carl-Daniel Hailfinger [Wed, 14 May 2008 12:03:06 +0000 (12:03 +0000)]
Check the JEDEC vendor ID for correct parity. Flash chips which can be
detected by JEDEC probe routines all have vendor IDs with correct
parity. Use a parity check as additional hint whether a vendor ID makes
sense.
Note: Device IDs have no parity requirements whatsoever.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3308
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Stefan Reinauer [Wed, 14 May 2008 11:38:22 +0000 (11:38 +0000)]
Example on how to add other chipsets to inteltool. ICH/ICH0, ICH4(-M) and ICH7
have different register meanings, so they get their own lookup tables.
This is a trivial patch.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3307
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Carl-Daniel Hailfinger [Wed, 14 May 2008 04:27:02 +0000 (04:27 +0000)]
Add lots of ATMEL SPI flash chips to flash.h.
Add a few flashchips already mentioned in flash.h to flashchips.c
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3306
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Carl-Daniel Hailfinger [Tue, 13 May 2008 23:03:12 +0000 (23:03 +0000)]
flashrom: Move all IT87xx specific SPI routines from spi.c to a separate
file it87spi.c.
No behavioural changes, but greatly improved SPI abstraction.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3305
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Stefan Reinauer [Tue, 13 May 2008 22:14:21 +0000 (22:14 +0000)]
Add new revised inteltool that dumps all kinds of chipset information and drop old
gpio_dump utility.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3304
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Myles Watson [Tue, 13 May 2008 21:29:48 +0000 (21:29 +0000)]
This is a trivial patch which fixes the tint build by removing the extra
typedef for time_t. The other half bumps the tint patch revision in buildrom
to take advantage of it.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3303
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Carl-Daniel Hailfinger [Tue, 13 May 2008 14:58:23 +0000 (14:58 +0000)]
flashrom: Move the SPI #defines from spi.c to spi.h
This patch has no code changes.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3302
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Carl-Daniel Hailfinger [Tue, 13 May 2008 14:01:22 +0000 (14:01 +0000)]
Change the SPI parts of flashrom to prepare for a merge of
ICH9 SPI support. In theory, this patch has no behaviour changes.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3301
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Carl-Daniel Hailfinger [Mon, 12 May 2008 21:19:53 +0000 (21:19 +0000)]
MX25L3205 and W25x40 have been confirmed to probe/read/erase/write OK
by Harald Gutmann.
SST39VF040 has been confirmed to probe OK by misi e.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3300
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