Yinghai Lu [Wed, 4 Oct 2006 23:57:49 +0000 (23:57 +0000)]
get_bus_cong using sysconf instead
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2442
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Yinghai Lu [Wed, 4 Oct 2006 23:09:09 +0000 (23:09 +0000)]
add missed asl for ht chain
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2441
2b7e53f0-3cfb-0310-b3e9-
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Yinghai Lu [Wed, 4 Oct 2006 22:57:26 +0000 (22:57 +0000)]
qemu abuild fix
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2440
2b7e53f0-3cfb-0310-b3e9-
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Yinghai Lu [Wed, 4 Oct 2006 22:56:21 +0000 (22:56 +0000)]
CONFIG_USE_PRINTK_IN_CAR and ht chain id for HTX support in
serengeti_cheeatah
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2439
2b7e53f0-3cfb-0310-b3e9-
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Yinghai Lu [Wed, 4 Oct 2006 21:05:23 +0000 (21:05 +0000)]
failover_failover apc lds
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2438
2b7e53f0-3cfb-0310-b3e9-
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Yinghai Lu [Wed, 4 Oct 2006 21:04:49 +0000 (21:04 +0000)]
socket 939
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2437
2b7e53f0-3cfb-0310-b3e9-
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Yinghai Lu [Wed, 4 Oct 2006 21:00:01 +0000 (21:00 +0000)]
amdk8_sysconf
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2436
2b7e53f0-3cfb-0310-b3e9-
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Yinghai Lu [Wed, 4 Oct 2006 20:46:15 +0000 (20:46 +0000)]
AMD Rev F support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 25 Sep 2006 09:15:52 +0000 (09:15 +0000)]
rename abuild.sh to abuild.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2434
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 24 Sep 2006 23:02:26 +0000 (23:02 +0000)]
clean up epia targets
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2433
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Thu, 21 Sep 2006 20:55:58 +0000 (20:55 +0000)]
add irq for keyboard and mouse
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2432
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 21 Sep 2006 13:09:22 +0000 (13:09 +0000)]
abuild manpage and other fixes from Uwe Hermann. Thank you!
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2431
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Wed, 20 Sep 2006 16:39:30 +0000 (16:39 +0000)]
Lots of lx fixes. CLeanup mainly. THings now build
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2430
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Wed, 20 Sep 2006 16:32:59 +0000 (16:32 +0000)]
This driver is a mistake, removing it.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2429
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Tue, 19 Sep 2006 19:30:11 +0000 (19:30 +0000)]
commit moire changes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2428
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Tue, 19 Sep 2006 17:38:57 +0000 (17:38 +0000)]
add target
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2427
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Tue, 19 Sep 2006 17:37:32 +0000 (17:37 +0000)]
add the msm800srv ; put the usb in the right place.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2426
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Tue, 19 Sep 2006 16:44:14 +0000 (16:44 +0000)]
put this in the right place.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2425
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Tue, 19 Sep 2006 04:03:40 +0000 (04:03 +0000)]
resize OLPC flash
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2424
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Tue, 19 Sep 2006 03:47:35 +0000 (03:47 +0000)]
Fix the name for buildrom script
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2423
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Tue, 19 Sep 2006 03:43:30 +0000 (03:43 +0000)]
add an OLPC target for qemu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2422
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Mon, 18 Sep 2006 22:52:24 +0000 (22:52 +0000)]
add the _lx flavor of the 5536. This will later be merged into the
cs5536, but I don't want to mess up the OLPC, and we really need the lx
support NOW.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2421
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Mon, 18 Sep 2006 22:50:51 +0000 (22:50 +0000)]
fix old bug in the src/devices/pci_device.c
add devices for the lx and artecgroup/dbe61
point artecgroup at cs5536_lx as it is so different.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2420
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Mon, 18 Sep 2006 04:23:23 +0000 (04:23 +0000)]
A fix for hynix dram problems seen at 366/244
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2419
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 15 Sep 2006 23:14:37 +0000 (23:14 +0000)]
run preprocessor on hand-crafted config files in abuild, too
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2418
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 15 Sep 2006 17:00:11 +0000 (17:00 +0000)]
add option to build autobuild images with real payloads
instead of /dev/null.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2417
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Fri, 15 Sep 2006 14:53:55 +0000 (14:53 +0000)]
fix variable name for ts5300
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2416
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Thu, 14 Sep 2006 20:08:10 +0000 (20:08 +0000)]
fix stupid missing " type
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2415
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Thu, 14 Sep 2006 16:31:14 +0000 (16:31 +0000)]
fix some really yuck stuff.
now things might work.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2414
2b7e53f0-3cfb-0310-b3e9-
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Carl-Daniel Hailfinger [Thu, 14 Sep 2006 15:12:36 +0000 (15:12 +0000)]
additions and mods for lzma.
Signed-off-by: Carl-Daniel Hailfinger
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2413
2b7e53f0-3cfb-0310-b3e9-
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Indrek Kruusa [Wed, 13 Sep 2006 21:59:09 +0000 (21:59 +0000)]
changes for the lx and artecgroup mobo
Signed-off-by: Indrek Kruusa
Approved-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2412
2b7e53f0-3cfb-0310-b3e9-
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Indrek Kruusa [Wed, 13 Sep 2006 21:25:20 +0000 (21:25 +0000)]
new presents from artec group :-)
Signed-off-by: Indrek Kruusa
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2411
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Wed, 13 Sep 2006 19:30:15 +0000 (19:30 +0000)]
add file for dcon support
signed-off-by: Jordan Crouse
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2410
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Wed, 13 Sep 2006 19:29:31 +0000 (19:29 +0000)]
Add DCON support.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2409
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 13 Sep 2006 07:55:23 +0000 (07:55 +0000)]
fix cardbus interrups (signed off by Nick Barker)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2408
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 13 Sep 2006 07:52:41 +0000 (07:52 +0000)]
- fix irq routing for epia-mii cardbus slot. (signed off by Nick Barker)
- some minor cleanups
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2407
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Wed, 13 Sep 2006 04:33:07 +0000 (04:33 +0000)]
Slow down the clock, per Tom Sylla
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2406
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Wed, 13 Sep 2006 04:12:35 +0000 (04:12 +0000)]
fix for qemu northbridge, from Ed Swierk
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2405
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Wed, 13 Sep 2006 01:57:47 +0000 (01:57 +0000)]
warm boot patch from richard smith.
signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2404
2b7e53f0-3cfb-0310-b3e9-
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ronald g. minnich [Wed, 13 Sep 2006 01:14:45 +0000 (01:14 +0000)]
Fix the irq_tables
signed-off-by: ronald g. minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2403
2b7e53f0-3cfb-0310-b3e9-
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ronald g. minnich [Wed, 13 Sep 2006 01:10:08 +0000 (01:10 +0000)]
mods for qemu, these build
signed-off-by: ronald g. minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2402
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 8 Sep 2006 17:44:42 +0000 (17:44 +0000)]
add romcc manpage from Uwe Hermann
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2401
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 8 Sep 2006 16:34:51 +0000 (16:34 +0000)]
hurry hurry before we might start 3.0 ;-)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2400
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Thu, 7 Sep 2006 15:31:27 +0000 (15:31 +0000)]
remove dangerous call to normal image; no backup on OLPC
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2399
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 6 Sep 2006 16:42:51 +0000 (16:42 +0000)]
Uwe Hermann:
Here's a patch which makes all "option ROM_SIZE" lines use x*y format
which is a lot easier to read and modify, without having to use your
brain or a calculator ;-)
Tested with abuild, no errors.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 6 Sep 2006 16:15:02 +0000 (16:15 +0000)]
Add support for ITE it8705f from Uwe Hermann
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2397
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 6 Sep 2006 16:12:39 +0000 (16:12 +0000)]
Patch from Uwe Hermann:
* support for it8716f.
* minor fixes for it8712f, it8671f, it8673f
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2396
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 6 Sep 2006 15:48:48 +0000 (15:48 +0000)]
Add patch from Uwe Hermann to support more ICH southbridges
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2395
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 29 Aug 2006 17:41:14 +0000 (17:41 +0000)]
merge latest code from Uwe Hermann
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2394
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 29 Aug 2006 00:45:42 +0000 (00:45 +0000)]
it8661f support from Uwe Hermann
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2393
2b7e53f0-3cfb-0310-b3e9-
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Richard Smith [Mon, 28 Aug 2006 16:18:32 +0000 (16:18 +0000)]
- Much better USB P4 fix.
This one actualy works. You cannot just go mucking about with stuff that the VSA
has under its thumb. Bad Things happen. This does it the VSA way.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2392
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 25 Aug 2006 19:29:57 +0000 (19:29 +0000)]
Support for two new ITE superio parts: it8712f
and it8673f from Uwe Hermann.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2391
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 25 Aug 2006 19:21:42 +0000 (19:21 +0000)]
Print a warning if southbridge is not known to flashrom.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2390
2b7e53f0-3cfb-0310-b3e9-
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Richard Smith [Fri, 25 Aug 2006 16:14:31 +0000 (16:14 +0000)]
- USB P4 as host fix
This should make the USB P4 work as a USB host
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2389
2b7e53f0-3cfb-0310-b3e9-
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Richard Smith [Fri, 25 Aug 2006 14:06:48 +0000 (14:06 +0000)]
- fix a silly pointer dereference thinko in my previous commit
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2388
2b7e53f0-3cfb-0310-b3e9-
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Richard Smith [Fri, 25 Aug 2006 05:01:30 +0000 (05:01 +0000)]
- Added suport for enabling USB P4 on the olpc
USB P4 is disabled by default and we need to setup the mux bits proper
to make it work. This is the frame work for that. All thats needed
is the right address values
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2387
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 23 Aug 2006 14:33:54 +0000 (14:33 +0000)]
Removing $Id$ tags as they have no meaning in SVN
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2386
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 23 Aug 2006 14:28:37 +0000 (14:28 +0000)]
Uwe Hermann:
here's a patch which replaces all DOS newlines with Unix newlines, and
removes some useless $Rev$, $Id$, and $Header$ tags.
(part 1)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2385
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 23 Aug 2006 11:47:58 +0000 (11:47 +0000)]
enable graphs created by dot.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2384
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 23 Aug 2006 10:52:12 +0000 (10:52 +0000)]
fix special chars in document.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2383
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 22 Aug 2006 13:21:39 +0000 (13:21 +0000)]
drop extensions directory. it has never been used.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2382
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Fri, 18 Aug 2006 19:25:25 +0000 (19:25 +0000)]
delete unused device.
set rom to 512k
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2381
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Thu, 17 Aug 2006 20:31:09 +0000 (20:31 +0000)]
add smsc part. Mod sun board to use smsc part for now
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2380
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Wed, 16 Aug 2006 14:38:00 +0000 (14:38 +0000)]
updates to make gx1 IRQ map work. not tested;
signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2379
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 16 Aug 2006 14:22:10 +0000 (14:22 +0000)]
share decompression code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2378
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 15 Aug 2006 13:52:51 +0000 (13:52 +0000)]
this file is already included by auto.c on all targets.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2377
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sat, 12 Aug 2006 22:03:36 +0000 (22:03 +0000)]
update license template.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2376
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 11 Aug 2006 23:48:14 +0000 (23:48 +0000)]
cleanup patch from Uwe Hermann.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2375
2b7e53f0-3cfb-0310-b3e9-
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Richard Smith [Fri, 11 Aug 2006 08:15:19 +0000 (08:15 +0000)]
- revert Config.1M.lb back to PLCC size and add new SPI config file
SPI config file is 1M-128k to allow for EC code
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2374
2b7e53f0-3cfb-0310-b3e9-
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Richard Smith [Fri, 11 Aug 2006 06:49:39 +0000 (06:49 +0000)]
- fix dependency rule for Makefile and Makefile.settings
The make dependency rule for Makefile and Makefile.settings was completely broken. No way it ever worked.
OLPC buildrom flushed out this issue.
If you updated the Config.lb file in your target/<mfg>/<mainboard> directory and then switched to
target/<mfg>/<mainboard>/<target> and ran 'make' you would get a permission denied error due to the
make file trying to run 'config.py' directly rather than 'python config.py'
We never saw this because we always run target/buildtarget <target> and that sets up everything
correctly.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2373
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Fri, 11 Aug 2006 00:08:37 +0000 (00:08 +0000)]
build 1024-128k binary as per requests.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2372
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 10 Aug 2006 09:38:39 +0000 (09:38 +0000)]
fix serial initialization (from Uwe Hermann)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2371
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Thu, 10 Aug 2006 03:23:48 +0000 (03:23 +0000)]
change from AMD for the IRQ10 problem.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2370
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Wed, 9 Aug 2006 02:21:49 +0000 (02:21 +0000)]
mods for the ultra40 bringup. This now builds.
amd gx2 north -- don't set anything in the north, it conflicts with vsa
settings. So we have our own pci_set_resources that is essentially a
no-op -- just calls the kids.
olpc rev_a config -- DISABLE the compressed rom stream. This SHOULD NOT
have been set -- it is untested and caused real trouble.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2369
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Tue, 8 Aug 2006 21:42:18 +0000 (21:42 +0000)]
fix up the links for the ultra 40 -- i/o on ht 1 on each cpu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2368
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Tue, 8 Aug 2006 18:02:12 +0000 (18:02 +0000)]
fix up config space.
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Ronald G. Minnich [Mon, 7 Aug 2006 20:02:02 +0000 (20:02 +0000)]
initial work on sunw ultra40. It's wrong :-)
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Stefan Reinauer [Mon, 7 Aug 2006 16:48:11 +0000 (16:48 +0000)]
add support for ite/it8671f superio from Uwe Hermann.
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Stefan Reinauer [Fri, 4 Aug 2006 08:58:17 +0000 (08:58 +0000)]
p2b uses i82371eb as well.
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Stefan Reinauer [Fri, 4 Aug 2006 07:50:59 +0000 (07:50 +0000)]
final rename orgy. sorry for the inconvenience. This should fix it again
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Stefan Reinauer [Fri, 4 Aug 2006 07:47:28 +0000 (07:47 +0000)]
ouch. it's 8_2_371. I'll fix it. This commit breaks compilation
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2362
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Stefan Reinauer [Fri, 4 Aug 2006 07:45:45 +0000 (07:45 +0000)]
rename southbridge i440bx to its actual name i8371eb
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2361
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Indrek Kruusa [Thu, 3 Aug 2006 16:48:18 +0000 (16:48 +0000)]
Changelog:
* src/cpu/amd/model_lx/model_lx_init.c
L2 cache initialization removed (moved to northbridge.c)
* src/include/cpu/amd/lxdef.h
more checked values
* src/northbridge/amd/lx/northbridge.c
L2 cache initialization added
cpubug() commented out
* src/northbridge/amd/lx/raminit.c
empty function sdram_set_registers() is in use, don't remove
* src/mainboard/artecgroup/dbe61/Config.lb
irqmap changes
* src/mainboard/artecgroup/dbe61/irq_tables.c
tentative changes to irq table (currently not in use)
* src/mainboard/artecgroup/dbe61/mainboard.c
irq assigned manually to NIC
* src/mainboard/artecgroup/dbe61/Options.lb
gcc 4.0 is OK
* targets/artecgroup/dbe61/Config.lb
64K for VSA is OK at moment
Signed-off-by: Indrek Kruusa <indrek.kruusa@artecdesign.ee>
Signed-off-by: Andrei Birjukov <andrei.birjukov@artecdesign.ee>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2360
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Stefan Reinauer [Thu, 3 Aug 2006 16:19:27 +0000 (16:19 +0000)]
slightly changed C.D. Hailfinger's precompressed rom stream patch
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2359
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Stefan Reinauer [Thu, 3 Aug 2006 10:49:09 +0000 (10:49 +0000)]
some documentation updates by Uwe and some smaller ones by me.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2358
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Jonathan McDowell [Wed, 2 Aug 2006 12:46:13 +0000 (12:46 +0000)]
Allow setting of serial port speed in EPIA-M config file.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2357
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Jonathan McDowell [Wed, 2 Aug 2006 12:26:47 +0000 (12:26 +0000)]
Add newer Via Nehemiah stepping levels.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2356
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Indrek Kruusa [Wed, 2 Aug 2006 11:30:32 +0000 (11:30 +0000)]
Geode LX: this patch adds configuration/status/self-test MSR definitions
for L2 cache and fixes wrong P2D defines.
This also patch adds L2 cache initialization for Geode LX CPU.
Signed-off-by: Indrek Kruusa <indrek.kruusa@artecdesign.ee>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2355
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Stefan Reinauer [Mon, 31 Jul 2006 23:37:17 +0000 (23:37 +0000)]
Add support for SST39SF040 and SST39SF010A
apply C.-D. Hailfinger's patch for Winbond part (untested)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2354
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Richard Smith [Sun, 30 Jul 2006 00:23:20 +0000 (00:23 +0000)]
- Fix some copy bugs and thinkos in the i440bx SMbus
read code. SBbus reads to RAM now work. Yah!
- Rename the register constants to something I can look at
more easily.
- Make the logic flow match the flow from V1 assembly
- #if 0 out other SMbus functions that are still broken.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2353
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Richard Smith [Sat, 29 Jul 2006 18:01:43 +0000 (18:01 +0000)]
- fixup Bitworks/IMS to use private copy of SMbus debug routines
Re-enable the SPD dump routine in this Bitworks/IMS code and make
it work like the Asus/p2b. This avoids having to hack the
sdram/generic_dump_spd.c for a single mem controller.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2352
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Richard Smith [Sat, 29 Jul 2006 17:40:36 +0000 (17:40 +0000)]
- Add support _framework_ for the Asus p2b.
- New superIO winbond/w83977tf
- Add single memory controller SBbus debug routine
into a file private to the i440bx
This adds support the start of support for an Asus p2b
mainboard. Current limitations are the same as for the
Bitworks IMS board. Reads from the SMbus don't work.
Moving dump_spd_registers() into its own private copy
solves the problem of having to go hack on the version that
included in src/sdram to only do one memory controller.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2351
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Ron Minnich [Fri, 28 Jul 2006 16:06:16 +0000 (16:06 +0000)]
This patch adds support for the AMD LX cpu.
There is one global change to pci_ids.h. The rest are changes for LX. I
ran abuild and it is ok. Not all artec design changes are included as
some of them would adversely affect other mainboards. Indrek will need
to test.
Signed-off-by: Ron Minnich
Signed-off-by: Indrek Kruusa, indrek.kruusa@artecdesign.ee, artec
design.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2350
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Stefan Reinauer [Thu, 27 Jul 2006 23:29:02 +0000 (23:29 +0000)]
add flashrom manpage from Uwe Hermann
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Ronald G. Minnich [Thu, 27 Jul 2006 04:05:43 +0000 (04:05 +0000)]
"Hey Ron - Attached is a simple patch that enables the upper banks on the
UART. If the upper banks are enabled, then the Linux 8250 driver knows
how to set baud speeds greater then 115200. This was prompted by David
Woodhouse.
Jordan"
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2348
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Richard Smith [Mon, 24 Jul 2006 04:25:47 +0000 (04:25 +0000)]
add framework for i440bx chipset
add support for NSC pc87351 SuperIO
add Bitworks/IMS manboard config
This is a very basic framework for the i440bx chipset and the
Bitworks IMS board that uses it. Most things are
structure only.
Known issues:
- SMbus reads to the RAM SPD come back
all zero.
- dump_spd_registers() is commented out since it breaks with
the default setting of generic_dump_spd.c where it wants
2 memory controllers.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347
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Ronald G. Minnich [Fri, 21 Jul 2006 23:21:01 +0000 (23:21 +0000)]
restore the old code for enabling flash. The new amd code did not work.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2346
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Ronald G. Minnich [Fri, 21 Jul 2006 19:21:38 +0000 (19:21 +0000)]
These changes incorporate steve goodrich'es fixes, and one bug that is
disabled.
cs5536: add new entires for SB control etc.
cs5536.c: chip_enabled function moved to chip_init, so it only gets run
once.
IRQ setup improved
gx2def.h: new defines added
vr.h: new file, with new def's for virtual register control.
mainboard config.lb: new entries added for nb and sb control.
chipsetinit.c: new controls added -- I forget all the details :-)
grphinit.c: new function added
northbridge.c: new IRQ control added. FlashChipSetup added, controlled
by chip info setupflash struct member. Currently, if enabled, this hangs
OLPC in linux PCI scan.
chip.h: new struct members added for unwanted device enable, flash setup
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2345
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Josiah England [Thu, 20 Jul 2006 15:35:04 +0000 (15:35 +0000)]
New analysis tool with preliminary source usage information gathering.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2344
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Stefan Reinauer [Wed, 19 Jul 2006 16:58:43 +0000 (16:58 +0000)]
this code is for writing the mp table, so only execute it when
we actually have one.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2343
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