wurms gitweb - coreboot.git/log

This target is dead.

The company is dead.

It causes builds to fail, and that is not a problem we need to have.

Removing it to remove the problems it causes.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3945 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Increase ROM_IMAGE_SIZE for the agami aruma to resolve overlapping
sections.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3944 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This patch converts __FUNCTION__ to __func__, since __func__ is standard.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix mtrr setup for UMA architectures.

If high SMM memory is used (and needs to be uncached for whatever reason; it
shouldn't in my opinion), we should do it the same way.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3942 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix typo in PCI ID (1914 should have been 7914).

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3941 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Remove dead lines. Trivial.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3940 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Rename TOM to TOM1 and refer to the SSDT value with an External(TOM1)
clause.

An ITE87427 Super I/O does not exist. Use the real name (IT8712F) of
the chip on the DBM690T board.

Use decimal values for KELV, THOT and TCRT on the Pistachio board for
better readability.

Tested by Maggie Li on DBM690T and Pistachio.
Tested by Carl-Daniel Hailfinger on Asus M2A-VM.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Improve mainboard.c comments for DBM690T and Pistachio.
Fix reference to documentation.
Use __FUNCTION__ instead of hardcoding function names in printk
messages.

No functional changes.

I'm slowly getting to the point where adding another RS690 board is
really easy and needs almost no changes to the existing target.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3938 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Print a loud warning message if we run out of MTRRs.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3937 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix one leftover reference to AmlCode_ssdt which was forgotten in r3929.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3936 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix bayou payload execution.

Bayou must link with its own ldscript to end up at a load address that
doesn't interfere with payloads. Make Bayou's ldscript MB compatible, so
the link with libpayload/lib/i386/head.o succeeds.

Signed-off-by: Ulf Jordan <jordan@chalmers.se>
Acked-by: Jordan Crouse <jordan@cosmicpenguin.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3935 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Change 0x%p to %p. Thanks Stefan for catching the one I introduced in 3931.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Fix broken flash chip base address logic

Elan SC520 requries us to deal with flash chip base addresses at locations
other than top of 4GB. The logic for that was incorrectly triggered also when
a board had more than one flash chip. This patch will honor flashbase only when
probing for the first flash chip on the board, and look at top of 4GB for later
chips.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Remove some warnings, mainly from format strings which didn't match the
arguments.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3931 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Use the correct device for switching on HDA.

Reorder HDA (HD Audio) init:
The reordering was based on what order things happen in the BIOS
Developers guide, RPR, and SATA driver. I fixed the order of the devices
that didn't matter to clean up the change log.
1. Enable the Chip
2. Setup the SMBus registers
3. Setup the Device Registers
4. Look for Codec
5. Init Codec

The codec init was changed to match the description in the RRG pg 235.
Mem Reg: Base + 08h Bit 0. There were unneeded things happening.

Added 1ms delay to match the BKDG while waiting for BAR+0xe to set its
bits.

Signed-off-by: Dan Lykowski <lykowdk@gmail.com>
Tested on AMD DBM690T and AMD Pistachio by Maggie Li. Works.

Tested on Asus M2A-VM by Carl-Daniel Hailfinger. Improves the situation,
but some warnings remain.

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3930 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Following patch converts the run-time SSDT patching via update_ssdt funtion to
new AML code generator. Compile-tested on all changed targets. I think it should
work because it works for Asus M2V-MX SE.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Following patch adds missing CPU names. Please check
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf
if I did not made any mistake.

Works for mine CPU ;)

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: MSI MS-7046 board enable

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: David Tiemann <davidtiemann@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3927 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Following patch fixes VIA SPI (VT8237S). It needs to have opcodes
initialized same way as ICH7.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Following patch adds dynamic ACPI AML code generator which can be used to
generate run-time ACPI ASL code.

Moreover it demonstrates its use on Asus M2V-MX SE where the SSDT table is
generated by new function k8acpi_write_vars (technically similar to
update_ssdt). But lot of nicer.
x
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Bring AMD K8 ACPI mangling more in line with Fam10 ACPI mangling. No
functional changes, only a little bit of (mostly formatting) cleanup to
make merging easier.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3924 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Factor out read and erase functions from flashrom main().

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Correct FDAT->FADT typo.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3922 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

msrtool: Allow MSR symbols (names) to also be used as addresses.

Thanks for the idea Mart!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

msrtool: Linux /dev/cpu/*/msr returns the low 32 bits before the high 32 bits.

Thanks to Mart for spotting this!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3920 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Add VT8237A PCI ID

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Fix one dead increment and one dead assignment as found by clang.

Thanks Patrick!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3918 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Driver for ST M29F002T/NT/B. T/NT TEST_OK_ PROBE READ ERASE WRITE

Test report from Julia. Thanks!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Julia Longtin <juri@solarnetone.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3917 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Fix copypaste error in r3913.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3916 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

msrtool: AMD CS5536 probe implementation.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3915 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

msrtool: Make configure work with zsh, the default shell in Darwin.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: SST25VF040B using 0x90 identification and AAI write.

SST AAI is Auto Address Increment writing, a streamed write to the flash chip
where the first write command sets a starting address and following commands
simply append data. Unfortunately not supported by Winbond SPI masters.

From July 2008.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Decode SST25VF040B status register, also from July 2008.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Intel Desktop Board D201GLY

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Winbond SuperIO SPI driver.

Developed and tested to work on Intel D201GLY in July 2008.
Tested by a helpful person on IRC whose name I've since forgotten. Sorry!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Export Winbond SuperIO register access functions in board_enable.c.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3909 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Document exit() codes introduced in r3907.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: exit(2) on /dev/mem open() failure and exit(3) on mmap() failure.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3907 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Add license header to physmap.c so everyone is happy. :)

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3906 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Darwin / Mac OS X

Through DirectIO from coresystems GmbH we now support Darwin/Mac OS X.
DirectIO is available at http://www.coresystems.de/en/directio

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Small cleanup in Makefile.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3904 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Abstract mmap() in physmap.c and only open /dev/mem on the first physmap() call.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3903 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

fix a potential null pointer reference in strdup (as found by Patrick Georgi)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3902 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Change flashrom.c:map_flash_registers() from int to void.

The function exit()s on failure, and no callers check the return value.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3901 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Forgot some things in r3899.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Little readability improvement in cbtable.c:coreboot_init()

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3899 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Change FreeBSD #ifdef into #if defined()

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Make Makefile a bit more portable. Shell echo doesn't always know -n.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3897 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Add dry Am29F080B Am29LV081B SST39VF080 definitions per data sheets.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Beautify flash chip ID verbose printout a little, always use %02x.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3895 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Fix stupid off-by-one error in erase verification.

As reported by Jody McIntyre. Thanks!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3894 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: ST M50FW080 TEST_OK_ PROBE READ ERASE WRITE

Report by Jody McIntyre. Thanks!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: SST25VF080B TEST_OK_PROBE

Report by Scaldov M.V. Thanks!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix rs690 bug about GPPSB configuration.
Signed-off-by: Maggie Li <maggie.li@amd.com>
Reviewed-by: Zheng Bao <Zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Check all mmap() calls and print helpful Linux error message.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Provide some hints for the user in case /dev/mem mmap fails.

resolves #121

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3889 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Now that x86emu debugging is actually working, it should be switched off per
default because it adds quite noticably to the image size.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3888 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

forgot to svn add

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Update Kontron board

- use new features of the ich7 update
- move rambase above 1M to avoid memory trashing through SMM relocation
- enable superio HWM

Update ICH7 driver

- minor smi cosmetics (in progress)
- add real ac97 driver
- add real azalia driver
- fix some interrupt issues
- fix some sata issues
- include Patrick's fix for _lpc.c

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

fix small TOLUD issue in i945 raminit (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

put in a little comment (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3884 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

some brown paperbag please. fix build.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

fix compiler warnings (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

add a header file for i8259.h (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3881 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Backport all x86emu fixes from Pattrick Hueper to coreboot v2 (acked in v2,
hence I consider it trivial in this case). This does not include the Yabel
work.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix register typo for core 2 cpus (trivial)

This bug was reported a long time ago by Thomas Jourdan. Thanks a lot Thomas.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This fine work by Jon Dufresne was awkwardly rotting on the mailing list for
almost three years. Let's put it somewher so people find it if they're looking
for it. Someone dare sending a late announcement to the coreboot-announce list?
:-)

Add (preliminary) support for Intel 855GME (Mobile version of the 855) chipset
to coreboot.

There are some holes in the code to be filled out, but unlike the code for the
855pm this has booted a mainboard before.

Signed-off-by: Jon Dufresne <jon.dufresne@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This patch makes the recently added assembler debug optional, as it may
cause problems with certain toolchains. This patch will also safe some hard
disk space for those of us working on laptops or netbooks with always too small
disks.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

fix inconsistent user interface naming. don't show compile paths to users
during bootup (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

fix coding style (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Trivial stuff:

* fix a warning that should not be one.
* fix capitalization typo

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Check the printk format string against the matching arguments. We have
this type of checking in the v3 code since ages, but v2 will happily
compile any code with bogus printk format strings and/or parameters.
This can cause real bugs and at least needs to emit a warning, if not
an
error. Go with a warning for now since most of the flagged format
strings are wrong but harmless in a 32-bit x86 environment.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

ouch. never do last minute changes. :-(
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

First shot at factoring SMM code into generic parts and southbridge specific
parts.

This should help to reduce the code duplication for Rudolf's K8/VIA SMM
implementation...

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Fix ICH9 locking register address and add important debug output.

Signed-off-by: FENG yu ning <fengyuning1984@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: FENG yu ning <fengyuning1984@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

The DBM90T code sets bit 10 in _PSS as part of the control value, but
bit 10 is part of NewVID. That means the resulting VID is wrong and
causes the processor to crash.
The Pistachio code has the same bug.

This patch fixes the wrong setting and changes control from a magic and
incorrect unexplained value (0xE8202C00) to a combination of explained
values and shifts which has the right value (0xE8202800).

It is tested on my machine and it survived 200 changes from minimum to
maximum frequency every 100 ms under heavy load and under no load.

In the long term we want to consolidate all AMD FIDVID code into one
generic library file.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Maggie Li has tested it on her DBM690T board. It is ok.
Acked-by: Maggie li <Maggie.li@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

First part of heterogenous dualchannel support.

Do not allow non-identical DIMMs yet, but prepare the code.

Calculate tCL related settings per DIMM in a dual channel setup. The
check for compatibility will come in a later patch, but since DIMMs
still have to be identical, this does not hurt.

Factor out tRC calculation to prepare for per-DIMM calculation.

Add diagnostic messages to tRC code.

Test booted to FILO, behaviour is identical if you ignore the added
debug messages (which are switched off by default).

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Refactor K8 rev F DDR2 CL timing retrieval.
This will allow usage of compatible DIMMS in a dual channel setup
instead of requiring the DIMMS to be identical.

Code impact is minimal because a large chunk of code has been moved into
a separate function with almost no changes.

Tested, yields identical results and identical logs.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Since all K8 targets now have CONFIG_USE_PRINTK_IN_CAR enabled, using
print_* in K8 RAM init does not make sense anymore. Convert almost all
print_* to printk_*. This improves readability a lot and makes the code
shorter.

Reorder the SPD equality checks in the dual channel DIMM compatibility
checking code. This is to make sure that we know if any other mismatches
are present in the DIMM. The new order eases debugging with the old
code.
Add a comment about false negatives in that code. This needs to be
implemented correctly, but that is hard to do in an efficient way.
Check if the DIMMS in a dual channel setup have any compatible CAS
latencies.

Add better comments to explain why wrong-at-first-glance SPD CL walking
code is actually correct.

Fix a few typos.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Adds a retry/faildown to SB600 SATA detection logic.

SATA port status kept returning 0x1: BAR5+po+28h
1h = Device presence detected but Phy communication not established

This patch adds logic to force 1.5g if the drive fails to communicate at 3.0g.

Signed-off-by: Dan Lykowski <lykowdk@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

amdk8: This patch fixes ram init problems when using the 9W Sempron part.

Trying to read the FIDVID register when the processor does not support FIDVID
control causes a GP Fault. This patch reads the startup FID from a different
MSR. I have verified this patch to work on the dbm690t platform.

Signed-off-by: Dan Lykowski <lykowdk@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Add ICH opcode debugging.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Similarly to flashchips array, this patch intends to make the table
board_pciid_enables more readable.

Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
> What real problem does this solve?

1. Next time someone adds a new struct member, we avoid mistakes of
ordering of initializers
2. we avoid mistakes in the first place.

The .x = y stuff was added for a (good) reason, I think this is an
improvement.
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Always print address when verification fails, not only with -V.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Board enable for GIGABYTE GA-MA78G-DS3H

This board has 2x MX25L8005 flash chips behind an IT8718F LPC->SPI bridge.
The board uses GIGABYTE's patented BIOS failover technology, and at this point
we do not know how to control which of the two chips flashrom actually hits.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Yul Rottmann <yulrottmann@bitel.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: IT8718F works just like IT8716F.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Yul Rottmann <yulrottmann@bitel.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Check return value of fscanf()/fwrite()/fread()

Fix build error on distros with warn_unused_result attributes in glibc.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Yul Rottmann <yulrottmann@bitel.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3857 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Check to see if K8 processor is capable of changing FIDVID otherwise it will throw a GP# when reading FIDVID_STATUS

Signed-off-by: Dan Lykowski <lykowdk@gmail.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Update usage in README

Mimicked from flashrom.c

Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3855 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Ignore some more sections, created by newer toolchains

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3854 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add erase and write functions to the following chip definitions:

AT25DF021 AT25DF041A AT25DF081 AT25DF161 AT25DF321 AT25DF321A AT25DF641
AT25F512B AT25FS010 AT25FS040 AT26DF081A AT26DF161 AT26DF161A AT26DF321
AT26F004

Straight from the data sheets, untested because I lack the hardware.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3853 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

The flashrom man page has incomplete author/copyright sections and an
incorrect license section.
- Remove the copyright listings and refer the reader to the source
files.
- Update the author list to those which have copyright messages in the
source files.
- Correct the license from GPL v2+ to (GPL v2, with some files under
later versions as well)

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3852 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This patch improves machine parseability and human readability of
flashchips.c over what's currently in flashrom HEAD.
The explicit initialization makes sure any future struct flashchip
reordering is not needed. (Except for the case where we need arrays
of some of the struct members.)

Signed-off-by: Stephan Guilloux <mailto:stephan.guilloux@free.fr>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3851 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add SST49LF020 support.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add AMD-768 chipset support.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add i631x LPC support.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3848 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

The ACPI PSS CPU Pstate table was calculating the frequency incorrectly for
revF CPUs. The 100MHz/200MHz stepping is already handled in the FID setting
and doesn't need to be checked to set the fid_multiplier. The multiplier is
always 100.

Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: zheng bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3847 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add support for the Winbond W83627UHG Super I/O.

Signed-off-by: Dan Lykowski <lykowdk@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3846 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1