sum += addr[i];
printk_debug("%s(): Interrupt Routing Table located at %p.\n",
- __FUNCTION__, addr);
+ __func__, addr);
sum = rt->checksum - sum;
#if CONFIG_DEBUG_MPTABLE == 1
printk_info("add intsrc srcbus 0x%x srcbusirq 0x%x, dstapic 0x%x, dstirq 0x%x\n",
srcbus, srcbusirq, dstapic, dstirq);
- hexdump(__FUNCTION__, mpc, sizeof(*mpc));
+ hexdump(__func__, mpc, sizeof(*mpc));
#endif
}
{
msr_t msr;
- printk_debug("CPU_BUG:%s\n", __FUNCTION__);
+ printk_debug("CPU_BUG:%s\n", __func__);
/* Clear bit 43, disables the sysenter/sysexit in CPUID3 */
msr = rdmsr(0x3003);
msr.hi &= 0xFFFFF7FF;
void sc520_enable_resources(struct device *dev) {
unsigned char command;
- printk_spew("%s\n", __FUNCTION__);
+ printk_spew("%s\n", __func__);
command = pci_read_config8(dev, PCI_COMMAND);
- printk_spew("========>%s, command 0x%x\n", __FUNCTION__, command);
+ printk_spew("========>%s, command 0x%x\n", __func__, command);
command |= PCI_COMMAND_MEMORY | PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
- printk_spew("========>%s, command 0x%x\n", __FUNCTION__, command);
+ printk_spew("========>%s, command 0x%x\n", __func__, command);
pci_write_config8(dev, PCI_COMMAND, command);
command = pci_read_config8(dev, PCI_COMMAND);
- printk_spew("========>%s, command 0x%x\n", __FUNCTION__, command);
+ printk_spew("========>%s, command 0x%x\n", __func__, command);
/*
*/
static void pci_domain_read_resources(device_t dev)
{
struct resource *resource;
- printk_spew("%s\n", __FUNCTION__);
+ printk_spew("%s\n", __func__);
/* Initialize the system wide io space constraints */
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
resource->limit = 0xffffUL;
unsigned long basek, unsigned long sizek)
{
struct resource *resource;
- printk_spew("%s sizek 0x%x\n", __FUNCTION__, sizek);
+ printk_spew("%s sizek 0x%x\n", __func__, sizek);
if (!sizek) {
return;
}
{
struct resource *min;
uint32_t tolm;
- printk_spew("%s\n", __FUNCTION__);
+ printk_spew("%s\n", __func__);
min = 0;
search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
tolm = 0xffffffffUL;
if (min && tolm > min->base) {
tolm = min->base;
}
- printk_spew("%s returns 0x%x\n", __FUNCTION__, tolm);
+ printk_spew("%s returns 0x%x\n", __func__, tolm);
return tolm;
}
{
device_t mc_dev;
uint32_t pci_tolm;
- printk_spew("%s\n", __FUNCTION__);
+ printk_spew("%s\n", __func__);
pci_tolm = find_pci_tolm(&dev->link[0]);
mc_dev = dev->link[0].children;
if (mc_dev) {
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
{
- printk_spew("%s\n", __FUNCTION__);
+ printk_spew("%s\n", __func__);
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
return max;
}
#if 0
void sc520_enable_resources(device_t dev) {
- printk_spew("%s\n", __FUNCTION__);
+ printk_spew("%s\n", __func__);
printk_spew("THIS IS FOR THE SC520 =============================\n");
/*
command = pci_read_config8(dev, PCI_COMMAND);
- printk_spew("%s, command 0x%x\n", __FUNCTION__, command);
+ printk_spew("%s, command 0x%x\n", __func__, command);
command |= PCI_COMMAND_MEMORY;
- printk_spew("%s, command 0x%x\n", __FUNCTION__, command);
+ printk_spew("%s, command 0x%x\n", __func__, command);
pci_write_config8(dev, PCI_COMMAND, command);
command = pci_read_config8(dev, PCI_COMMAND);
- printk_spew("%s, command 0x%x\n", __FUNCTION__, command);
+ printk_spew("%s, command 0x%x\n", __func__, command);
*/
enable_childrens_resources(dev);
- printk_spew("%s\n", __FUNCTION__);
+ printk_spew("%s\n", __func__);
}
#endif
static void enable_dev(struct device *dev)
{
- printk_spew("%s\n", __FUNCTION__);
+ printk_spew("%s\n", __func__);
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
}
printk_spew("call enable_var_mtrr()\n");
enable_var_mtrr();
- printk_spew("Leave %s\n", __FUNCTION__);
+ printk_spew("Leave %s\n", __func__);
post_code(0x6A);
}
printk_spew("32-bit delta %d\n", (unsigned long) delta);
printk_spew("%s 32-bit result is %d\n",
- __FUNCTION__,
+ __func__,
result);
return delta;
}
{
void *p;
- MALLOCDBG(("%s Enter, size %d, free_mem_ptr %p\n", __FUNCTION__, size, free_mem_ptr));
+ MALLOCDBG(("%s Enter, size %d, free_mem_ptr %p\n", __func__, size, free_mem_ptr));
if (size < 0)
die("Error! malloc: Size < 0");
if (free_mem_ptr <= 0)
static void init(struct device *dev)
{
- printk_debug("AMD DB800 ENTER %s\n", __FUNCTION__);
- printk_debug("AMD DB800 EXIT %s\n", __FUNCTION__);
+ printk_debug("AMD DB800 ENTER %s\n", __func__);
+ printk_debug("AMD DB800 EXIT %s\n", __func__);
}
static void enable_dev(struct device *dev)
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk_info("%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
- __FUNCTION__, msr.lo, msr.hi);
+ __func__, msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk_info("%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
- __FUNCTION__, msr2.lo, msr2.hi);
+ __func__, msr2.lo, msr2.hi);
switch (msr.lo) {
case 0x10000000: /* 256M system memory */
uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */
printk_info("%s: uma size 0x%08x, memory start 0x%08x\n",
- __FUNCTION__, uma_memory_size, uma_memory_start);
+ __func__, uma_memory_size, uma_memory_start);
/* TODO: TOP_MEM2 */
#else
static void init(struct device *dev)
{
- printk_debug("Norwich ENTER %s\n", __FUNCTION__);
- printk_debug("Norwich EXIT %s\n", __FUNCTION__);
+ printk_debug("Norwich ENTER %s\n", __func__);
+ printk_debug("Norwich EXIT %s\n", __func__);
}
static void enable_dev(struct device *dev)
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk_info("%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
- __FUNCTION__, msr.lo, msr.hi);
+ __func__, msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk_info("%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
- __FUNCTION__, msr2.lo, msr2.hi);
+ __func__, msr2.lo, msr2.hi);
switch (msr.lo) {
case 0x10000000: /* 256M system memory */
uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */
printk_info("%s: uma size 0x%08x, memory start 0x%08x\n",
- __FUNCTION__, uma_memory_size, uma_memory_start);
+ __func__, uma_memory_size, uma_memory_start);
/* TODO: TOP_MEM2 */
#else
if (mainboard->nicirq)
nicirq = mainboard->nicirq;
- printk_debug("AMD RUMBA ENTER %s\n", __FUNCTION__);
+ printk_debug("AMD RUMBA ENTER %s\n", __func__);
if (nicirq) {
printk_debug("%s (%x,%x)SET PCI interrupt line to %d\n",
- __FUNCTION__, bus, devfn, nicirq);
+ __func__, bus, devfn, nicirq);
nic = dev_find_slot(bus, devfn);
if (! nic){
printk_err("Could not find NIC\n");
pci_write_config8(nic, PCI_INTERRUPT_LINE, nicirq);
}
}
- printk_debug("AMD RUMBA EXIT %s\n", __FUNCTION__);
+ printk_debug("AMD RUMBA EXIT %s\n", __func__);
}
static void enable_dev(struct device *dev)
static void init(struct device *dev)
{
// BOARD-SPECIFIC INIT
- printk_debug("ARTECGROUP DBE61 ENTER %s\n", __FUNCTION__);
+ printk_debug("ARTECGROUP DBE61 ENTER %s\n", __func__);
init_gpio();
- printk_debug("ARTECGROUP DBE61 EXIT %s\n", __FUNCTION__);
+ printk_debug("ARTECGROUP DBE61 EXIT %s\n", __func__);
}
static void enable_dev(struct device *dev)
*/
/* currently, nothing in the device to use, so ignore it. */
- printk_err("digital logic msm586 seg ENTER %s\n", __FUNCTION__);
+ printk_err("digital logic msm586 seg ENTER %s\n", __func__);
/* from fuctory bios */
mmcr->sysarb.prictl = 0xc0000f0f;
/* this is bios setting, depends on sysarb above */
mmcr->hostbridge.ctl = 0x108;
- printk_err("digital logic msm586 seg EXIT %s\n", __FUNCTION__);
+ printk_err("digital logic msm586 seg EXIT %s\n", __func__);
/* pio */
mmcr->pio.data31_16 = 0xffbf;
static void init(struct device *dev)
{
- printk_debug("MSM800SEV ENTER %s\n", __FUNCTION__);
- printk_debug("MSM800SEV EXIT %s\n", __FUNCTION__);
+ printk_debug("MSM800SEV ENTER %s\n", __func__);
+ printk_debug("MSM800SEV EXIT %s\n", __func__);
}
static void enable_dev(struct device *dev)
{
struct mainboard_lippert_roadrunner_lx_config *mb = dev->chip_info;
unsigned int gpio_base, i;
- printk_debug("LiPPERT RoadRunner-LX ENTER %s\n", __FUNCTION__);
+ printk_debug("LiPPERT RoadRunner-LX ENTER %s\n", __func__);
/* Init CS5536 GPIOs. */
gpio_base = pci_read_config32(dev_find_device(PCI_VENDOR_ID_AMD,
}
outb(mb->sio_gp1x_config, 0x1220); /* Simple-I/O GP17-10 */
- printk_debug("LiPPERT RoadRunner-LX EXIT %s\n", __FUNCTION__);
+ printk_debug("LiPPERT RoadRunner-LX EXIT %s\n", __func__);
}
static void enable_dev(struct device *dev)
{
struct mainboard_lippert_spacerunner_lx_config *mb = dev->chip_info;
unsigned int gpio_base, i;
- printk_debug("LiPPERT SpaceRunner-LX ENTER %s\n", __FUNCTION__);
+ printk_debug("LiPPERT SpaceRunner-LX ENTER %s\n", __func__);
/* Init CS5536 GPIOs */
gpio_base = pci_read_config32(dev_find_device(PCI_VENDOR_ID_AMD,
}
outb(mb->sio_gp1x_config, 0x1220); /* Simple-I/O GP17-10 */
- printk_debug("LiPPERT SpaceRunner-LX EXIT %s\n", __FUNCTION__);
+ printk_debug("LiPPERT SpaceRunner-LX EXIT %s\n", __func__);
}
static void enable_dev(struct device *dev)
unsigned char usbirq = 0xa;
*/
- printk_debug("OLPC BTEST ENTER %s\n", __FUNCTION__);
+ printk_debug("OLPC BTEST ENTER %s\n", __func__);
#if 0
/* I can't think of any reason NOT to just set this. If it turns out we want this to be
*/
printk_debug("%s (%x,%x)SET USB PCI interrupt line to %d\n",
- __FUNCTION__, bus, devfn, usbirq);
+ __func__, bus, devfn, usbirq);
usb = dev_find_slot(bus, devfn);
if (! usb){
printk_err("Could not find USB\n");
init_dcon();
init_cafe_irq();
- printk_debug("OLPC BTEST EXIT %s\n", __FUNCTION__);
+ printk_debug("OLPC BTEST EXIT %s\n", __func__);
}
static void enable_dev(struct device *dev)
unsigned char usbirq = 0xa;
*/
- printk_debug("OLPC REVA ENTER %s\n", __FUNCTION__);
+ printk_debug("OLPC REVA ENTER %s\n", __func__);
#if 0
/* I can't think of any reason NOT to just set this. If it turns out we want this to be
*/
printk_debug("%s (%x,%x)SET USB PCI interrupt line to %d\n",
- __FUNCTION__, bus, devfn, usbirq);
+ __func__, bus, devfn, usbirq);
usb = dev_find_slot(bus, devfn);
if (! usb){
printk_err("Could not find USB\n");
#endif
init_dcon();
- printk_debug("OLPC REVA EXIT %s\n", __FUNCTION__);
+ printk_debug("OLPC REVA EXIT %s\n", __func__);
}
static void enable_dev(struct device *dev)
static void init(struct device *dev)
{
- printk_debug("ALIX1.C ENTER %s\n", __FUNCTION__);
- printk_debug("ALIX1.C EXIT %s\n", __FUNCTION__);
+ printk_debug("ALIX1.C ENTER %s\n", __func__);
+ printk_debug("ALIX1.C EXIT %s\n", __func__);
}
static void enable_dev(struct device *dev)
volatile struct mmcr *mmcr = MMCRDEFAULT;
/* currently, nothing in the device to use, so ignore it. */
- printk_err("Technologic Systems 5300 ENTER %s\n", __FUNCTION__);
+ printk_err("Technologic Systems 5300 ENTER %s\n", __func__);
/* from fuctory bios */
/* NOTE: the following interrupt settings made interrupts work
rom_start = 0x09400000 + 0xe0000;
rom_end = rom_start + PAYLOAD_SIZE - 1;
- printk_err("TS5300 EXIT %s\n", __FUNCTION__);
+ printk_err("TS5300 EXIT %s\n", __func__);
}
static void northbridge_init(device_t dev)
{
- printk_debug("northbridge: %s()\n", __FUNCTION__);
+ printk_debug("northbridge: %s()\n", __func__);
optimize_xbus(dev);
enable_shadow(dev);
{
struct resource *resource;
- printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__);
+ printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__);
/* Initialize the system wide io space constraints */
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
static void cpu_bus_init(device_t dev)
{
- printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__);
+ printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__);
initialize_cpus(&dev->link[0]);
}
static void enable_dev(struct device *dev)
{
- printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__);
+ printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__);
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
printk_spew("DEVICE_PATH_PCI_DOMAIN\n");
/* Set up IRQ steering */
uint32_t pciAddr = 0x80000000 | (CHIPSET_DEV_NUM << 11) | 0x5C;
- printk_debug("%s(%08X [%08X], %04X)\n", __FUNCTION__, dev, pciAddr, irq_map);
+ printk_debug("%s(%08X [%08X], %04X)\n", __func__, dev, pciAddr, irq_map);
/* The IRQ steering values (in hex) are effectively dcba, where:
* <a> represents the IRQ for INTA,
unsigned long m;
struct northbridge_amd_gx2_config *nb = (struct northbridge_amd_gx2_config *)dev->chip_info;
- printk_debug("northbridge: %s()\n", __FUNCTION__);
+ printk_debug("northbridge: %s()\n", __func__);
enable_shadow(dev);
irq_init_steering(dev, nb->irqmap);
{
struct resource *resource;
- printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__);
+ printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__);
/* Initialize the system wide io space constraints */
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
msr.lo = gl->lo;
msr.hi = gl->hi;
wrmsr(gl->desc_name, msr); // MSR - see table above
- printk_debug("%s: write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo);
+ printk_debug("%s: write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
/* they do this, so we do this */
msr = rdmsr(gl->desc_name);
- printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo);
+ printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
}
static void
* system. We will adjust for SMM and DMM now and Frame Buffer later.
*/
sizembytes = sizeram();
- printk_debug("%s: enable for %dm bytes\n", __FUNCTION__, sizembytes);
+ printk_debug("%s: enable for %dm bytes\n", __func__, sizembytes);
sizebytes = sizembytes << 20;
sizebytes -= SMM_SIZE*1024 +1;
msr.lo = sizebytes;
wrmsr(gl->desc_name, msr); // MSR - see table above
msr = rdmsr(gl->desc_name);
- printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__,
+ printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__,
gl->desc_name, msr.hi, msr.lo);
}
if (! havedmi)
return;
- printk_debug("%s: %d bytes\n", __FUNCTION__, sizebytes);
+ printk_debug("%s: %d bytes\n", __func__, sizebytes);
sizebytes -= DMM_SIZE*1024;
offset = sizebytes - DMM_OFFSET;
- printk_debug("%s: offset is 0x%08x\n", __FUNCTION__, offset);
+ printk_debug("%s: offset is 0x%08x\n", __func__, offset);
offset >>= 12;
msr.hi = (gl->hi) | (offset << 8);
/* I don't think this is needed */
wrmsr(gl->desc_name, msr); // MSR - See table above
msr = rdmsr(gl->desc_name);
- printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo);
+ printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
}
static void
if (! havedmi)
return;
- printk_debug("%s:\n", __FUNCTION__ );
+ printk_debug("%s:\n", __func__ );
msr.hi = gl->hi;
/* I don't think this is needed */
msr.hi |= (DMM_OFFSET >> 24);
msr.lo = DMM_OFFSET << 8;
/* hmm. AMD source has SMM here ... SMM, not DMM? We think DMM */
- printk_err("%s: warning, using DMM_SIZE even though AMD used SMM_SIZE\n", __FUNCTION__);
+ printk_err("%s: warning, using DMM_SIZE even though AMD used SMM_SIZE\n", __func__);
msr.lo |= ((~(DMM_SIZE*1024)+1)>>12)&0xfffff;
wrmsr(gl->desc_name, msr); // MSR - See table above
msr = rdmsr(gl->desc_name);
- printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo);
+ printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
}
static void
SMMGL0Init(struct gliutable *gl) {
if (havedmi)
sizebytes -= DMM_SIZE * 1024;
- printk_debug("%s: %d bytes\n", __FUNCTION__, sizebytes);
+ printk_debug("%s: %d bytes\n", __func__, sizebytes);
offset = sizebytes - SMM_OFFSET;
- printk_debug("%s: offset is 0x%08x\n", __FUNCTION__, offset);
+ printk_debug("%s: offset is 0x%08x\n", __func__, offset);
offset >>= 12;
msr.hi = offset << 8;
wrmsr(gl->desc_name, msr); // MSR - See table above
msr = rdmsr(gl->desc_name);
- printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo);
+ printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
}
static void
SMMGL1Init(struct gliutable *gl) {
msr_t msr;
- printk_debug("%s:\n", __FUNCTION__ );
+ printk_debug("%s:\n", __func__ );
msr.hi = gl->hi;
/* I don't think this is needed */
wrmsr(gl->desc_name, msr); // MSR - See table above
msr = rdmsr(gl->desc_name);
- printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo);
+ printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
}
static void
for(i = 0; gating->msrnum != 0xffffffff; i++) {
msr = rdmsr(gating->msrnum);
- printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __FUNCTION__, gating->msrnum, msr.hi, msr.lo);
+ printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __func__, gating->msrnum, msr.hi, msr.lo);
msr.hi |= gating->msr.hi;
msr.lo |= gating->msr.lo;
- printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__,
+ printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__,
gating->msrnum, msr.hi, msr.lo);
wrmsr(gating->msrnum, msr); // MSR - See the table above
gating +=1;
for(i = 0; prio->msrnum != 0xffffffff; i++) {
msr = rdmsr(prio->msrnum);
- printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __FUNCTION__, prio->msrnum, msr.hi, msr.lo);
+ printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __func__, prio->msrnum, msr.hi, msr.lo);
msr.hi |= prio->msr.hi;
msr.lo &= ~0xfff;
msr.lo |= prio->msr.lo;
- printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__,
+ printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__,
prio->msrnum, msr.hi, msr.lo);
wrmsr(prio->msrnum, msr); // MSR - See the table above
prio +=1;
{
msr_t msr;
int i;
- printk_debug("Enter %s\n", __FUNCTION__);
+ printk_debug("Enter %s\n", __func__);
for(i = 0; gliutables[i]; i++)
GLIUInit(gliutables[i]);
ClockGatingInit();
__asm__("FINIT\n");
/* CPUBugsFix -- called elsewhere */
- printk_debug("Exit %s\n", __FUNCTION__);
+ printk_debug("Exit %s\n", __func__);
}
{
//msr_t msr;
- printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__);
+ printk_spew(">> Entering northbridge.c: %s\n", __func__);
enable_shadow(dev);
/*
static void pci_domain_read_resources(device_t dev)
{
struct resource *resource;
- printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__);
+ printk_spew(">> Entering northbridge.c: %s\n", __func__);
/* Initialize the system wide io space constraints */
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
int idx;
device_t mc_dev;
- printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__);
+ printk_spew(">> Entering northbridge.c: %s\n", __func__);
mc_dev = dev->link[0].children;
if (mc_dev) {
static void pci_domain_enable(device_t dev)
{
- printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__);
+ printk_spew(">> Entering northbridge.c: %s\n", __func__);
// do this here for now -- this chip really breaks our device model
northbridge_init_early();
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
{
- printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__);
+ printk_spew(">> Entering northbridge.c: %s\n", __func__);
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
return max;
static void cpu_bus_init(device_t dev)
{
- printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__);
+ printk_spew(">> Entering northbridge.c: %s\n", __func__);
initialize_cpus(&dev->link[0]);
}
static void enable_dev(struct device *dev)
{
printk_spew(">> Entering northbridge.c: %s with path %d\n",
- __FUNCTION__, dev->path.type);
+ __func__, dev->path.type);
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN)
msr.lo = gl->lo;
msr.hi = gl->hi;
wrmsr(gl->desc_name, msr); // MSR - see table above
- printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); // GX3
+ printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); // GX3
}
static void ShadowInit(struct gliutable *gl)
* system. We will adjust for SMM now and Frame Buffer later.
*/
sizembytes = sizeram();
- printk_debug("%s: enable for %dMBytes\n", __FUNCTION__, sizembytes);
+ printk_debug("%s: enable for %dMBytes\n", __func__, sizembytes);
sizebytes = sizembytes << 20;
sizebytes -= ((SMM_SIZE * 1024) + 1);
msr.lo = sizebytes;
wrmsr(gl->desc_name, msr); // MSR - see table above
- printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__,
+ printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__,
gl->desc_name, msr.hi, msr.lo);
}
sizebytes -= (SMM_SIZE * 1024);
- printk_debug("%s: %d bytes\n", __FUNCTION__, sizebytes);
+ printk_debug("%s: %d bytes\n", __func__, sizebytes);
/* calculate the Two's complement offset */
offset = sizebytes - SMM_OFFSET;
offset = (offset >> 12) & 0x000fffff;
- printk_debug("%s: offset is 0x%08x\n", __FUNCTION__, SMM_OFFSET);
+ printk_debug("%s: offset is 0x%08x\n", __func__, SMM_OFFSET);
msr.hi = offset << 8 | gl->hi;
msr.hi |= SMM_OFFSET >> 24;
msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff;
wrmsr(gl->desc_name, msr); // MSR - See table above
- printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__,
+ printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__,
gl->desc_name, msr.hi, msr.lo);
}
static void SMMGL1Init(struct gliutable *gl)
{
msr_t msr;
- printk_debug("%s:\n", __FUNCTION__);
+ printk_debug("%s:\n", __func__);
msr.hi = gl->hi;
/* I don't think this is needed */
msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff;
wrmsr(gl->desc_name, msr); // MSR - See table above
- printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__,
+ printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__,
gl->desc_name, msr.hi, msr.lo);
}
msr = rdmsr(gating->msrnum);
msr.hi |= gating->msr.hi;
msr.lo |= gating->msr.lo;
- /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__,
+ /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__,
gating->msrnum, msr.hi, msr.lo); */// GX3
wrmsr(gating->msrnum, msr); // MSR - See the table above
gating += 1;
msr.hi |= prio->msr.hi;
msr.lo &= ~0xfff;
msr.lo |= prio->msr.lo;
- /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__,
+ /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__,
prio->msrnum, msr.hi, msr.lo); */// GX3
wrmsr(prio->msrnum, msr); // MSR - See the table above
prio += 1;
{
msr_t msr;
int i;
- printk_debug("Enter %s\n", __FUNCTION__);
+ printk_debug("Enter %s\n", __func__);
for (i = 0; gliutables[i]; i++)
GLIUInit(gliutables[i]);
ClockGatingInit();
__asm__ __volatile__("FINIT\n");
- printk_debug("Exit %s\n", __FUNCTION__);
+ printk_debug("Exit %s\n", __func__);
}
info->slave |
IDE_DH_LBA;
cmd.command = IDE_CMD_READ_SECTORS;
- //printk_debug("%s: sector= %ld, device command= 0x%x.\n",__FUNCTION__,(unsigned long) sector, cmd.device);
+ //printk_debug("%s: sector= %ld, device command= 0x%x.\n",__func__,(unsigned long) sector, cmd.device);
#ifdef __BIG_ENDIAN
return pio_data_in_sw(info->ctrl, &cmd, buffer, IDE_SECTOR_SIZE);
#else /* __BIG_ENDIAN */
static void southbridge_init(struct device *dev)
{
- printk_spew("cs5535: %s\n", __FUNCTION__);
+ printk_spew("cs5535: %s\n", __func__);
nvram_on(dev);
}
static void southbridge_enable(struct device *dev)
{
- printk_spew("%s: dev is %p\n", __FUNCTION__, dev);
+ printk_spew("%s: dev is %p\n", __func__, dev);
}
static void cs5535_pci_dev_enable_resources(device_t dev)
{
- printk_spew("cs5535.c: %s()\n", __FUNCTION__);
+ printk_spew("cs5535.c: %s()\n", __func__);
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static void ide_init(struct device *dev)
{
- printk_spew("cs5535_ide: %s\n", __FUNCTION__);
+ printk_spew("cs5535_ide: %s\n", __func__);
}
static void ide_enable(struct device *dev)
{
- printk_spew("cs5535_ide: %s\n", __FUNCTION__);
+ printk_spew("cs5535_ide: %s\n", __func__);
}
static struct device_operations ide_ops = {
* unsigned short gpiobase = MDD_GPIO;
*/
- printk_err("cs5536: %s\n", __FUNCTION__);
+ printk_err("cs5536: %s\n", __func__);
setup_i8259();
lpc_init(sb);
uarts_init(sb);
(sb->enable_gpio_int_route >> 16));
}
- printk_err("cs5536: %s: enable_ide_nand_flash is %d\n", __FUNCTION__,
+ printk_err("cs5536: %s: enable_ide_nand_flash is %d\n", __func__,
sb->enable_ide_nand_flash);
if (sb->enable_ide_nand_flash == 1) {
enable_ide_nand_flash_header();
static void southbridge_enable(struct device *dev)
{
- printk_err("cs5536: %s: dev is %p\n", __FUNCTION__, dev);
+ printk_err("cs5536: %s: dev is %p\n", __func__, dev);
}
static void cs5536_pci_dev_enable_resources(device_t dev)
{
- printk_err("cs5536: %s()\n", __FUNCTION__);
+ printk_err("cs5536: %s()\n", __func__);
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
{
uint32_t ide_cfg;
- printk_spew("cs5536_ide: %s\n", __FUNCTION__);
+ printk_spew("cs5536_ide: %s\n", __func__);
/* GPIO and IRQ setup are handled in the main chipset code. */
// Enable the channel and Post Write Buffer
static void ide_enable(struct device *dev)
{
- printk_spew("cs5536_ide: %s\n", __FUNCTION__);
+ printk_spew("cs5536_ide: %s\n", __func__);
}
*/
/*
- printk_info("%s: enabling compatibility IDE addresses\n", __FUNCTION__);
+ printk_info("%s: enabling compatibility IDE addresses\n", __func__);
enables = pci_read_config8(dev, 0x42);
printk_debug("enables in reg 0x42 0x%x\n", enables);
enables &= ~0xc0; // compatability mode
static void pci_routing_fixup(struct device *dev)
{
- printk_info("%s: dev is %p\n", __FUNCTION__, dev);
+ printk_info("%s: dev is %p\n", __func__, dev);
if (dev) {
/* initialize PCI interupts - these assignments depend
on the PCB routing of PINTA-D
// PCI slot
printk_info("setting pci slot\n");
pci_assign_irqs(0, 0x14, slotIrqs);
- printk_info("%s: DONE\n", __FUNCTION__);
+ printk_info("%s: DONE\n", __func__);
}
static void vt8231_init(struct device *dev)
* reason.
*/
printk_info("%s: enabling compatibility IDE addresses\n",
- __FUNCTION__);
+ __func__);
enables = pci_read_config8(dev, 0x42);
printk_debug("enables in reg 0x42 0x%x\n", enables);
enables &= ~0xc0; // compatability mode
static void pci_routing_fixup(struct device *dev)
{
- printk_info("%s: dev is %p\n", __FUNCTION__, dev);
+ printk_info("%s: dev is %p\n", __func__, dev);
/* set up PCI IRQ routing */
pci_write_config8(dev, 0x55, pciIrqs[0] << 4);
printk_info("setting riser slot\n");
pci_assign_irqs(0, 0x13, pin_to_irq(riserPins));
- printk_spew("%s: DONE\n", __FUNCTION__);
+ printk_spew("%s: DONE\n", __func__);
}
/*
bytes = count;
if ((rom + bytes - 1) > rom_end) {
printk_warning("%6d:%s() - overflowed source buffer\n",
- __LINE__, __FUNCTION__);
+ __LINE__, __func__);
bytes = 0;
if (rom <= rom_end) {
bytes = (rom_end - rom) + 1;
{
if ((stream_start + count) > stream_end) {
printk_warning("%6d:%s() - overflowed source buffer\n",
- __LINE__, __FUNCTION__);
+ __LINE__, __func__);
count = 0;
if (stream_start <= stream_end) {
count = (stream_end - stream_start) + 1;