Yinghai Lu [Tue, 21 Dec 2004 22:14:12 +0000 (22:14 +0000)]
amd k8 routing table creation dynamically support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1825
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Yinghai Lu [Fri, 17 Dec 2004 21:08:16 +0000 (21:08 +0000)]
non coherent ht chain setup automatically
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1824
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Stefan Reinauer [Thu, 16 Dec 2004 10:38:38 +0000 (10:38 +0000)]
target config fixup
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1823
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Yinghai Lu [Thu, 16 Dec 2004 02:44:25 +0000 (02:44 +0000)]
btext fix
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1822
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Stefan Reinauer [Wed, 15 Dec 2004 16:09:06 +0000 (16:09 +0000)]
shame on me.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1821
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Stefan Reinauer [Wed, 15 Dec 2004 16:08:18 +0000 (16:08 +0000)]
obviously broken
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1820
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Yinghai Lu [Tue, 14 Dec 2004 01:56:55 +0000 (01:56 +0000)]
add dump_pci_devices_in_bus
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1819
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Eric Biederman [Fri, 10 Dec 2004 20:50:43 +0000 (20:50 +0000)]
- Fix the definition of the linuxbios table so all of the compilers
will generate the struct lb_memory_range the same.
- Add a few pci_ids.
- Small readabiltiy clean ups to debug_dev
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1818
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Ronald G. Minnich [Fri, 10 Dec 2004 16:18:43 +0000 (16:18 +0000)]
mptable tool
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1817
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Stefan Reinauer [Thu, 9 Dec 2004 00:37:03 +0000 (00:37 +0000)]
get config tool satisfied.. let's see if we get this working..
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1816
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Li-Ta Lo [Wed, 8 Dec 2004 20:10:01 +0000 (20:10 +0000)]
added -E option for chip erase, remove duplicated code
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1815
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Li-Ta Lo [Wed, 8 Dec 2004 02:10:33 +0000 (02:10 +0000)]
add retry to write_byte_program_jedec(), 99% success rate
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1814
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Li-Ta Lo [Tue, 7 Dec 2004 17:19:04 +0000 (17:19 +0000)]
enable LPC decoding for 1 MB more addresss, for supporting SST49LF00xA/B
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1813
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Li-Ta Lo [Tue, 7 Dec 2004 03:15:51 +0000 (03:15 +0000)]
SST49LF00[2,3,4] should use
the same driver as 49LF008
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1812
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Li-Ta Lo [Fri, 3 Dec 2004 22:39:34 +0000 (22:39 +0000)]
allocating resource for legacy VGA frame buffer, it is not 100%
correct but it works anyway.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1811
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Yinghai Lu [Fri, 3 Dec 2004 19:07:45 +0000 (19:07 +0000)]
*** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1810
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Yinghai Lu [Fri, 3 Dec 2004 03:39:04 +0000 (03:39 +0000)]
i2c mux support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1809
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Mark Wilkinson [Wed, 1 Dec 2004 16:59:05 +0000 (16:59 +0000)]
Updates to raminit.c correcting for new version of smbus_read_byte.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1808
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Mark Wilkinson [Wed, 1 Dec 2004 16:57:37 +0000 (16:57 +0000)]
Updated version of vt8231_early_smbus.c
smbus_read_byte routine updated as per suggestion by rgm
addition reset & wait_until_ready to allow correct reading of first
byte on epia systems.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1807
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Ronald G. Minnich [Sun, 28 Nov 2004 04:39:45 +0000 (04:39 +0000)]
fixes to make adl855pc compile.
fixes to emulator.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1806
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Greg Watson [Fri, 26 Nov 2004 01:11:31 +0000 (01:11 +0000)]
new config file format - PMC no longer works
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1805
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Greg Watson [Fri, 26 Nov 2004 01:11:03 +0000 (01:11 +0000)]
moved from ../sandpointx3_altimus_mpc7410
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1804
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Greg Watson [Fri, 26 Nov 2004 01:09:49 +0000 (01:09 +0000)]
not used here
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1803
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Greg Watson [Fri, 26 Nov 2004 01:08:16 +0000 (01:08 +0000)]
PMC no longer works
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1802
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Greg Watson [Fri, 26 Nov 2004 01:07:47 +0000 (01:07 +0000)]
../sandpoint contains X3 configuration
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1801
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Greg Watson [Fri, 26 Nov 2004 00:46:39 +0000 (00:46 +0000)]
make sure enable_resource called on children
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1800
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Li-Ta Lo [Thu, 25 Nov 2004 17:37:19 +0000 (17:37 +0000)]
update comment according to the new DOM
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1799
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Li-Ta Lo [Thu, 25 Nov 2004 17:35:37 +0000 (17:35 +0000)]
marked debug device on LPC bus
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1798
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Greg Watson [Wed, 24 Nov 2004 21:19:27 +0000 (21:19 +0000)]
new config model
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1797
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Greg Watson [Wed, 24 Nov 2004 21:15:49 +0000 (21:15 +0000)]
move pnp code
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1796
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Greg Watson [Wed, 24 Nov 2004 21:14:06 +0000 (21:14 +0000)]
pci devices are all on the same bus
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1795
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Greg Watson [Wed, 24 Nov 2004 21:13:03 +0000 (21:13 +0000)]
removed argument
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1794
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Greg Watson [Wed, 24 Nov 2004 21:12:20 +0000 (21:12 +0000)]
added comments
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1793
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Greg Watson [Wed, 24 Nov 2004 21:11:04 +0000 (21:11 +0000)]
fixup debugging info
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1792
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Greg Watson [Wed, 24 Nov 2004 21:09:08 +0000 (21:09 +0000)]
scan the static bus
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1791
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Eric Biederman [Mon, 22 Nov 2004 21:45:24 +0000 (21:45 +0000)]
- Add the cpu path support. Oops I failed to commit this earlier
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1790
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Greg Watson [Mon, 22 Nov 2004 21:36:46 +0000 (21:36 +0000)]
pci_read using wrong device
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1789
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Greg Watson [Sat, 20 Nov 2004 21:20:40 +0000 (21:20 +0000)]
added missing cpu and cpu_bus support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1788
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Eric Biederman [Thu, 18 Nov 2004 22:39:43 +0000 (22:39 +0000)]
- Add the new files for the motorola mpc107
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1787
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Eric Biederman [Thu, 18 Nov 2004 22:38:08 +0000 (22:38 +0000)]
- First stab at getting the ppc ports building and working.
- The sandpointx3+altimus has been consolidated into one directory for now.
- Added support for having different versions of the pci access functions
on a per bus basis if needed.
Hopefully I have not broken something inadvertently.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1786
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Eric Biederman [Mon, 15 Nov 2004 17:01:05 +0000 (17:01 +0000)]
- Comment on why optimize_link_read_pointers is safe on an Athlon64
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1785
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Eric Biederman [Mon, 15 Nov 2004 10:46:44 +0000 (10:46 +0000)]
- Don't force spew level debug messages on the kherpi
- optimize_link_read_pointers compiles now on the solo so don't disable it.
- Start sorting out the confusion between and object and an initobject on the ppc ports
- Major bugfix release of romcc to support to remove preprocessor deficiencies.
The line and column numbers are computed are now correct. But watch out
the error messages sometimes report the location of the next token so things
are still a little skewed.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1784
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Eric Biederman [Sat, 13 Nov 2004 03:47:52 +0000 (03:47 +0000)]
- Allow coherent_ht.c to compile uniprocessor
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1783
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Stefan Reinauer [Fri, 12 Nov 2004 21:00:29 +0000 (21:00 +0000)]
ooops. sorry
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1782
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Stefan Reinauer [Thu, 11 Nov 2004 21:30:50 +0000 (21:30 +0000)]
fix a little more of ppc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1781
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Ronald G. Minnich [Thu, 11 Nov 2004 14:04:25 +0000 (14:04 +0000)]
in loglevel.h, if ASM_CONSOLE_LOGLEVEL is defined, don't try to set it.
Set adl855pc ROM_SIZE to 1M
Other minor debug prints until we get this fixed.
We're almost as far along as we were before the Change :-)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1780
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Eric Biederman [Thu, 11 Nov 2004 11:56:00 +0000 (11:56 +0000)]
- Refactor the pc keyboard code so it will timeout if the hardware
is not working instead of haning forever.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1779
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Eric Biederman [Thu, 11 Nov 2004 06:53:24 +0000 (06:53 +0000)]
mpspec.h: Tweak the write_smp_table macro so that it is safe if passed a complex expression.
crt0.S.lb: Modified so that it is safe to include console.inc
console.c: Added print_debug_ and frieds which are non inline variants of the normal console functions
div64.h: Only include limits.h if ULONG_MAX is not defined and define ULONG_MAX on ppc
socket_754/Config.lb Conditionally set config chip.h
socket_940.c We don't need and #if CONFIG_CHIP_NAME we won't be linked in if there are no references.
slot_2/chip.h: The operations struct need to be spelled cpu_intelt_slot_2_ops
slot_2/slot2.c: The same spelling fix
socket_mPGA603/chip.h: again
socket_mPGA603/socket_mPGA603_400Mhz.c: and again
socket_mPGA604_533Mhz/Config.lb: Conditionally defing CONFIG_CHIP_NAME
socket_mPGA604_800Mhz/chip.h: Another spelling fix
socket_mPGA604_800Mhz.c and again
via/model_centaur/model_centaur_init.c: It's not an intel CPU so don't worry about Intel microcode uptdates
earlymtrr.c: Remove work around for older versions of romcc
pci_ids.h: More ids.
malloc.c: We don't need string.h any longer
uart8250.c: Be consistent when delcaring functions static inline
arima/hdama/mptable.c: Cleanup to be a little more consistent
amdk8/coherent_ht.c:
- Talk about nodes not cpus (In preparation for dual cores)
- Remove clear_temp_row (as it is no longer needed)
- Demoted the failure messages to spew.
- Modified to gracefully handle failure (It should work now if cpus are removed)
- Handle the non-SMP case in verify_mp_capabilities
- Add clear_dead_routes which replaces clear_temp_row and does more
- Reorganize setup_coherent_ht_domain to cleanly handle failure.
- incoherent_ht.c: Clean up the indenation a little.
i8259.c: remove blank lines at the start of the file.
keyboard.c: Make pc_keyboard_init static
ramtest.c: Add a print out limiter, and cleanup the printout a little.
amd8111/Config.lb: Mention amd8111_smbus.c
amd8111_usb.c: Call the structure usb_ops not smbus_ops.
NSC/pc97307/chip.h: Fix spelling issue
pc97307/superio.c: Use &ops no &pnp_ops.
w83627hf/suerio.c: ditto
w83627thf/suerio.c: ditto
buildrom.c: Use braces around the body of a for loop. It's more maintainable.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1778
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Eric Biederman [Thu, 11 Nov 2004 03:31:16 +0000 (03:31 +0000)]
- Remove include of device/chip.h
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1777
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Eric Biederman [Wed, 10 Nov 2004 20:13:35 +0000 (20:13 +0000)]
- Delete unused funciton realloc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1776
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Eric Biederman [Wed, 10 Nov 2004 20:11:15 +0000 (20:11 +0000)]
- Remove unused start_stop.h
This file died with the last round of cpu restructuring I just missed it earlier.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1775
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Eric Biederman [Wed, 10 Nov 2004 18:32:20 +0000 (18:32 +0000)]
- Don't use e7501 root_complex
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1774
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Eric Biederman [Wed, 10 Nov 2004 18:31:31 +0000 (18:31 +0000)]
- Remove e7501 root_complex
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1773
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Ronald G. Minnich [Wed, 10 Nov 2004 15:12:48 +0000 (15:12 +0000)]
adl855pc support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1772
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Eric Biederman [Tue, 9 Nov 2004 08:59:23 +0000 (08:59 +0000)]
- Clean up the CPP output a little bit
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1771
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Eric Biederman [Tue, 9 Nov 2004 00:35:39 +0000 (00:35 +0000)]
- Fix silly thinkos in that caused parsing problems in romcc.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1770
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Eric Biederman [Tue, 9 Nov 2004 00:05:42 +0000 (00:05 +0000)]
- Fix minor glitch in romcc where it would not return from a header file
if it had a preprocessor directive on the last line.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1769
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Yinghai Lu [Mon, 8 Nov 2004 21:16:16 +0000 (21:16 +0000)]
*** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1768
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Eric Biederman [Mon, 8 Nov 2004 09:31:09 +0000 (09:31 +0000)]
- Romcc preprocessor bug fixes, (The code size went down about 350 lines.. :)
- Preprocessor constant expression evaluation is no long a special case so
unsigned long values can not be used.
- Undefined macros are not converted to 0. But a big warning is printed.
- Garbage at the of an #include directive is now done in tokens instead of
in characters.
This allows comments after an #include directive.
- Repaired a previously unnoticed regression in constant expression
evaluation. Logical expressions can now be evaluated again.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1767
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Stefan Reinauer [Fri, 5 Nov 2004 23:19:46 +0000 (23:19 +0000)]
add compiler from crosstool, too
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1766
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Yinghai Lu [Fri, 5 Nov 2004 22:14:33 +0000 (22:14 +0000)]
*** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1765
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Yinghai Lu [Fri, 5 Nov 2004 22:03:37 +0000 (22:03 +0000)]
CONFIG_CHIP_NAME to control config chip.h without .name
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1764
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Eric Biederman [Fri, 5 Nov 2004 19:55:46 +0000 (19:55 +0000)]
- How did I forget to cvs add this?
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1763
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Eric Biederman [Fri, 5 Nov 2004 19:55:06 +0000 (19:55 +0000)]
- First pass at getting the powerpc ports to compile
The static device tree is not built properly at all yet, but at least we get through it.
FIXME (What is the proper way to handle add in boards?)
- Add generic div64 support and ppc div64 support
- Fix abuild so it properly generates the CC line when cross compiling.
- Add one more possible ppc cross compiler target
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1762
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Yinghai Lu [Fri, 5 Nov 2004 18:09:46 +0000 (18:09 +0000)]
*** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1761
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Stefan Reinauer [Fri, 5 Nov 2004 14:06:24 +0000 (14:06 +0000)]
remove nasty workaround, include echo in function again :)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1760
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Stefan Reinauer [Fri, 5 Nov 2004 11:57:00 +0000 (11:57 +0000)]
add debug function
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1759
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Stefan Reinauer [Fri, 5 Nov 2004 11:47:41 +0000 (11:47 +0000)]
...
add option so it's possible to ignore broken builds
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1758
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Eric Biederman [Fri, 5 Nov 2004 11:41:26 +0000 (11:41 +0000)]
- Add another possible powerpc cross compiler prefix
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1757
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Eric Biederman [Fri, 5 Nov 2004 11:24:57 +0000 (11:24 +0000)]
- More fixes...
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1756
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Eric Biederman [Fri, 5 Nov 2004 10:48:04 +0000 (10:48 +0000)]
- Ensure every copy of Options.lb uses:
CROSS_COMPILE
CC
HOSTCC
OBJCOPY
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1755
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Eric Biederman [Fri, 5 Nov 2004 09:03:47 +0000 (09:03 +0000)]
- Ensure the all target is the first commands in the makefile....
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1754
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Eric Biederman [Fri, 5 Nov 2004 08:57:09 +0000 (08:57 +0000)]
- Put the rule for the Makefile at the bottom of the makefile!
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1753
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Eric Biederman [Fri, 5 Nov 2004 08:50:54 +0000 (08:50 +0000)]
- In the makefile header get the name of the Makefile correct
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1752
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Eric Biederman [Fri, 5 Nov 2004 08:21:05 +0000 (08:21 +0000)]
- Massage the code to generate the top level Makefile so the
generated Makefile has correct dependencies and is somewhat complete.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1751
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Eric Biederman [Fri, 5 Nov 2004 07:26:56 +0000 (07:26 +0000)]
- Modify all of the Opteron motherboards to have a separate logical
chip for the amdk8/root_complex
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1750
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Eric Biederman [Fri, 5 Nov 2004 07:04:54 +0000 (07:04 +0000)]
- Add a new chip northbridge/amd/amdk8/root_complex
- Moving the functionality around in northbridge/amd/amdk8/northbridge.c
to put the pci_domain and the apic bus on the root_complex.
Everything else remains with the individual northbridges.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1749
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Yinghai Lu [Fri, 5 Nov 2004 03:44:01 +0000 (03:44 +0000)]
*** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1748
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Stefan Reinauer [Fri, 5 Nov 2004 00:26:31 +0000 (00:26 +0000)]
stepan goes to bed now.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1747
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Stefan Reinauer [Fri, 5 Nov 2004 00:25:19 +0000 (00:25 +0000)]
- some steps towards cross compile
- add option to force rebuilds even if they were previously ok
- add option to build on target only
- play around
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1746
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Li-Ta Lo [Thu, 4 Nov 2004 23:42:54 +0000 (23:42 +0000)]
reformat
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1745
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Yinghai Lu [Thu, 4 Nov 2004 22:36:18 +0000 (22:36 +0000)]
debug device added
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1744
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Li-Ta Lo [Thu, 4 Nov 2004 21:48:39 +0000 (21:48 +0000)]
we decide not to enable BM DAM form them
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1743
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Yinghai Lu [Thu, 4 Nov 2004 21:00:13 +0000 (21:00 +0000)]
SI Class code check
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1742
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Li-Ta Lo [Thu, 4 Nov 2004 20:31:04 +0000 (20:31 +0000)]
removed #if 0 #endif code
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1741
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Li-Ta Lo [Thu, 4 Nov 2004 18:36:06 +0000 (18:36 +0000)]
tell people that the segment descriptors are different for ROMCC and
GCC code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1740
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Li-Ta Lo [Thu, 4 Nov 2004 18:33:33 +0000 (18:33 +0000)]
removed the comment in the very beginning of hardwaremain(). I don't
think it is relevant now.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1739
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Eric Biederman [Thu, 4 Nov 2004 11:09:12 +0000 (11:09 +0000)]
Add Options.lb to various motherboard ports
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1738
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Eric Biederman [Thu, 4 Nov 2004 11:04:33 +0000 (11:04 +0000)]
- Update abuild.sh so it will rebuild successfull builds
- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
enabled. All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737
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Yinghai Lu [Wed, 3 Nov 2004 00:47:40 +0000 (00:47 +0000)]
*** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1736
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Stefan Reinauer [Wed, 3 Nov 2004 00:10:15 +0000 (00:10 +0000)]
This hurts more than it helps. byebye
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1735
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Stefan Reinauer [Tue, 2 Nov 2004 20:33:12 +0000 (20:33 +0000)]
get qemu-i386 target building again
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1734
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Stefan Reinauer [Tue, 2 Nov 2004 20:29:30 +0000 (20:29 +0000)]
update to new structure
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1733
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Yinghai Lu [Tue, 2 Nov 2004 18:05:22 +0000 (18:05 +0000)]
*** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1732
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Yinghai Lu [Tue, 2 Nov 2004 17:46:43 +0000 (17:46 +0000)]
*** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1731
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Yinghai Lu [Tue, 2 Nov 2004 02:34:28 +0000 (02:34 +0000)]
Tyan update for ROM_IMAGE_SIZE > 64K
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1730
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Stefan Reinauer [Sun, 31 Oct 2004 23:03:10 +0000 (23:03 +0000)]
fix solo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1729
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Eric Biederman [Sat, 30 Oct 2004 22:59:35 +0000 (22:59 +0000)]
- Update console.c to have non-inline versions of functions
- Add exception.c
Sorry for not including these ealier.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1728
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Eric Biederman [Sat, 30 Oct 2004 08:05:41 +0000 (08:05 +0000)]
- To reduce confuse rename the parts of linuxbios bios that run from
ram linuxbios_ram instead of linuxbios_c and linuxbios_payload...
- Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86
- ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB.
- Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work.
- Start using romcc's built in preprocessor (This will simplify header compiler checks)
- Add helper functions for examining all of the resources
- Remove debug strings from chip.h
- Add llshell to src/arch/i386/llshell (Sometime later I can try it...)
- Add the ability to catch exceptions on x86
- Add gdb_stub support to x86
- Removed old cpu options
- Added an option so we can detect movnti support
- Remove some duplicate definitions from pci_ids.h
- Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic
- Minor romcc bug fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727
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Mark Wilkinson [Fri, 29 Oct 2004 16:16:43 +0000 (16:16 +0000)]
Changes to allow Via/Epia code to be compiled after recent code changes.
New Files :-
src/cpu/via/model_centaur/Config.lb
src/cpu/via/model_centaur/model_centaur_init.c
Updated Files :-
src/arch/i386/include/arch/smp/mpspec.h
- make write_smp_table a define for non smp systems
src/cpu/x86/lapic/lapic_cpu_init.c
- change possible typo
src/mainboard/via/epia/Config.lb
src/mainboard/via/epia/Options.lb
src/mainboard/via/epia/auto.c
src/mainboard/via/epia/chip.h
src/mainboard/via/epia/failover.c
- updated after recent code changes
src/northbridge/via/vt8601/chip.h
src/northbridge/via/vt8601/northbridge.c
src/northbridge/via/vt8601/raminit.c
- corrections after recent code changes to allow compiling
src/southbridge/via/vt8231/chip.h
src/southbridge/via/vt8231/vt8231.c
- initial pass to allow compiling after recent code changes.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1726
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