#define ASSEMBLY 1
-#define ASM_CONSOLE_LOGLEVEL 10
+#define ASM_CONSOLE_LOGLEVEL 8
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
uart_init();
console_init();
- print_err("HARD MAIN0\n");
+
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- print_err("HARD MAIN\n");
-#if 1
+
+#if 0
print_pci_devices();
#endif
- print_err("after print pci dev \n");
+
if(!bios_reset_detected()) {
enable_smbus();
- print_err("after enable smbus\n");
-#if 1
+#if 0
dump_spd_registers(&memctrl[0]);
// dump_smbus_registers();
#endif
- print_err("after dump spd registers\n");
+
memreset_setup();
- print_err("memreset setup\n");
+
sdram_initialize(sizeof(memctrl)/sizeof(memctrl[0]), memctrl);
- print_err("sdram init\n");
+
}
#if 0
else {
/* converted to C 6/2004 yhlu */
-#define DEBUG_RAM_CONFIG 12
+#define DEBUG_RAM_CONFIG 2
#undef ASM_CONSOLE_LOGLEVEL
-#define ASM_CONSOLE_LOGLEVEL 10
+#define ASM_CONSOLE_LOGLEVEL 8
#define dumpnorth() dump_pci_device(PCI_DEV(0, 0, 1))
/* DDR DIMM Mode register Definitions */
static void ram_set_d0f0_regs(const struct mem_controller *ctrl) {
#if DEBUG_RAM_CONFIG
- dumpnorth();
+ //dumpnorth();
#endif
int i;
int max;
max = sizeof(register_values)/sizeof(register_values[0]);
for(i = 0; i < max; i += 3) {
uint32_t reg;
-#if DEBUG_RAM_CONFIG
+#if DEBUG_RAM_CONFIG >=2
print_debug_hex32(register_values[i]);
print_debug(" <-");
print_debug_hex32(register_values[i+2]);
if(dword == 1) {
#if DEBUG_RAM_CONFIG
- print_debug(ecc_pre_init);
+// print_debug(ecc_pre_init);
#endif
#if DEBUG_RAM_CONFIG
- print_debug(ecc_post_init);
+// print_debug(ecc_post_init);
#endif
#if 0
/* Clear the ECC error bits */
}
#if DEBUG_RAM_CONFIG
- dumpnorth();
+// dumpnorth();
#endif
/* verify_ram(); */
unsigned char global_status_register;
unsigned char byte;
-print_err("smbus_read_byte\r\n");
+ /*print_err("smbus_read_byte\r\n");*/
if (smbus_wait_until_ready() < 0) {
print_err_hex8(-2);
return -2;
print_err_hex8(-1);
return -1;
}
+/*
print_err("smbus_read_byte: ");
print_err_hex32(device); print_err(" ad "); print_err_hex32(address);
print_err("value "); print_err_hex8(byte); print_err("\r\n");
+ */
return byte;
}
#if 0
target adl855pc
mainboard digitallogic/adl855pc
+option DEFAULT_CONSOLE_LOGLEVEL=10
+option MAXIMUM_CONSOLE_LOGLEVEL=10
romimage "normal"
option USE_FALLBACK_IMAGE=0
option ROM_IMAGE_SIZE=0x10000
#include <getopt.h>
#define die(x) { perror(x); exit(1); }
+#define warn(x) { perror(x); }
#include <x86emu.h>
#include "test.h"
X86EMU_setupPioFuncs(&myfuncs);
ioperm(0, 0x400, 1);
- if (iopl(3) < 0)
- die("iopl");
+ if (iopl(3) < 0) {
+ warn("iopl failed, continuing anyway");
+ }
/* Emergency sync ;-) */
sync();
DECODE_PRINTF("DS");
return &M.x86.R_DS;
case 4:
- case 5:
+ DECODE_PRINTF("FS");
+ return &M.x86.R_FS;
+ case 5:
+ DECODE_PRINTF("GS");
+ return &M.x86.R_GS;
+
case 6:
case 7:
DECODE_PRINTF("ILLEGAL SEGREG");