1 // Code for handling EHCI USB controllers.
3 // Copyright (C) 2010 Kevin O'Connor <kevin@koconnor.net>
5 // This file may be distributed under the terms of the GNU LGPLv3 license.
7 #include "util.h" // dprintf
8 #include "pci.h" // pci_bdf_to_bus
9 #include "config.h" // CONFIG_*
10 #include "ioport.h" // outw
11 #include "usb-ehci.h" // struct ehci_qh
12 #include "pci_ids.h" // PCI_CLASS_SERIAL_USB_UHCI
13 #include "pci_regs.h" // PCI_BASE_ADDRESS_0
14 #include "usb.h" // struct usb_s
15 #include "farptr.h" // GET_FLATPTR
16 #include "usb-uhci.h" // init_uhci
17 #include "usb-ohci.h" // init_ohci
26 struct ehci_caps *caps;
27 struct ehci_regs *regs;
28 struct ehci_qh *async_qh;
29 struct companion_s companion[8];
35 /****************************************************************
37 ****************************************************************/
39 #define EHCI_TIME_POSTPOWER 20
40 #define EHCI_TIME_POSTRESET 2
42 // Check if need companion controllers for full/low speed devices
44 ehci_note_port(struct usb_ehci_s *cntl)
46 if (--cntl->checkports)
47 // Ports still being detected.
49 if (! cntl->legacycount)
50 // No full/low speed devices found.
52 // Start companion controllers.
54 for (i=0; i<ARRAY_SIZE(cntl->companion); i++) {
55 u16 type = cntl->companion[i].type;
56 if (type == USB_TYPE_UHCI)
57 uhci_init(cntl->companion[i].bdf, cntl->usb.busid + i);
58 else if (type == USB_TYPE_OHCI)
59 ohci_init(cntl->companion[i].bdf, cntl->usb.busid + i);
65 // Check if device attached to port
67 ehci_hub_detect(struct usbhub_s *hub, u32 port)
69 struct usb_ehci_s *cntl = container_of(hub->cntl, struct usb_ehci_s, usb);
70 u32 *portreg = &cntl->regs->portsc[port];
71 u32 portsc = readl(portreg);
74 if (!(portsc & PORT_POWER)) {
76 writel(portreg, portsc);
77 msleep(EHCI_TIME_POSTPOWER);
79 msleep(1); // XXX - time for connect to be detected.
81 portsc = readl(portreg);
83 if (!(portsc & PORT_CONNECT))
87 if ((portsc & PORT_LINESTATUS_MASK) == PORT_LINESTATUS_KSTATE) {
90 writel(portreg, portsc | PORT_OWNER);
94 // XXX - if just powered up, need to wait for USB_TIME_ATTDB?
96 // Begin reset on port
97 portsc = (portsc & ~PORT_PE) | PORT_RESET;
98 writel(portreg, portsc);
99 msleep(USB_TIME_DRSTR);
103 ehci_note_port(cntl);
107 // Reset device on port
109 ehci_hub_reset(struct usbhub_s *hub, u32 port)
111 struct usb_ehci_s *cntl = container_of(hub->cntl, struct usb_ehci_s, usb);
112 u32 *portreg = &cntl->regs->portsc[port];
113 u32 portsc = readl(portreg);
115 // Finish reset on port
116 portsc &= ~PORT_RESET;
117 writel(portreg, portsc);
118 msleep(EHCI_TIME_POSTRESET);
121 portsc = readl(portreg);
122 if (!(portsc & PORT_CONNECT))
123 // No longer connected
125 if (!(portsc & PORT_PE)) {
128 writel(portreg, portsc | PORT_OWNER);
134 ehci_note_port(cntl);
140 ehci_hub_disconnect(struct usbhub_s *hub, u32 port)
142 struct usb_ehci_s *cntl = container_of(hub->cntl, struct usb_ehci_s, usb);
143 u32 *portreg = &cntl->regs->portsc[port];
144 u32 portsc = readl(portreg);
145 writel(portreg, portsc & ~PORT_PE);
148 static struct usbhub_op_s ehci_HubOp = {
149 .detect = ehci_hub_detect,
150 .reset = ehci_hub_reset,
151 .disconnect = ehci_hub_disconnect,
154 // Find any devices connected to the root hub.
156 check_ehci_ports(struct usb_ehci_s *cntl)
160 memset(&hub, 0, sizeof(hub));
161 hub.cntl = &cntl->usb;
162 hub.portcount = cntl->checkports;
163 hub.op = &ehci_HubOp;
169 /****************************************************************
171 ****************************************************************/
174 configure_ehci(void *data)
176 struct usb_ehci_s *cntl = data;
178 // Allocate ram for schedule storage
179 struct ehci_framelist *fl = memalign_high(sizeof(*fl), sizeof(*fl));
180 struct ehci_qh *intr_qh = memalign_high(EHCI_QH_ALIGN, sizeof(*intr_qh));
181 struct ehci_qh *async_qh = memalign_high(EHCI_QH_ALIGN, sizeof(*async_qh));
182 if (!fl || !intr_qh || !async_qh) {
187 // XXX - check for halted?
190 u32 cmd = readl(&cntl->regs->usbcmd);
191 writel(&cntl->regs->usbcmd, (cmd & ~(CMD_ASE | CMD_PSE)) | CMD_HCRESET);
192 u64 end = calc_future_tsc(250);
194 cmd = readl(&cntl->regs->usbcmd);
195 if (!(cmd & CMD_HCRESET))
197 if (check_tsc(end)) {
204 // Disable interrupts (just to be safe).
205 writel(&cntl->regs->usbintr, 0);
207 // Set schedule to point to primary intr queue head
208 memset(intr_qh, 0, sizeof(*intr_qh));
209 intr_qh->next = EHCI_PTR_TERM;
210 intr_qh->info2 = (0x01 << QH_SMASK_SHIFT);
211 intr_qh->token = QTD_STS_HALT;
212 intr_qh->qtd_next = intr_qh->alt_next = EHCI_PTR_TERM;
214 for (i=0; i<ARRAY_SIZE(fl->links); i++)
215 fl->links[i] = (u32)intr_qh | EHCI_PTR_QH;
216 writel(&cntl->regs->periodiclistbase, (u32)fl);
218 // Set async list to point to primary async queue head
219 memset(async_qh, 0, sizeof(*async_qh));
220 async_qh->next = (u32)async_qh | EHCI_PTR_QH;
221 async_qh->info1 = QH_HEAD;
222 async_qh->token = QTD_STS_HALT;
223 async_qh->qtd_next = async_qh->alt_next = EHCI_PTR_TERM;
224 cntl->async_qh = async_qh;
225 writel(&cntl->regs->asynclistbase, (u32)async_qh);
228 writel(&cntl->regs->usbcmd, cmd | CMD_ASE | CMD_PSE | CMD_RUN);
230 // Set default of high speed for root hub.
231 writel(&cntl->regs->configflag, 1);
232 cntl->checkports = readl(&cntl->caps->hcsparams) & HCS_N_PORTS_MASK;
235 int count = check_ehci_ports(cntl);
236 free_pipe(cntl->usb.defaultpipe);
241 // No devices found - shutdown and free controller.
242 writel(&cntl->regs->usbcmd, cmd & ~CMD_RUN);
243 msleep(4); // 2ms to stop reading memory - XXX
252 ehci_init(u16 bdf, int busid, int compbdf)
254 if (! CONFIG_USB_EHCI)
257 u32 baseaddr = pci_config_readl(bdf, PCI_BASE_ADDRESS_0);
258 struct ehci_caps *caps = (void*)(baseaddr & PCI_BASE_ADDRESS_MEM_MASK);
259 u32 hcc_params = readl(&caps->hccparams);
260 if (hcc_params & HCC_64BIT_ADDR) {
261 dprintf(1, "No support for 64bit EHCI\n");
265 struct usb_ehci_s *cntl = malloc_tmphigh(sizeof(*cntl));
266 memset(cntl, 0, sizeof(*cntl));
267 cntl->usb.busid = busid;
268 cntl->usb.type = USB_TYPE_EHCI;
270 cntl->regs = (void*)caps + readb(&caps->caplength);
272 dprintf(1, "EHCI init on dev %02x:%02x.%x (regs=%p)\n"
273 , pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf)
274 , pci_bdf_to_fn(bdf), cntl->regs);
276 pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
278 // XXX - check for and disable SMM control?
280 // Find companion controllers.
282 int max = pci_to_bdf(pci_bdf_to_bus(bdf) + 1, 0, 0);
284 if (compbdf < 0 || compbdf >= bdf)
286 u32 code = pci_config_readl(compbdf, PCI_CLASS_REVISION) >> 8;
287 if (code == PCI_CLASS_SERIAL_USB_UHCI) {
288 cntl->companion[count].bdf = compbdf;
289 cntl->companion[count].type = USB_TYPE_UHCI;
291 } else if (code == PCI_CLASS_SERIAL_USB_OHCI) {
292 cntl->companion[count].bdf = compbdf;
293 cntl->companion[count].type = USB_TYPE_OHCI;
296 compbdf = pci_next(compbdf+1, &max);
299 run_thread(configure_ehci, cntl);
304 /****************************************************************
305 * End point communication
306 ****************************************************************/
309 ehci_wait_qh(struct usb_ehci_s *cntl, struct ehci_qh *qh)
311 // XXX - 500ms just a guess
312 u64 end = calc_future_tsc(500);
314 if (qh->qtd_next & EHCI_PTR_TERM)
317 if (check_tsc(end)) {
325 // Wait for next USB async frame to start - for ensuring safe memory release.
327 ehci_waittick(struct usb_ehci_s *cntl)
333 // Wait for access to "doorbell"
336 u64 end = calc_future_tsc(100);
338 sts = readl(&cntl->regs->usbsts);
339 if (!(sts & STS_IAA)) {
340 cmd = readl(&cntl->regs->usbcmd);
341 if (!(cmd & CMD_IAAD))
344 if (check_tsc(end)) {
351 writel(&cntl->regs->usbcmd, cmd | CMD_IAAD);
352 // Wait for completion
354 sts = readl(&cntl->regs->usbsts);
357 if (check_tsc(end)) {
364 writel(&cntl->regs->usbsts, STS_IAA);
369 struct ehci_qtd *next_td, *tds;
371 struct usb_pipe pipe;
375 ehci_free_pipe(struct usb_pipe *p)
377 if (! CONFIG_USB_EHCI)
379 dprintf(7, "ehci_free_pipe %p\n", p);
380 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
381 struct usb_ehci_s *cntl = container_of(
382 pipe->pipe.cntl, struct usb_ehci_s, usb);
384 struct ehci_qh *start = cntl->async_qh;
385 struct ehci_qh *pos = start;
387 struct ehci_qh *next = (void*)(pos->next & ~EHCI_PTR_BITS);
389 // Not found?! Exit without freeing.
390 warn_internalerror();
393 if (next == &pipe->qh) {
394 pos->next = next->next;
404 ehci_alloc_control_pipe(struct usb_pipe *dummy)
406 if (! CONFIG_USB_EHCI)
408 struct usb_ehci_s *cntl = container_of(
409 dummy->cntl, struct usb_ehci_s, usb);
410 dprintf(7, "ehci_alloc_control_pipe %p\n", &cntl->usb);
412 // Allocate a queue head.
413 struct ehci_pipe *pipe = memalign_tmphigh(EHCI_QH_ALIGN, sizeof(*pipe));
418 memset(pipe, 0, sizeof(*pipe));
419 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
420 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
421 pipe->qh.token = QTD_STS_HALT;
423 // Add queue head to controller list.
424 struct ehci_qh *async_qh = cntl->async_qh;
425 pipe->qh.next = async_qh->next;
427 async_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
432 fillTDbuffer(struct ehci_qtd *td, u16 maxpacket, const void *buf, int bytes)
437 if (pos >= &td->buf[ARRAY_SIZE(td->buf)])
438 // More data than can transfer in a single qtd - only use
439 // full packets to prevent a babble error.
440 return ALIGN_DOWN(dest - (u32)buf, maxpacket);
442 u32 max = 0x1000 - (dest & 0xfff);
450 return dest - (u32)buf;
454 ehci_control(struct usb_pipe *p, int dir, const void *cmd, int cmdsize
455 , void *data, int datasize)
458 if (! CONFIG_USB_EHCI)
460 dprintf(5, "ehci_control %p\n", p);
461 if (datasize > 4*4096 || cmdsize > 4*4096) {
462 // XXX - should support larger sizes.
466 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
467 struct usb_ehci_s *cntl = container_of(
468 pipe->pipe.cntl, struct usb_ehci_s, usb);
470 u16 maxpacket = pipe->pipe.maxpacket;
471 int speed = pipe->pipe.speed;
473 // Setup fields in qh
475 (1 << QH_MULT_SHIFT) | (speed != USB_HIGHSPEED ? QH_CONTROL : 0)
476 | (maxpacket << QH_MAXPACKET_SHIFT)
478 | (speed << QH_SPEED_SHIFT)
479 | (pipe->pipe.ep << QH_EP_SHIFT)
480 | (pipe->pipe.devaddr << QH_DEVADDR_SHIFT));
481 pipe->qh.info2 = ((1 << QH_MULT_SHIFT)
482 | (pipe->pipe.tt_port << QH_HUBPORT_SHIFT)
483 | (pipe->pipe.tt_devaddr << QH_HUBADDR_SHIFT));
485 // Setup transfer descriptors
486 struct ehci_qtd *tds = memalign_tmphigh(EHCI_QTD_ALIGN, sizeof(*tds) * 3);
491 memset(tds, 0, sizeof(*tds) * 3);
492 struct ehci_qtd *td = tds;
494 td->qtd_next = (u32)&td[1];
495 td->alt_next = EHCI_PTR_TERM;
496 td->token = (ehci_explen(cmdsize) | QTD_STS_ACTIVE
497 | QTD_PID_SETUP | ehci_maxerr(3));
498 fillTDbuffer(td, maxpacket, cmd, cmdsize);
502 td->qtd_next = (u32)&td[1];
503 td->alt_next = EHCI_PTR_TERM;
504 td->token = (QTD_TOGGLE | ehci_explen(datasize) | QTD_STS_ACTIVE
505 | (dir ? QTD_PID_IN : QTD_PID_OUT) | ehci_maxerr(3));
506 fillTDbuffer(td, maxpacket, data, datasize);
510 td->qtd_next = EHCI_PTR_TERM;
511 td->alt_next = EHCI_PTR_TERM;
512 td->token = (QTD_TOGGLE | QTD_STS_ACTIVE
513 | (dir ? QTD_PID_OUT : QTD_PID_IN) | ehci_maxerr(3));
517 pipe->qh.qtd_next = (u32)tds;
520 int ret = ehci_wait_qh(cntl, &pipe->qh);
521 pipe->qh.token = QTD_STS_HALT;
523 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
532 ehci_alloc_bulk_pipe(struct usb_pipe *dummy)
534 // XXX - this func is same as alloc_control except for malloc_low
535 if (! CONFIG_USB_EHCI)
537 struct usb_ehci_s *cntl = container_of(
538 dummy->cntl, struct usb_ehci_s, usb);
539 dprintf(7, "ehci_alloc_bulk_pipe %p\n", &cntl->usb);
541 // Allocate a queue head.
542 struct ehci_pipe *pipe = memalign_low(EHCI_QH_ALIGN, sizeof(*pipe));
547 memset(pipe, 0, sizeof(*pipe));
548 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
549 pipe->qh.qtd_next = pipe->qh.alt_next = EHCI_PTR_TERM;
550 pipe->qh.token = QTD_STS_HALT;
552 // Add queue head to controller list.
553 struct ehci_qh *async_qh = cntl->async_qh;
554 pipe->qh.next = async_qh->next;
556 async_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
561 ehci_wait_td(struct ehci_qtd *td)
563 u64 end = calc_future_tsc(5000); // XXX - lookup real time.
567 if (!(status & QTD_STS_ACTIVE))
569 if (check_tsc(end)) {
575 if (status & QTD_STS_HALT) {
576 dprintf(1, "ehci_wait_td error - status=%x\n", status);
585 ehci_send_bulk(struct usb_pipe *p, int dir, void *data, int datasize)
587 if (! CONFIG_USB_EHCI)
589 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
590 dprintf(7, "ehci_send_bulk qh=%p dir=%d data=%p size=%d\n"
591 , &pipe->qh, dir, data, datasize);
593 // Allocate 4 tds on stack (16byte aligned)
594 u8 tdsbuf[sizeof(struct ehci_qtd) * STACKQTDS + EHCI_QTD_ALIGN - 1];
595 struct ehci_qtd *tds = (void*)ALIGN((u32)tdsbuf, EHCI_QTD_ALIGN);
596 memset(tds, 0, sizeof(*tds) * STACKQTDS);
598 // Setup fields in qh
599 u16 maxpacket = GET_FLATPTR(pipe->pipe.maxpacket);
600 SET_FLATPTR(pipe->qh.info1
601 , ((1 << QH_MULT_SHIFT)
602 | (maxpacket << QH_MAXPACKET_SHIFT)
603 | (GET_FLATPTR(pipe->pipe.speed) << QH_SPEED_SHIFT)
604 | (GET_FLATPTR(pipe->pipe.ep) << QH_EP_SHIFT)
605 | (GET_FLATPTR(pipe->pipe.devaddr) << QH_DEVADDR_SHIFT)));
606 SET_FLATPTR(pipe->qh.info2
607 , ((1 << QH_MULT_SHIFT)
608 | (GET_FLATPTR(pipe->pipe.tt_port) << QH_HUBPORT_SHIFT)
609 | (GET_FLATPTR(pipe->pipe.tt_devaddr) << QH_HUBADDR_SHIFT)));
611 SET_FLATPTR(pipe->qh.qtd_next, (u32)MAKE_FLATPTR(GET_SEG(SS), tds));
613 SET_FLATPTR(pipe->qh.token, GET_FLATPTR(pipe->qh.token) & QTD_TOGGLE);
617 struct ehci_qtd *td = &tds[tdpos++ % STACKQTDS];
618 int ret = ehci_wait_td(td);
622 struct ehci_qtd *nexttd_fl = MAKE_FLATPTR(GET_SEG(SS)
623 , &tds[tdpos % STACKQTDS]);
625 int transfer = fillTDbuffer(td, maxpacket, data, datasize);
626 td->qtd_next = (transfer==datasize ? EHCI_PTR_TERM : (u32)nexttd_fl);
627 td->alt_next = EHCI_PTR_TERM;
629 td->token = (ehci_explen(transfer) | QTD_STS_ACTIVE
630 | (dir ? QTD_PID_IN : QTD_PID_OUT) | ehci_maxerr(3));
633 datasize -= transfer;
636 for (i=0; i<STACKQTDS; i++) {
637 struct ehci_qtd *td = &tds[tdpos++ % STACKQTDS];
638 int ret = ehci_wait_td(td);
645 dprintf(1, "ehci_send_bulk failed\n");
646 SET_FLATPTR(pipe->qh.qtd_next, EHCI_PTR_TERM);
647 SET_FLATPTR(pipe->qh.alt_next, EHCI_PTR_TERM);
649 struct usb_ehci_s *cntl = container_of(
650 GET_FLATPTR(pipe->pipe.cntl), struct usb_ehci_s, usb);
656 ehci_alloc_intr_pipe(struct usb_pipe *dummy, int frameexp)
658 if (! CONFIG_USB_EHCI)
660 struct usb_ehci_s *cntl = container_of(
661 dummy->cntl, struct usb_ehci_s, usb);
662 dprintf(7, "ehci_alloc_intr_pipe %p %d\n", &cntl->usb, frameexp);
666 int maxpacket = dummy->maxpacket;
667 // Determine number of entries needed for 2 timer ticks.
668 int ms = 1<<frameexp;
669 int count = DIV_ROUND_UP(PIT_TICK_INTERVAL * 1000 * 2, PIT_TICK_RATE * ms);
670 struct ehci_pipe *pipe = memalign_low(EHCI_QH_ALIGN, sizeof(*pipe));
671 struct ehci_qtd *tds = memalign_low(EHCI_QTD_ALIGN, sizeof(*tds) * count);
672 void *data = malloc_low(maxpacket * count);
673 if (!pipe || !tds || !data) {
677 memset(pipe, 0, sizeof(*pipe));
678 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
679 pipe->next_td = pipe->tds = tds;
684 | (maxpacket << QH_MAXPACKET_SHIFT)
685 | (pipe->pipe.speed << QH_SPEED_SHIFT)
686 | (pipe->pipe.ep << QH_EP_SHIFT)
687 | (pipe->pipe.devaddr << QH_DEVADDR_SHIFT));
688 pipe->qh.info2 = ((1 << QH_MULT_SHIFT)
689 | (pipe->pipe.tt_port << QH_HUBPORT_SHIFT)
690 | (pipe->pipe.tt_devaddr << QH_HUBADDR_SHIFT)
691 | (0x01 << QH_SMASK_SHIFT)
692 | (0x1c << QH_CMASK_SHIFT));
693 pipe->qh.qtd_next = (u32)tds;
696 for (i=0; i<count; i++) {
697 struct ehci_qtd *td = &tds[i];
698 td->qtd_next = (i==count-1 ? (u32)tds : (u32)&td[1]);
699 td->alt_next = EHCI_PTR_TERM;
700 td->token = (ehci_explen(maxpacket) | QTD_STS_ACTIVE
701 | QTD_PID_IN | ehci_maxerr(3));
702 td->buf[0] = (u32)data + maxpacket * i;
705 // Add to interrupt schedule.
706 struct ehci_framelist *fl = (void*)readl(&cntl->regs->periodiclistbase);
708 // Add to existing interrupt entry.
709 struct ehci_qh *intr_qh = (void*)(fl->links[0] & ~EHCI_PTR_BITS);
710 pipe->qh.next = intr_qh->next;
712 intr_qh->next = (u32)&pipe->qh | EHCI_PTR_QH;
714 int startpos = 1<<(frameexp-1);
715 pipe->qh.next = fl->links[startpos];
717 for (i=startpos; i<ARRAY_SIZE(fl->links); i+=ms)
718 fl->links[i] = (u32)&pipe->qh | EHCI_PTR_QH;
730 ehci_poll_intr(struct usb_pipe *p, void *data)
733 if (! CONFIG_USB_EHCI)
735 struct ehci_pipe *pipe = container_of(p, struct ehci_pipe, pipe);
736 struct ehci_qtd *td = GET_FLATPTR(pipe->next_td);
737 u32 token = GET_FLATPTR(td->token);
738 if (token & QTD_STS_ACTIVE)
741 // XXX - check for errors.
744 int maxpacket = GET_FLATPTR(pipe->pipe.maxpacket);
745 int pos = td - GET_FLATPTR(pipe->tds);
746 void *tddata = GET_FLATPTR(pipe->data) + maxpacket * pos;
747 memcpy_far(GET_SEG(SS), data
748 , FLATPTR_TO_SEG(tddata), (void*)FLATPTR_TO_OFFSET(tddata)
752 struct ehci_qtd *next = (void*)(GET_FLATPTR(td->qtd_next) & ~EHCI_PTR_BITS);
753 SET_FLATPTR(pipe->next_td, next);
754 SET_FLATPTR(td->buf[0], (u32)tddata);
756 SET_FLATPTR(td->token, (ehci_explen(maxpacket) | QTD_STS_ACTIVE
757 | QTD_PID_IN | ehci_maxerr(3)));