w00t, wtf IT WORKS NOW!!!1

BUT actually I have NO idea why!

diff --git a/pkernel/Makefile b/pkernel/Makefile
index 711c85d8a9d28bf569e9abd2bc1c89d0fd11a1f6..c08634de44e49d4a4addc1a260f630e565432eda 100644 (file)
--- a/pkernel/Makefile
+++ b/pkernel/Makefile
@@ -52,7 +52,7 @@ DEPDIR = .deps
 
 #add all objects here
 
 
 #add all objects here
 

-OBJS = vectors.obj start91460.obj mb91465k.obj main.obj rlt.obj uart.obj flash.obj 
+OBJS = start91460.obj mb91465k.obj main.obj uart.obj flash.obj 

 
 AS = $(PREFIX)fasm911s
 CC = $(PREFIX)fcc911s
 
 AS = $(PREFIX)fasm911s
 CC = $(PREFIX)fcc911s

diff --git a/pkernel/main.c b/pkernel/main.c
index 2e024d27c89614751f1a5f28ba3a4ea5ebe2d133..89fc2c85f0a415eb04839d99c4a7a0b86e154905 100644 (file)
--- a/pkernel/main.c
+++ b/pkernel/main.c
@@ -1,15 +1,20 @@
 #include "mb91465k.h"
 #include "mb91465k.h"

-#include "vectors.h"
-#include "rlt.h"

 #include "flash.h"
 
 #pragma section CODE=IRAM,attr=CODE
 #include "flash.h"
 
 #pragma section CODE=IRAM,attr=CODE

+
+void increaseled(void)
+{
+       PDR14 = (PDR14+1)%256;
+       HWWD_CL = 0;
+}
+

 void main(void)
 {
        unsigned char error = 0;
        unsigned char global_error = 0; 
        unsigned int i, baseaddr;
 void main(void)
 {
        unsigned char error = 0;
        unsigned char global_error = 0; 
        unsigned int i, baseaddr;

-       unsigned int toflash2[] = {0x9b00,
+       unsigned int toflash[] = {0x9b00,

                                                                0x0d4e,
                                                                0xcff1,
                                                                0x1601,
                                                                0x0d4e,
                                                                0xcff1,
                                                                0x1601,


@@ -18,16 +23,7 @@ void main(void)
                                                                0xc106,
                                                                0x1656,
                                                                0xe0fb}; //len = 9
                                                                0xc106,
                                                                0x1656,
                                                                0xe0fb}; //len = 9

-       unsigned int toflash[] = {0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000}; //len = 9

        
        

-       /*      Enable Clock Monitor    */
-       CSCFG_MONCKI = 1;
-       CMCFG = 0x0D;
-               
-       __EI();                    /* enable interrupts */
-       __set_il(31);              /* allow all levels */
-       InitIrqLevels();           /* init interrupts */
-

        PORTEN = 0x3;           /* enable I/O Ports */
                                /* This feature is not supported by MB91V460A */
                                /* For all other devices the I/O Ports must be enabled*/
        PORTEN = 0x3;           /* enable I/O Ports */
                                /* This feature is not supported by MB91V460A */
                                /* For all other devices the I/O Ports must be enabled*/


@@ -36,12 +32,6 @@ void main(void)
        DDR14 = 0xFF;
        PDR14 = 0xff;
 
        DDR14 = 0xFF;
        PDR14 = 0xff;
 

-       /*      Initialize Reload Timer Channel 0       */
-       RLT_InitializeTimer(0, RLT_RUMMODE_RELOAD, RLT_CLOCKMODE_DIV32, RLT_TRIGGER_SOFTWARE, RLT_OUTOUTMODE_HIGHLEVEL);
-       RLT_SetReloadValue(0,0xfffe);
-       RLT_TriggerTimer(0);
-       RLT_EnableInterrupt(0, 1);
-

        /*      Initialize UART4        */
        InitUart4();
 
        /*      Initialize UART4        */
        InitUart4();
 


@@ -49,7 +39,7 @@ void main(void)
        Puts4(" \n\n");
        Puts4("\n\n********** Welcome to FUJITSU FLASH Programming Demo **********\n");
 
        Puts4(" \n\n");
        Puts4("\n\n********** Welcome to FUJITSU FLASH Programming Demo **********\n");
 

-#if 0
+#if 1

        i = 0;
        baseaddr = 0xf4000;
        for (; i <0x30; i+=4) {
        i = 0;
        baseaddr = 0xf4000;
        for (; i <0x30; i+=4) {


@@ -82,37 +72,6 @@ void main(void)
                Puthex4(baseaddr + (2*i), 6);
        }
 
                Puthex4(baseaddr + (2*i), 6);
        }
 

-       i=0;
-       Puts4("\nCurrent Content of FLASH at 0xf4000 ... 0xf401F:\n");
-       while(i < 0x20)
-       {
-               Puts4("0x"); Puthex4( *(unsigned char *)(0xf4000 + i), 2); Puts4(" ");
-               i++;
-               if( (i % 0x10) == 0 ) Puts4("\n");
-       }
-       Puts4("\n================================================================\n");
-
-       i = 0;
-       baseaddr = 0xf4000;
-       for(; i<9; i++) {
-               Puts4("\nwrite: ");
-               error = FLASH_WriteHalfWord(baseaddr + (2*i), toflash2[i]);
-               Puts4(error == 1 ? "[sucess] " : "[failed] ");
-               Puts4("0x");
-               Puthex4(toflash2[i], 4);
-               Puts4(" @0x");
-               Puthex4(baseaddr + (2*i), 6);
-       }
-
-       i=0;
-       Puts4("\nCurrent Content of FLASH at 0xf4000 ... 0xf401F:\n");
-       while(i < 0x20)
-       {
-               Puts4("0x"); Puthex4( *(unsigned char *)(0xf4000 + i), 2); Puts4(" ");
-               i++;
-               if( (i % 0x10) == 0 ) Puts4("\n");
-       }
-                               

        /*      Output Ready Meassage   */
        if( global_error != 0 )
        {
        /*      Output Ready Meassage   */
        if( global_error != 0 )
        {


@@ -123,8 +82,6 @@ void main(void)
                Puts4("\n********* FLASH Programming Demo done **********\n");
        }
 
                Puts4("\n********* FLASH Programming Demo done **********\n");
        }
 

-       RLT_EnableInterrupt(0, 0);
-                                       

     while(1)
     {    
          
     while(1)
     {    
          

diff --git a/pkernel/rlt.c b/pkernel/rlt.c
deleted file mode 100644 (file)
index 14076a3..0000000
--- a/pkernel/rlt.c
+++ /dev/null
@@ -1,300 +0,0 @@
-/*****************************************************************************/
-/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
-/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
-/* ELIGIBILITY FOR ANY PURPOSES.                                             */
-/*                 (C) Fujitsu Microelectronics Europe GmbH                  */
-/*****************************************************************************/
-
-#include "rlt.h"
-
-#pragma section CODE=IRAM,attr=CODE
-void RLT_InitializeTimer(unsigned char channel, unsigned char runmode, unsigned char clockmode, unsigned char triggermode, unsigned char outputmode)
-{
-       unsigned short setvalue = 0x00;
-       
-       /*      Prepare seting for the TMCSR Register   */
-       setvalue |= ( (clockmode << 10) | (triggermode << 7) | ((outputmode & 0x01) << 5) | ((runmode & 0x01) << 4) | 0x02 /* CNTE */ ); 
-
-       /*      Set the corresponding RLT channel       */
-       switch(channel)
-       {
-               case 0:
-               {
-                       TMCSR0 = setvalue;
-                       break;
-               }
-               case 1:
-               {
-                       TMCSR1 = setvalue;
-                       break;
-               }
-               case 2:
-               {
-                       TMCSR2 = setvalue;
-                       break;
-               }
-               case 3:
-               {
-                       TMCSR3 = setvalue;
-                       break;
-               }
-               case 4:
-               {
-                       TMCSR4 = setvalue;
-                       break;
-               }
-               case 5:
-               {
-                       TMCSR5 = setvalue;
-                       break;
-               }
-               case 6:
-               {
-                       TMCSR6 = setvalue;
-                       break;
-               }
-               case 7:
-               {
-                       TMCSR7 = setvalue;
-                       break;
-               }
-       }       
-}
-
-void RLT_SetReloadValue(unsigned char channel, unsigned short int value)
-{
-       switch(channel)
-       {
-               case 0:
-               {
-                       TMRLR0 = value;
-                       break;
-               }       
-               case 1:
-               {
-                       TMRLR1 = value;
-                       break;
-               }       
-               case 2:
-               {
-                       TMRLR2 = value;
-                       break;
-               }       
-               case 3:
-               {
-                       TMRLR3 = value;
-                       break;
-               }       
-               case 4:
-               {
-                       TMRLR4 = value;
-                       break;
-               }       
-               case 5:
-               {
-                       TMRLR5 = value;
-                       break;
-               }       
-               case 6:
-               {
-                       TMRLR6 = value;
-                       break;
-               }       
-               case 7:
-               {
-                       TMRLR7 = value;
-                       break;
-               }
-       }       
-}
-
-void RLT_TriggerTimer(unsigned char channel)
-{
-       switch(channel)
-       {
-               case 0:
-               {
-                       TMCSR0_TRG = 1;
-                       break;
-               }       
-               case 1:
-               {
-                       TMCSR1_TRG = 1;
-                       break;
-               }       
-               case 2:
-               {
-                       TMCSR2_TRG = 1;
-                       break;
-               }       
-               case 3:
-               {
-                       TMCSR3_TRG = 1;
-                       break;
-               }       
-               case 4:
-               {
-                       TMCSR4_TRG = 1;
-                       break;
-               }       
-               case 5:
-               {
-                       TMCSR5_TRG = 1;
-                       break;
-               }       
-               case 6:
-               {
-                       TMCSR6_TRG = 1;
-                       break;
-               }       
-               case 7:
-               {
-                       TMCSR7_TRG = 1;
-                       break;
-               }
-       }
-}
-
-void RLT_EnableInterrupt(unsigned char channel, unsigned char enable)
-{
-       switch(channel)
-       {
-               case 0:
-               {
-                       /*      Clear Pending Interrupt Flag    */
-                       TMCSR0_UF = 0;
-                       
-                       /* Enable Interrupt     */
-                       TMCSR0_INTE = enable;
-                       break;
-               }       
-               case 1:
-               {
-                       /*      Clear Pending Interrupt Flag    */
-                       TMCSR1_UF = 0;
-                       
-                       /* Enable Interrupt     */
-                       TMCSR1_INTE = enable;
-                       break;
-               }       
-               case 2:
-               {
-                       /*      Clear Pending Interrupt Flag    */
-                       TMCSR2_UF = 0;
-                       
-                       /* Enable Interrupt     */
-                       TMCSR2_INTE = enable;
-                       break;
-               }       
-               case 3:
-               {
-                       /*      Clear Pending Interrupt Flag    */
-                       TMCSR3_UF = 0;
-                       
-                       /* Enable Interrupt     */
-                       TMCSR3_INTE = enable;
-                       break;
-               }       
-               case 4:
-               {
-                       /*      Clear Pending Interrupt Flag    */
-                       TMCSR4_UF = 0;
-                       
-                       /* Enable Interrupt     */
-                       TMCSR4_INTE = enable;
-                       break;
-               }       
-               case 5:
-               {
-                       /*      Clear Pending Interrupt Flag    */
-                       TMCSR5_UF = 0;
-                       
-                       /* Enable Interrupt     */
-                       TMCSR5_INTE = enable;
-                       break;
-               }       
-               case 6:
-               {
-                       /*      Clear Pending Interrupt Flag    */
-                       TMCSR6_UF = 0;
-                       
-                       /* Enable Interrupt     */
-                       TMCSR6_INTE = enable;
-                       break;
-               }       
-               case 7:
-               {
-                       /*      Clear Pending Interrupt Flag    */
-                       TMCSR7_UF = 0;
-                       
-                       /* Enable Interrupt     */
-                       TMCSR7_INTE = enable;
-                       break;
-               }
-       }
-}
-
-__interrupt void RLT_Channel0_ISR()
-{
-       /*      Clear Pending Interrupt Flag    */
-       TMCSR0_UF = 0;
-       
-       /*      Do what you have to do  */
-       PDR14--; //since the pins are low active
-}
-
-__interrupt void RLT_Channel1_ISR()
-{
-       /*      Clear Pending Interrupt Flag    */
-       TMCSR1_UF = 0;
-       
-       /*      Do what you have to do  */
-}
-
-__interrupt void RLT_Channel2_ISR()
-{
-       /*      Clear Pending Interrupt Flag    */
-       TMCSR2_UF = 0;
-       
-       /*      Do what you have to do  */
-}
-
-__interrupt void RLT_Channel3_ISR()
-{
-       /*      Clear Pending Interrupt Flag    */
-       TMCSR3_UF = 0;
-       
-       /*      Do what you have to do  */
-}
-
-__interrupt void RLT_Channel4_ISR()
-{
-       /*      Clear Pending Interrupt Flag    */
-       TMCSR4_UF = 0;
-       
-       /*      Do what you have to do  */
-}
-
-__interrupt void RLT_Channel5_ISR()
-{
-       /*      Clear Pending Interrupt Flag    */
-       TMCSR5_UF = 0;
-       
-       /*      Do what you have to do  */
-}
-
-__interrupt void RLT_Channel6_ISR()
-{
-       /*      Clear Pending Interrupt Flag    */
-       TMCSR6_UF = 0;
-       
-       /*      Do what you have to do  */
-}
-
-__interrupt void RLT_Channel7_ISR()
-{
-       /*      Clear Pending Interrupt Flag    */
-       TMCSR7_UF = 0;
-       
-       /*      Do what you have to do  */
-}

diff --git a/pkernel/rlt.h b/pkernel/rlt.h
deleted file mode 100644 (file)
index 3d8c423..0000000
--- a/pkernel/rlt.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*****************************************************************************/
-/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
-/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
-/* ELIGIBILITY FOR ANY PURPOSES.                                             */
-/*                 (C) Fujitsu Microelectronics Europe GmbH                  */
-/*****************************************************************************/
-
-#ifndef __RLT_H__
-#define __RLT_H__
-
-#include "mb91465k.h"
-
-#define RLT_RUNMODE_ONESHOT    0x00
-#define RLT_RUMMODE_RELOAD     0x01
-
-#define RLT_CLOCKMODE_DIV2             0x00
-#define RLT_CLOCKMODE_DIV8             0x01
-#define RLT_CLOCKMODE_DIV32            0x02
-#define RLT_CLOCKMODE_EXT              0x03
-#define RLT_CLOCKMODE_DIV64            0x05
-#define RLT_CLOCKMODE_DIV128   0x06
-
-#define RLT_TRIGGER_SOFTWARE           0x00
-#define RLT_TRIGGER_EXT_FALLINGEDGE    0x01
-#define RLT_TRIGGER_EXT_RISINGEDGE     0x02
-#define RLT_TRIGGER_BOTHEDGES          0x03
-
-#define RLT_OUTOUTMODE_HIGHLEVEL       0x00
-#define RLT_OUTPUTMODE_LOWLEVEL                0x01
-
-void RLT_InitializeTimer(unsigned char channel, unsigned char runmode, unsigned char clockmode, unsigned char triggermode, unsigned char outputmode);
-void RLT_SetReloadValue(unsigned char channel, unsigned short int value);
-void RLT_EnableInterrupt(unsigned char channel, unsigned char enable);
-void RLT_TriggerTimer(unsigned char channel);
-
-__interrupt void RLT_Channel0_ISR();
-__interrupt void RLT_Channel1_ISR();
-__interrupt void RLT_Channel2_ISR();
-__interrupt void RLT_Channel3_ISR();
-__interrupt void RLT_Channel4_ISR();
-__interrupt void RLT_Channel5_ISR();
-__interrupt void RLT_Channel6_ISR();
-__interrupt void RLT_Channel7_ISR();
-
-#endif /*      __RLT_H__       */

diff --git a/pkernel/uart.c b/pkernel/uart.c
index 16e79de5ddcfbaa392e43e9f4f37d36635e6a75a..256500ef6bba12dc14300160bccc720a520c6d8a 100644 (file)
--- a/pkernel/uart.c
+++ b/pkernel/uart.c
@@ -15,14 +15,6 @@ void InitUart4(void)
   // BGR04 = 1666; //  9600 Baud @ 16MHz
   // BGR04 = 832;  // 19200 Baud @ 16MHz
   BGR04 = 416;  // 38400 Baud @ 16MHz
   // BGR04 = 1666; //  9600 Baud @ 16MHz
   // BGR04 = 832;  // 19200 Baud @ 16MHz
   BGR04 = 416;  // 38400 Baud @ 16MHz

-
-  // BGR04 = 2083; //  9600 Baud @ 20MHz
-  // BGR04 = 1041; // 19200 Baud @ 20MHz
-  // BGR04 = 520;  // 38400 Baud @ 20MHz
-
-  // BGR04 = 2499; //  9600 Baud @ 24MHz
-  // BGR04 = 1249; // 19200 Baud @ 24MHz
-  // BGR04 = 624;  // 38400 Baud @ 24MHz  

   SCR04 = 0x17;    // 8N1
   SMR04 = 0x0d;    // enable SOT3, Reset, normal mode
   SSR04 = 0x00;    // LSB first
   SCR04 = 0x17;    // 8N1
   SMR04 = 0x0d;    // enable SOT3, Reset, normal mode
   SSR04 = 0x00;    // LSB first


@@ -111,7 +103,7 @@ void Putdec4(unsigned long x, int digits)
        buf[digits]='\0';                       /* end sign of string */
        
        for (i=digits; i>0; i--) {
        buf[digits]='\0';                       /* end sign of string */
        
        for (i=digits; i>0; i--) {

-               buf[i-1] = ASCII[x % 10];
+               buf[i-1] = ASCII[x % 10]; // + '0' enough? :o

                x = x/10;
        }
 
                x = x/10;
        }
 

diff --git a/pkernel/vectors.c b/pkernel/vectors.c
deleted file mode 100644 (file)
index eddff7d..0000000
--- a/pkernel/vectors.c
+++ /dev/null
@@ -1,340 +0,0 @@
-/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
-/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
-/* ELIGIBILITY FOR ANY PURPOSES.                                             */
-/*                 (C) Fujitsu Microelectronics Europe GmbH                  */
-/*------------------------------------------------------------------------
-  VECTORS.C
-  - Interrupt level (priority) setting
-  - Interrupt vector definition
-
-  31.04.05  1.00   UMa    Initial Version
-  08.11.05  1.01   MSt    SWB Mondeb switch for ICR00 Register added
-  27.02.06  1.02   UMa    added comment in DefaultIRQHandler 
-  17.03.06  1.03   UMa    comment out ICR01
-  28.07.06  1.04   UMa    changed comment
-  06.10.06  1.05   UMa    changed DefaultIRQHandler
--------------------------------------------------------------------------*/
-
-#include "mb91465k.h"
-#include "rlt.h"
-
-#pragma section CODE=IRAM,attr=CODE
-/*------------------------------------------------------------------------
-  InitIrqLevels()
-
-  This function  pre-sets all interrupt control registers. It can be used
-  to set all interrupt priorities in static applications. If this file
-  contains assignments to dedicated resources, verify  that the
-  appropriate controller is used. Not all devices of the MB91460 Series
-  offer all recources.
-
-  NOTE: value 31 disables the interrupt and value 16 sets highest priority.
--------------------------------------------------------------------------*/
-void InitIrqLevels(void)
-{
-    /*  ICRxx */ 
-/* Softune Workbench Monitor Debugger is using ext int0 for abort function */
-/*  ICR00 = 31;  *//* External Interrupt 0         */
-                   /* External Interrupt 1         */                 
-    ICR01 = 31;    /* External Interrupt 2         */
-                   /* External Interrupt 3         */
-    ICR02 = 31;    /* External Interrupt 4         */
-                   /* External Interrupt 5         */
-    ICR03 = 31;    /* External Interrupt 6         */
-                   /* External Interrupt 7         */
-    ICR04 = 31;    /* External Interrupt 8         */
-                   /* External Interrupt 9         */
-    ICR05 = 31;    /* External Interrupt 10        */
-                   /* External Interrupt 11        */
-    ICR06 = 31;    /* External Interrupt 12        */
-                   /* External Interrupt 13        */
-    ICR07 = 31;    /* External Interrupt 14        */
-                   /* External Interrupt 15        */
-    ICR08 = 30;    /* Reload Timer 0               */
-                   /* Reload Timer 1               */
-    ICR09 = 31;    /* Reload Timer 2               */
-                   /* Reload Timer 3               */
-    ICR10 = 31;    /* Reload Timer 4               */
-                   /* Reload Timer 5               */
-    ICR11 = 31;    /* Reload Timer 6               */
-                   /* Reload Timer 7               */
-    ICR12 = 31;    /* Free Run Timer 0             */
-                   /* Free Run Timer 1             */
-    ICR13 = 31;    /* Free Run Timer 2             */
-                   /* Free Run Timer 3             */
-    ICR14 = 31;    /* Free Run Timer 4             */
-                   /* Free Run Timer 5             */
-    ICR15 = 31;    /* Free Run Timer 6             */
-                   /* Free Run Timer 7             */
-    ICR16 = 31;    /* CAN 0                        */
-                   /* CAN 1                        */
-    ICR17 = 31;    /* CAN 2                        */
-                   /* CAN 3                        */
-    ICR18 = 31;    /* CAN 4                        */
-                   /* CAN 5                        */
-    ICR19 = 31;    /* USART (LIN) 0 RX             */
-                   /* USART (LIN) 0 TX             */
-    ICR20 = 31;    /* USART (LIN) 1 RX             */
-                   /* USART (LIN) 1 TX             */
-    ICR21 = 31;    /* USART (LIN) 2 RX             */
-                   /* USART (LIN) 2 TX             */
-    ICR22 = 31;    /* USART (LIN) 3 RX             */
-                   /* USART (LIN) 3 TX             */
-    ICR23 = 31;    /* System Reserved              */
-                   /* Delayed Interrupt            */
-    ICR24 = 31;    /* System Reserved              */
-                   /* System Reserved              */
-    ICR25 = 31;    /* USART (LIN, FIFO) 4 RX       */
-                   /* USART (LIN, FIFO) 4 TX       */
-    ICR26 = 31;    /* USART (LIN, FIFO) 5 RX       */
-                   /* USART (LIN, FIFO) 5 TX       */
-    ICR27 = 31;    /* USART (LIN, FIFO) 6 RX       */
-                   /* USART (LIN, FIFO) 6 TX       */
-    ICR28 = 31;    /* USART (LIN, FIFO) 7 RX       */
-                   /* USART (LIN, FIFO) 7 TX       */
-    ICR29 = 31;    /* I2C 0 / I2C 2                */
-                   /* I2C 1 / I2C 3                */
-    ICR30 = 31;    /* USART (LIN, FIFO) 8 RX       */
-                   /* USART (LIN, FIFO) 8 TX       */
-    ICR31 = 31;    /* USART (LIN, FIFO) 9 RX       */
-                   /* USART (LIN, FIFO) 9 TX       */
-    ICR32 = 31;    /* USART (LIN, FIFO) 10 RX      */
-                   /* USART (LIN, FIFO) 10 TX      */
-    ICR33 = 31;    /* USART (LIN, FIFO) 11 RX      */
-                   /* USART (LIN, FIFO) 11 TX      */
-    ICR34 = 31;    /* USART (LIN, FIFO) 12 RX      */
-                   /* USART (LIN, FIFO) 12 TX      */
-    ICR35 = 31;    /* USART (LIN, FIFO) 13 RX      */
-                   /* USART (LIN, FIFO) 13 TX      */
-    ICR36 = 31;    /* USART (LIN, FIFO) 14 RX      */
-                   /* USART (LIN, FIFO) 14 TX      */
-    ICR37 = 31;    /* USART (LIN, FIFO) 15 RX      */
-                   /* USART (LIN, FIFO) 15 TX      */
-    ICR38 = 31;    /* Input Capture 0              */
-                   /* Input Capture 1              */
-    ICR39 = 31;    /* Input Capture 2              */
-                   /* Input Capture 3              */
-    ICR40 = 31;    /* Input Capture 4              */
-                   /* Input Capture 5              */
-    ICR41 = 31;    /* Input Capture 6              */
-                   /* Input Capture 7              */
-    ICR42 = 31;    /* Output Compare 0             */
-                   /* Output Compare 1             */
-    ICR43 = 31;    /* Output Compare 2             */
-                   /* Output Compare 3             */
-    ICR44 = 31;    /* Output Compare 4             */
-                   /* Output Compare 5             */
-    ICR45 = 31;    /* Output Compare 6             */
-                   /* Output Compare 7             */
-    ICR46 = 31;    /* Sound Generator              */
-                   /* Phase Frequ. Modulator       */
-    ICR47 = 31;    /* System Reserved              */
-                   /* System Reserved              */
-    ICR48 = 31;    /* Prog. Pulse Gen. 0           */
-                   /* Prog. Pulse Gen. 1           */
-    ICR49 = 31;    /* Prog. Pulse Gen. 2           */
-                   /* Prog. Pulse Gen. 3           */
-    ICR50 = 31;    /* Prog. Pulse Gen. 4           */
-                   /* Prog. Pulse Gen. 5           */
-    ICR51 = 31;    /* Prog. Pulse Gen. 6           */
-                   /* Prog. Pulse Gen. 7           */
-    ICR52 = 31;    /* Prog. Pulse Gen. 8           */
-                   /* Prog. Pulse Gen. 9           */
-    ICR53 = 31;    /* Prog. Pulse Gen. 10          */
-                   /* Prog. Pulse Gen. 11          */
-    ICR54 = 31;    /* Prog. Pulse Gen. 12          */
-                   /* Prog. Pulse Gen. 13          */
-    ICR55 = 31;    /* Prog. Pulse Gen. 14          */
-                   /* Prog. Pulse Gen. 15          */
-    ICR56 = 31;    /* Up/Down Counter 0            */
-                   /* Up/Down Counter 1            */
-    ICR57 = 31;    /* Up/Down Counter 2            */
-                   /* Up/Down Counter 3            */
-    ICR58 = 31;    /* Real Time Clock              */
-                   /* Calibration Unit             */
-    ICR59 = 31;    /* A/D Converter 0              */
-                   /* -                            */
-    ICR60 = 31;    /* Alarm Comperator 0           */
-                   /* Alarm Comperator 1           */
-    ICR61 = 31;    /* Low Volage Detector          */
-                   /* SMC Zero Point 0-5           */
-    ICR62 = 31;    /* Timebase Overflow            */
-                   /* PLL Clock Gear               */
-    ICR63 = 31;    /* DMA Controller               */
-                   /* Main/Sub OSC stability wait  */
-}
-
-
-
-/*------------------------------------------------------------------------
-  Prototypes
-  
-  Add your own prototypes here. Each vector definition needs is proto-
-  type. Either do it here or include a header file containing them.
--------------------------------------------------------------------------*/
-__interrupt void DefaultIRQHandler (void);
-__interrupt void RLT_Channel0_ISR (void);
-
-
-/*------------------------------------------------------------------------
-   Vector definiton
-
-   Use following statements to define vectors. All resource related
-   vectors are predefined. Remaining software interrupts can be added here
-   as well.
-------------------------------------------------------------------------*/
-#pragma intvect 0xBFF8            0     /* (fixed) reset vector         */
-#pragma intvect 0x06000000        1     /* (fixed) Mode Byte            */
-
-#pragma intvect DefaultIRQHandler 15    /* Non Maskable Interrupt       */
-#pragma intvect DefaultIRQHandler 16    /* External Interrupt 0         */
-#pragma intvect DefaultIRQHandler 17    /* External Interrupt 1         */
-#pragma intvect DefaultIRQHandler 18    /* External Interrupt 2         */
-#pragma intvect DefaultIRQHandler 19    /* External Interrupt 3         */
-#pragma intvect DefaultIRQHandler 20    /* External Interrupt 4         */
-#pragma intvect DefaultIRQHandler 21    /* External Interrupt 5         */
-#pragma intvect DefaultIRQHandler 22    /* External Interrupt 6         */
-#pragma intvect DefaultIRQHandler 23    /* External Interrupt 7         */
-#pragma intvect DefaultIRQHandler 24    /* External Interrupt 8         */
-#pragma intvect DefaultIRQHandler 25    /* External Interrupt 9         */
-#pragma intvect DefaultIRQHandler 26    /* External Interrupt 10        */
-#pragma intvect DefaultIRQHandler 27    /* External Interrupt 11        */
-#pragma intvect DefaultIRQHandler 28    /* External Interrupt 12        */
-#pragma intvect DefaultIRQHandler 29    /* External Interrupt 13        */
-#pragma intvect DefaultIRQHandler 30    /* External Interrupt 14        */
-#pragma intvect DefaultIRQHandler 31    /* External Interrupt 15        */
-#pragma intvect RLT_Channel0_ISR  32    /* Reload Timer 0               */
-#pragma intvect DefaultIRQHandler 33    /* Reload Timer 1               */
-#pragma intvect DefaultIRQHandler 34    /* Reload Timer 2               */
-#pragma intvect DefaultIRQHandler 35    /* Reload Timer 3               */
-#pragma intvect DefaultIRQHandler 36    /* Reload Timer 4               */
-#pragma intvect DefaultIRQHandler 37    /* Reload Timer 5               */
-#pragma intvect DefaultIRQHandler 38    /* Reload Timer 6               */
-#pragma intvect DefaultIRQHandler 39    /* Reload Timer 7               */
-#pragma intvect DefaultIRQHandler 40    /* Free Run Timer 0             */
-#pragma intvect DefaultIRQHandler 41    /* Free Run Timer 1             */
-#pragma intvect DefaultIRQHandler 42    /* Free Run Timer 2             */
-#pragma intvect DefaultIRQHandler 43    /* Free Run Timer 3             */
-#pragma intvect DefaultIRQHandler 44    /* Free Run Timer 4             */
-#pragma intvect DefaultIRQHandler 45    /* Free Run Timer 5             */
-#pragma intvect DefaultIRQHandler 46    /* Free Run Timer 6             */
-#pragma intvect DefaultIRQHandler 47    /* Free Run Timer 7             */
-#pragma intvect DefaultIRQHandler 48    /* CAN 0                        */
-#pragma intvect DefaultIRQHandler 49    /* CAN 1                        */
-#pragma intvect DefaultIRQHandler 50    /* CAN 2                        */
-#pragma intvect DefaultIRQHandler 51    /* CAN 3                        */
-#pragma intvect DefaultIRQHandler 52    /* CAN 4                        */
-#pragma intvect DefaultIRQHandler 53    /* CAN 5                        */
-#pragma intvect DefaultIRQHandler 54    /* USART (LIN) 0 RX             */
-#pragma intvect DefaultIRQHandler 55    /* USART (LIN) 0 TX             */
-#pragma intvect DefaultIRQHandler 56    /* USART (LIN) 1 RX             */
-#pragma intvect DefaultIRQHandler 57    /* USART (LIN) 1 TX             */
-#pragma intvect DefaultIRQHandler 58    /* USART (LIN) 2 RX             */
-#pragma intvect DefaultIRQHandler 59    /* USART (LIN) 2 TX             */
-#pragma intvect DefaultIRQHandler 60    /* USART (LIN) 3 RX             */
-#pragma intvect DefaultIRQHandler 61    /* USART (LIN) 3 TX             */
-#pragma intvect DefaultIRQHandler 62    /* System Reserved              */
-#pragma intvect DefaultIRQHandler 63    /* Delayed Interrupt            */
-#pragma intvect DefaultIRQHandler 64    /* System Reserved              */
-#pragma intvect DefaultIRQHandler 65    /* System Reserved              */
-#pragma intvect DefaultIRQHandler 66    /* USART (LIN, FIFO) 4 RX       */
-#pragma intvect DefaultIRQHandler 67    /* USART (LIN, FIFO) 4 TX       */
-#pragma intvect DefaultIRQHandler 68    /* USART (LIN, FIFO) 5 RX       */
-#pragma intvect DefaultIRQHandler 69    /* USART (LIN, FIFO) 5 TX       */
-#pragma intvect DefaultIRQHandler 70    /* USART (LIN, FIFO) 6 RX       */
-#pragma intvect DefaultIRQHandler 71    /* USART (LIN, FIFO) 6 TX       */
-#pragma intvect DefaultIRQHandler 72    /* USART (LIN, FIFO) 7 RX       */
-#pragma intvect DefaultIRQHandler 73    /* USART (LIN, FIFO) 7 TX       */
-#pragma intvect DefaultIRQHandler 74    /* I2C 0 / I2C 2                */
-#pragma intvect DefaultIRQHandler 75    /* I2C 1 / I2C 3                */
-#pragma intvect DefaultIRQHandler 76    /* USART (LIN, FIFO) 8 RX       */
-#pragma intvect DefaultIRQHandler 77    /* USART (LIN, FIFO) 8 TX       */
-#pragma intvect DefaultIRQHandler 78    /* USART (LIN, FIFO) 9 RX       */
-#pragma intvect DefaultIRQHandler 79    /* USART (LIN, FIFO) 9 TX       */
-#pragma intvect DefaultIRQHandler 80    /* USART (LIN, FIFO) 10 RX      */
-#pragma intvect DefaultIRQHandler 81    /* USART (LIN, FIFO) 10 TX      */
-#pragma intvect DefaultIRQHandler 82    /* USART (LIN, FIFO) 11 RX      */
-#pragma intvect DefaultIRQHandler 83    /* USART (LIN, FIFO) 11 TX      */
-#pragma intvect DefaultIRQHandler 84    /* USART (LIN, FIFO) 12 RX      */
-#pragma intvect DefaultIRQHandler 85    /* USART (LIN, FIFO) 12 TX      */
-#pragma intvect DefaultIRQHandler 86    /* USART (LIN, FIFO) 13 RX      */
-#pragma intvect DefaultIRQHandler 87    /* USART (LIN, FIFO) 13 TX      */
-#pragma intvect DefaultIRQHandler 88    /* USART (LIN, FIFO) 14 RX      */
-#pragma intvect DefaultIRQHandler 89    /* USART (LIN, FIFO) 14 TX      */
-#pragma intvect DefaultIRQHandler 90    /* USART (LIN, FIFO) 15 RX      */
-#pragma intvect DefaultIRQHandler 91    /* USART (LIN, FIFO) 15 TX      */
-#pragma intvect DefaultIRQHandler 92    /* Input Capture 0              */
-#pragma intvect DefaultIRQHandler 93    /* Input Capture 1              */
-#pragma intvect DefaultIRQHandler 94    /* Input Capture 2              */
-#pragma intvect DefaultIRQHandler 95    /* Input Capture 3              */
-#pragma intvect DefaultIRQHandler 96    /* Input Capture 4              */
-#pragma intvect DefaultIRQHandler 97    /* Input Capture 5              */
-#pragma intvect DefaultIRQHandler 98    /* Input Capture 6              */
-#pragma intvect DefaultIRQHandler 99    /* Input Capture 7              */
-#pragma intvect DefaultIRQHandler 100   /* Output Compare 0             */
-#pragma intvect DefaultIRQHandler 101   /* Output Compare 1             */
-#pragma intvect DefaultIRQHandler 102   /* Output Compare 2             */
-#pragma intvect DefaultIRQHandler 103   /* Output Compare 3             */
-#pragma intvect DefaultIRQHandler 104   /* Output Compare 4             */
-#pragma intvect DefaultIRQHandler 105   /* Output Compare 5             */
-#pragma intvect DefaultIRQHandler 106   /* Output Compare 6             */
-#pragma intvect DefaultIRQHandler 107   /* Output Compare 7             */
-#pragma intvect DefaultIRQHandler 108   /* Sound Generator              */
-#pragma intvect DefaultIRQHandler 109   /* Phase Frequ. Modulator       */
-#pragma intvect DefaultIRQHandler 110   /* System Reserved              */
-#pragma intvect DefaultIRQHandler 111   /* System Reserved              */
-#pragma intvect DefaultIRQHandler 112   /* Prog. Pulse Gen. 0           */
-#pragma intvect DefaultIRQHandler 113   /* Prog. Pulse Gen. 1           */
-#pragma intvect DefaultIRQHandler 114   /* Prog. Pulse Gen. 2           */
-#pragma intvect DefaultIRQHandler 115   /* Prog. Pulse Gen. 3           */
-#pragma intvect DefaultIRQHandler 116   /* Prog. Pulse Gen. 4           */
-#pragma intvect DefaultIRQHandler 117   /* Prog. Pulse Gen. 5           */
-#pragma intvect DefaultIRQHandler 118   /* Prog. Pulse Gen. 6           */
-#pragma intvect DefaultIRQHandler 119   /* Prog. Pulse Gen. 7           */
-#pragma intvect DefaultIRQHandler 120   /* Prog. Pulse Gen. 8           */
-#pragma intvect DefaultIRQHandler 121   /* Prog. Pulse Gen. 9           */
-#pragma intvect DefaultIRQHandler 122   /* Prog. Pulse Gen. 10          */
-#pragma intvect DefaultIRQHandler 123   /* Prog. Pulse Gen. 11          */
-#pragma intvect DefaultIRQHandler 124   /* Prog. Pulse Gen. 12          */
-#pragma intvect DefaultIRQHandler 125   /* Prog. Pulse Gen. 13          */
-#pragma intvect DefaultIRQHandler 126   /* Prog. Pulse Gen. 14          */
-#pragma intvect DefaultIRQHandler 127   /* Prog. Pulse Gen. 15          */
-#pragma intvect DefaultIRQHandler 128   /* Up/Down Counter 0            */
-#pragma intvect DefaultIRQHandler 129   /* Up/Down Counter 1            */
-#pragma intvect DefaultIRQHandler 130   /* Up/Down Counter 2            */
-#pragma intvect DefaultIRQHandler 131   /* Up/Down Counter 3            */
-#pragma intvect DefaultIRQHandler 132   /* Real Time Clock              */
-#pragma intvect DefaultIRQHandler 133   /* Calibration Unit             */
-#pragma intvect DefaultIRQHandler 134   /* A/D Converter 0              */
-#pragma intvect DefaultIRQHandler 135   /* -                            */
-#pragma intvect DefaultIRQHandler 136   /* Alarm Comperator 0           */
-#pragma intvect DefaultIRQHandler 137   /* Alarm Comperator 1           */
-#pragma intvect DefaultIRQHandler 138   /* Low Volage Detector          */
-#pragma intvect DefaultIRQHandler 139   /* SMC Zero Point 0-5           */
-#pragma intvect DefaultIRQHandler 140   /* Timebase Overflow            */
-#pragma intvect DefaultIRQHandler 141   /* PLL Clock Gear               */
-#pragma intvect DefaultIRQHandler 142   /* DMA Controller               */
-#pragma intvect DefaultIRQHandler 143   /* Main/Sub OSC stability wait  */
-#pragma intvect 0xFFFFFFFF        144   /* Boot Sec. Vector (MB91V460A) */
-
-
-
-/*------------------------------------------------------------------------
-  DefaultIRQHandler()
-
-  This function is a placeholder for all vector definitions. Either use
-  your own placeholder or add necessary code here. 
--------------------------------------------------------------------------*/
-__interrupt 
-void DefaultIRQHandler (void)
-{
-    /* RB_SYNC; */                      /* Synchronisation with R-Bus   */
-                                        /* May be required, if there is */
-                                        /* no R-Bus access after the    */
-                                        /* reset of the interrupt flag  */
-
-    __DI();                             /* disable interrupts           */
-    while(1)
-        HWWD_CL = 0;                    /* feed hardware watchdog       */
-                                        /* halt system */
-}

diff --git a/pkernel/vectors.h b/pkernel/vectors.h
deleted file mode 100644 (file)
index f39bbac..0000000
--- a/pkernel/vectors.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
-/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
-/* ELIGIBILITY FOR ANY PURPOSES.                                             */
-/*                 (C) Fujitsu Microelectronics Europe GmbH                  */
-/*----------------------------------------------------------------------------
-  VECTORS.h
-
-
-  06.10.06  1.00   UMa    Initial Version
------------------------------------------------------------------------------*/
-
-
-void InitIrqLevels(void);