amd64_call_code (code, 0);
}
else {
+ if (!no_patch && ((guint32)(code + 2 - cfg->native_code) % 8) != 0) {
+ guint32 pad_size = 8 - ((guint32)(code + 2 - cfg->native_code) % 8);
+ amd64_padding (code, pad_size);
+ g_assert ((guint64)(code + 2 - cfg->native_code) % 8 == 0);
+ }
mono_add_patch_info (cfg, code - cfg->native_code, patch_type, data);
amd64_set_reg_template (code, GP_SCRATCH_REG);
amd64_call_reg (code, GP_SCRATCH_REG);
if (((code [-13] == 0x49) && (code [-12] == 0xbb)) || (code [-5] == 0xe8)) {
if (code [-5] != 0xe8) {
if (can_write) {
+ g_assert ((guint64)(orig_code - 11) % 8 == 0);
InterlockedExchangePointer ((gpointer*)(orig_code - 11), addr);
VALGRIND_DISCARD_TRANSLATIONS (orig_code - 11, sizeof (gpointer));
}