2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
7 end entity post_alu_tb;
9 architecture sim of post_alu_tb is
13 sys_clk : in std_logic;
14 sys_res_n : in std_logic;
16 op1 : in std_logic_vector(31 downto 0);
17 op2 : in std_logic_vector(31 downto 0);
18 op3 : out std_logic_vector(31 downto 0);
19 do_calc : in std_logic;
20 calc_done : out std_logic
24 signal sys_clk, sys_res_n, do_calc, calc_done : std_logic;
25 signal opcode : alu_ops;
26 signal op1, op2, op3 : std_logic_vector(31 downto 0);
27 signal stop : boolean := false;
33 sys_res_n => sys_res_n,
35 calc_done => calc_done,
54 type alu_testv is record
61 -- ggf. groesse des arrays erhoehen
62 type alu_testv_array is array (natural range 0 to 20) of alu_testv;
64 variable testmatrix : alu_testv_array :=
65 ( 0 => (-5, ALU_DIV, 3, -1),
66 1 => (7, ALU_ADD, 3, 10),
67 2 => (7, ALU_SUB, 1, 6),
68 3 => (7, ALU_DIV, 1, 7),
69 4 => (7, ALU_DIV, 3, 2),
70 5 => (7, ALU_ADD, 1, 8),
71 6 => (7, ALU_MUL, 3, 21),
72 7 => (-7, ALU_MUL, 3, -21),
73 8 => (268435456, ALU_MUL, -2, -536870912),
74 9 => (268435456, ALU_MUL, 2**5, 0), -- um fuenf nach links shiften
75 10 => (268435456 + 5, ALU_MUL, 2**5, 160), -- = 5 * (2^5)
76 11 => (100, ALU_DIV, 10, 10),
77 12 => (100, ALU_DIV, 51, 1),
78 13 => (100, ALU_DIV, 49, 2),
79 14 => (153156, ALU_DIV, 3543, 43),
80 15 => (-153156, ALU_DIV, 3543, -43),
81 16 => (153156, ALU_DIV, -3543, -43),
82 17 => (-153156, ALU_DIV, -3543, 43),
83 others => (0, ALU_ADD, 0, 0)
91 op1 <= (others => '0');
92 op2 <= (others => '0');
97 for i in testmatrix'range loop
99 op1 <= std_logic_vector(to_signed(testmatrix(i).o1,CBITS));
100 opcode <= testmatrix(i).o;
101 op2 <= std_logic_vector(to_signed(testmatrix(i).o2,CBITS));
103 -- berechnung kann los gehen
106 -- warten auf die alu einheit
110 assert op3 = std_logic_vector(to_signed(testmatrix(i).expected,CBITS))
111 report "" & cinteger'image(testmatrix(i).o1) &
112 " " & integer'image(to_integer(signed(opcode))) &
113 " " & cinteger'image(testmatrix(i).o2) &
114 "/= " & integer'image(to_integer(signed(op3))) &
115 " -- erwartet: " & cinteger'image(testmatrix(i).expected);
123 report "alle testfaelle der ALU waren erfolgreich!";
127 end architecture sim;