src/pc_communication.vhd

   1 library ieee;
   2 use ieee.std_logic_1164.all;
   3 use ieee.numeric_std.all;
   4 use work.gen_pkg.all;
   5
   6 entity pc_communication is
   7         port (
   8                 sys_clk : in std_logic;
   9                 sys_res_n : in std_logic;
  10
  11                 --button
  12                 btn_a : in std_logic;
  13
  14                 --uart_tx
  15                 tx_data : out std_logic_vector(7 downto 0);
  16                 tx_new : out std_logic;
  17                 tx_done : in std_logic;
  18
  19                 --uart_rx
  20                 rx_data : in std_logic_vector(7 downto 0); --not really required
  21                 rx_new : in std_logic;
  22
  23                 -- History
  24                 d_zeile : out hzeile;
  25                 d_spalte : out hspalte;
  26                 d_get :  out std_logic;
  27                 d_done : in std_logic;
  28                 d_char : in hbyte
  29         );
  30 end entity pc_communication;
  31
  32 architecture beh of pc_communication is
  33         signal push_history, push_history_next : std_logic;
  34
  35         signal spalte, spalte_next : hspalte;
  36         signal zeile , zeile_next : hzeile;
  37         signal spalte_up, spalte_up_next : std_logic;
  38         signal get, get_next : std_logic;
  39
  40         signal char, char_next : hbyte;
  41         signal char_en : std_logic;
  42         type STATE_PC is (IDLE, FETCH, FORWARD, DONE);
  43         signal state, state_next : STATE_PC ;
  44
  45 begin
  46
  47
  48         d_zeile <= zeile;
  49         d_spalte <= spalte;
  50         d_get <= get;
  51
  52         sync: process (sys_clk, sys_res_n)
  53         begin
  54                 if sys_res_n = '0' then
  55                         state <= IDLE;
  56                         push_history <= '0';
  57                         spalte <= "0000000";
  58                         spalte_next <= "0000000";
  59                         zeile <= "0000000";
  60                         zeile_next <= "0000000";
  61                         get <= '0';
  62                         tx_new <= '0';
  63                         tx_data <= "00000000";
  64                 elsif rising_edge(sys_clk) then
  65                         push_history <= push_history_next;
  66                         spalte <= spalte_next;
  67                         zeile <= zeile_next;
  68                         state <= state_next;
  69                         get <= get_next;
  70                         if (char_en = '1') then
  71                                 state <= state_next;
  72                         end if;
  73                 end if;
  74         end process sync;
  75
  76         process (spalte_up, spalte, zeile)
  77         variable spalte_tmp, zeile_tmp : integer;
  78         variable spalte2_tmp, zeile2_tmp : std_logic_vector(7 downto 0);
  79         begin
  80                 if (spalte_up = '1') then
  81                         if (spalte > X"45") then
  82                                 spalte_next <= "0000000";
  83                                 zeile_tmp := to_integer(unsigned(zeile)) + 1;
  84                                 zeile2_tmp := std_logic_vector(to_unsigned(zeile_tmp,8));
  85                                 zeile_next <= hzeile(zeile2_tmp(6 downto 0));
  86                         else
  87                                 spalte_tmp := to_integer(unsigned(spalte)) + 1;
  88                                 spalte2_tmp := std_logic_vector(to_unsigned(spalte_tmp,8));
  89                                 spalte_next <= hspalte(spalte2_tmp(6 downto 0));
  90                                 zeile_next <= zeile;
  91                         end if;
  92                         spalte_up <= '0';
  93                 end if;
  94         end process;
  95
  96         async_push_history : process (rx_new, rx_data, btn_a)
  97         begin
  98                 if rx_new = '1' then
  99                         if rx_data = X"41" then
 100                                 push_history_next <= '1';
 101                         else
 102                                 push_history_next <= '0';
 103                         end if;
 104                 elsif btn_a = '1' then
 105                                 push_history_next <= '1';
 106                 else
 107                         push_history_next <= '0';
 108                 end if;
 109         end process async_push_history;
 110
 111         output_pc : process (state, zeile, spalte, char)
 112         begin
 113                 get_next <= '0';
 114                 spalte_next <= "0000000";
 115                 zeile_next <= "0000000";
 116                 case state is
 117                         when IDLE =>
 118                                 null;
 119                         when FETCH =>
 120                                 get_next <= '1';
 121                                 char_en <= '1';
 122                         when FORWARD =>
 123                                 char_en <= '0';
 124                                 tx_data <= char;
 125                                 tx_new <= '1';
 126                         when DONE =>
 127                                 null;
 128                 end case;
 129         end process output_pc;
 130
 131         next_state_pc : process (rx_new, btn_a, d_done, tx_done)
 132         begin
 133                 spalte_up <= '0';
 134                 case state is
 135                         when IDLE =>
 136                                 if rx_new = '1' or btn_a = '1' then
 137                                         state_next <= FETCH;
 138                                         char <= d_char; --latch
 139                                 end if;
 140                         when FETCH =>
 141                                 if (d_done = '1') then
 142                                         state_next <= FORWARD;
 143                                 end if;
 144                         when FORWARD =>
 145                                 if (tx_done = '1') then
 146                                         state_next <= FETCH;
 147                                         spalte_up <= '1';
 148                                 end if;
 149                         when DONE =>
 150                                 state_next <= IDLE;
 151                 end case;
 152         end process next_state_pc;
 153
 154 end architecture beh;