src/display.vhd

   1 library ieee;
   2 use ieee.std_logic_1164.all;
   3 use ieee.numeric_std.all;
   4 use work.gen_pkg.all;
   5 use work.textmode_vga_component_pkg.all;
   6 use work.textmode_vga_pkg.all;
   7 use work.textmode_vga_platform_dependent_pkg.all;
   8
   9 entity display is
  10         port (
  11                 sys_clk : in std_logic;
  12                 sys_res_n : in std_logic;
  13                 -- History
  14                 d_new_eingabe : in std_logic;
  15                 d_new_result : in std_logic;
  16                 d_zeile : out hzeile;
  17                 d_spalte : out hspalte;
  18                 d_get : out std_logic;
  19                 d_done : in std_logic;
  20                 d_char : in hbyte;
  21                 -- VGA
  22                 command : out std_logic_vector(7 downto 0);
  23                 command_data : out std_logic_vector(31 downto 0);
  24                 free : in std_logic
  25         );
  26 end entity display;
  27
  28 architecture beh of display is
  29         type DISPLAY_STATE is (SIDLE, S_NEW_RESULT, S_NEW_INPUT, S_COUNTUP, S_GETCH,
  30         S_CR1, S_NL1, S_PUTCH1, S_PUTCH2, S_WAIT, S_NOP1);
  31         signal state_int, state_next : DISPLAY_STATE;
  32         signal d_zeile_int, d_zeile_next : hzeile;
  33         signal d_spalte_int, d_spalte_next : hspalte;
  34         signal d_get_int, d_get_next : std_logic;
  35         signal command_int, command_next : std_logic_vector(7 downto 0);
  36         signal command_data_int, command_data_next : std_logic_vector(31 downto 0);
  37         signal istate_next, istate_int : signed(2 downto 0);
  38 begin
  39         d_zeile <= d_zeile_int;
  40         d_spalte <= d_spalte_int;
  41         d_get <= d_get_int;
  42         command <= command_int;
  43         command_data <= command_data_int;
  44
  45         process(sys_clk, sys_res_n)
  46         begin
  47                 if sys_res_n = '0' then
  48                         -- internal
  49                         state_int <= SIDLE;
  50                         istate_int <= (others => '0');
  51                         -- out
  52                         d_zeile_int <= (others => '0');
  53                         d_spalte_int <= (others => '0');
  54                         d_get_int <= '0';
  55                         command_int <= COMMAND_NOP;
  56                         command_data_int <= (others => '0');
  57                 elsif rising_edge(sys_clk) then
  58                         -- internal
  59                         state_int <= state_next;
  60                         istate_int <= istate_next;
  61                         -- out
  62                         d_zeile_int <= d_zeile_next;
  63                         d_spalte_int <= d_spalte_next;
  64                         d_get_int <= d_get_next;
  65                         command_int <= command_next;
  66                         command_data_int <= command_data_next;
  67                 end if;
  68         end process;
  69
  70         -- next state
  71         process(state_int, d_new_result, d_new_eingabe, d_done, free, d_spalte_int,
  72                 d_char, istate_int)
  73         begin
  74                 state_next <= state_int;
  75                 istate_next <= istate_int;
  76
  77                 case state_int is
  78                         when SIDLE =>
  79                                 istate_next <= b"111"; -- default: immer wieder ins SIDLE;
  80                                 if d_new_eingabe = '1' then
  81                                         state_next <= S_NEW_INPUT;
  82                                 end if;
  83                                 if d_new_result = '1' then
  84                                         state_next <= S_NEW_RESULT;
  85                                 end if;
  86                         when S_NEW_RESULT =>
  87                                 state_next <= S_CR1;
  88                         when S_NEW_INPUT =>
  89                                 state_next <= S_COUNTUP;
  90                         when S_CR1 =>
  91                                 if free = '0' then
  92                                         state_next <= S_WAIT;
  93                                         istate_next <= b"000"; -- => danach S_NL1
  94                                 end if;
  95                         when S_NL1 =>
  96                                 if free = '0' then
  97                                         state_next <= S_WAIT;
  98                                         istate_next <= b"111"; -- => wieder nach SIDLE
  99                                 end if;
 100                         when S_COUNTUP =>
 101                                 state_next <= S_GETCH;
 102                         when S_GETCH =>
 103                                 if free = '1' and d_done = '1' and d_new_result = '0' and d_new_eingabe = '0' then
 104                                         state_next <= S_PUTCH1;
 105                                 end if;
 106                         when S_PUTCH1 =>
 107                                 state_next <= S_PUTCH2;
 108                         when S_PUTCH2 =>
 109                                 if free = '0' or (free = '1' and d_char = x"00") then
 110                                         state_next <= S_WAIT;
 111                                 end if;
 112                         when S_WAIT =>
 113                                 if free = '1' and d_done = '0' then
 114                                         state_next <= S_NOP1;
 115                                 end if;
 116                         when S_NOP1 =>
 117                                 if free = '1' then
 118                                         case istate_int is
 119                                                 when b"000" => state_next <= S_NL1;
 120                                                 when others => state_next <= SIDLE;
 121                                         end case;
 122                                 end if;
 123                 end case;
 124         end process;
 125
 126         -- out
 127         process(state_int, d_zeile_int, d_spalte_int, d_get_int, command_int,
 128                 command_data_int, d_char)
 129         begin
 130                 d_zeile_next <= d_zeile_int;
 131                 d_spalte_next <= d_spalte_int;
 132                 d_get_next <= '0';
 133                 command_next <= command_int;
 134                 command_data_next <= command_data_int;
 135
 136                 case state_int is
 137                         when SIDLE =>
 138                                 null;
 139                         when S_NEW_INPUT =>
 140                                 null;
 141                         when S_NEW_RESULT =>
 142                                 d_spalte_next <= (others => '0');
 143                                 case d_zeile_int is
 144                                         when "11111" => d_zeile_next <= "00000";
 145                                         when others => d_zeile_next <= std_logic_vector(unsigned(d_zeile_int) + 1);
 146                                 end case;
 147                         when S_CR1 =>
 148                                 command_next <= COMMAND_SET_CHAR;
 149                                 command_data_next <= x"ffffff" & x"0d"; -- carrige return
 150                         when S_NL1 =>
 151                                 command_next <= COMMAND_SET_CHAR;
 152                                 command_data_next <= x"ffffff" & x"0a"; -- newline
 153                         when S_COUNTUP =>
 154                                 d_get_next <= '1';
 155                                 d_spalte_next <= std_logic_vector(unsigned(d_spalte_int) + 1);
 156                         when S_GETCH =>
 157                                 d_get_next <= '1';
 158                         when S_PUTCH1 =>
 159                                 if d_char /= x"00" then
 160                                         command_next <= COMMAND_SET_CHAR;
 161                                         command_data_next <= x"ffffff" & std_logic_vector(d_char);
 162                                 end if;
 163                         when S_PUTCH2 => null;
 164                         when S_WAIT | S_NOP1 =>
 165                                 command_next <= COMMAND_NOP;
 166                                 command_data_next <= x"00000000";
 167                 end case;
 168         end process;
 169 end architecture beh;