src/beh_history_tb.vhd

   1 library ieee;
   2 use ieee.std_logic_1164.all;
   3 use ieee.numeric_std.all;
   4 use work.gen_pkg.all;
   5 use work.textmode_vga_component_pkg.all;
   6 use work.textmode_vga_pkg.all;
   7 use work.textmode_vga_platform_dependent_pkg.all;
   8
   9 entity beh_history_tb is
  10 end entity beh_history_tb;
  11
  12 architecture sim of beh_history_tb is
  13         -- system
  14         signal sys_clk, sys_res_n : std_logic;
  15         -- history/display
  16         signal d_new_eingabe, d_new_result, d_new_bs : std_logic;
  17         signal d_zeile : hzeile;
  18         signal d_spalte : hspalte;
  19         signal d_get, d_done : std_logic;
  20         signal d_char : hbyte;
  21         -- history/scanner
  22         signal s_char : hbyte;
  23         signal s_take, s_done, s_backspace : std_logic;
  24         -- ps/2
  25         signal new_data : std_logic;
  26         signal data : std_logic_vector(7 downto 0);
  27         -- vga/display
  28         signal free : std_logic;
  29         signal command : std_logic_vector(COMMAND_SIZE - 1 downto 0);
  30         signal command_data : std_logic_vector(3 * COLOR_SIZE + CHAR_SIZE -1 downto 0);
  31         -- history/parser
  32         signal p_rget : std_logic;
  33         signal p_rdone : std_logic;
  34         signal p_read : hbyte;
  35         signal p_wtake : std_logic;
  36         signal p_wdone : std_logic;
  37         signal p_write : hbyte;
  38         signal p_finished : std_logic;
  39         -- parser/scanner
  40         signal do_it, finished : std_logic;
  41
  42         signal stop : boolean := false;
  43 begin
  44         -- history
  45         inst : entity work.history(beh)
  46         port map (
  47                 sys_clk => sys_clk,
  48                 sys_res_n => sys_res_n,
  49                 -- scanner
  50                 s_char => s_char,
  51                 s_take => s_take,
  52                 s_done => s_done,
  53                 s_backspace => s_backspace,
  54                 -- display
  55                 d_new_eingabe => d_new_eingabe,
  56                 d_new_result => d_new_result,
  57                 d_new_bs => d_new_bs,
  58                 d_zeile => d_zeile,
  59                 d_spalte => d_spalte,
  60                 d_get => d_get,
  61                 d_done => d_done,
  62                 d_char => d_char,
  63                 -- parser
  64                 p_rget => p_rget,
  65                 p_rdone => p_rdone,
  66                 p_read => p_read,
  67                 p_wtake => p_wtake,
  68                 p_wdone => p_wdone,
  69                 p_write => p_write,
  70                 p_finished => p_finished
  71         );
  72
  73         -- display
  74         inst_disp : entity work.display(beh)
  75         port map (
  76                 sys_clk => sys_clk,
  77                 sys_res_n => sys_res_n,
  78                 -- history
  79                 d_new_eingabe => d_new_eingabe,
  80                 d_new_result => d_new_result,
  81                 d_new_bs => d_new_bs,
  82                 d_zeile => d_zeile,
  83                 d_spalte => d_spalte,
  84                 d_get => d_get,
  85                 d_done => d_done,
  86                 d_char => d_char,
  87                 -- vga
  88                 command => command,
  89                 command_data => command_data,
  90                 free => free
  91         );
  92
  93         -- parser
  94         inst_parser : entity work.parser(beh)
  95         port map (
  96                 sys_clk => sys_clk,
  97                 sys_res_n => sys_res_n,
  98                 -- history
  99                 p_rget => p_rget,
 100                 p_rdone => p_rdone,
 101                 p_read => p_read,
 102                 p_wtake => p_wtake,
 103                 p_wdone => p_wdone,
 104                 p_write => p_write,
 105                 p_finished => p_finished,
 106                 -- scanner
 107                 do_it => do_it,
 108                 finished => finished
 109         );
 110
 111         -- scanner
 112         inst_scan : entity work.scanner(beh)
 113         port map (
 114                 sys_clk => sys_clk,
 115                 sys_res_n => sys_res_n,
 116                 -- ps/2
 117                 new_data => new_data,
 118                 data => data,
 119                 -- history
 120                 s_char => s_char,
 121                 s_take => s_take,
 122                 s_done => s_done,
 123                 s_backspace => s_backspace,
 124                 -- Parser
 125                 do_it => do_it,
 126                 finished => finished
 127         );
 128
 129
 130         process
 131         begin
 132                 sys_clk <= '0';
 133                 wait for 15 ns;
 134                 sys_clk <= '1';
 135                 wait for 15 ns;
 136                 if stop = true then
 137                         wait;
 138                 end if;
 139         end process;
 140
 141         process
 142         begin
 143                 free <= '0';
 144                 wait for 15 ns;
 145                 free <= '1';
 146                 wait for 30 ns;
 147                 if stop = true then
 148                         wait;
 149                 end if;
 150         end process;
 151
 152         process
 153                 function ascii2sc (x : hbyte) return hbyte is
 154                         variable y : hbyte;
 155                 begin
 156                         case x is
 157                                 when x"30" => y := SC_KP_0;
 158                                 when x"31" => y := SC_KP_1;
 159                                 when x"32" => y := SC_KP_2;
 160                                 when x"33" => y := SC_KP_3;
 161                                 when x"34" => y := SC_KP_4;
 162                                 when x"35" => y := SC_KP_5;
 163                                 when x"36" => y := SC_KP_6;
 164                                 when x"37" => y := SC_KP_7;
 165                                 when x"38" => y := SC_KP_8;
 166                                 when x"39" => y := SC_KP_9;
 167                                 when x"2b" => y := SC_KP_PLUS;
 168                                 when x"2d" => y := SC_KP_MINUS;
 169                                 when x"2a" => y := SC_KP_MUL;
 170                                 when x"2f" => y := SC_KP_DIV;
 171                                 when x"20" => y := SC_SPACE;
 172                                 when x"1c" => y := SC_ENTER;
 173                                 when x"0e" => y := SC_BKSP;
 174                                 when others => y := x"41";
 175                         end case;
 176                         return y;
 177                 end function;
 178
 179                 function valid_char (x : std_logic_vector(7 downto 0)) return boolean is
 180                                 variable y : boolean;
 181                 begin
 182                         case x is
 183                                 when SC_KP_0 | SC_KP_1 | SC_KP_2 | SC_KP_3 |
 184                                         SC_KP_4 | SC_KP_5 | SC_KP_6 | SC_KP_7 |
 185                                         SC_KP_8 | SC_KP_9 | SC_KP_PLUS |
 186                                         SC_KP_MINUS | SC_KP_MUL |
 187                                         SC_KP_DIV | SC_SPACE |
 188                                         SC_BKSP | SC_ENTER =>
 189                                                 y := true;
 190                                 when others => y := false;
 191                         end case;
 192                         return y;
 193                 end function;
 194
 195                 -- textio stuff
 196                 use std.textio.all;
 197                 file f : text open read_mode is "../../src/history.test";
 198                 variable l : line;
 199
 200                 variable input : string(1 to 100);
 201
 202                 variable run_tc, run_inner : boolean := true;
 203                 variable i, j, y : natural;
 204         begin
 205                 -- init & reset
 206                 sys_res_n <= '0';
 207                 new_data <= '0';
 208                 data <= (others => '0');
 209
 210                 icwait(sys_clk, 20);
 211                 sys_res_n <= '1';
 212
 213                 i := 1;
 214                 f_loop : while not endfile(f) loop
 215                         data <= (others => '0');
 216
 217                         f1_loop : while not endfile(f) loop
 218                                 readline (f, l);
 219                                 input := (others => nul);
 220                                 if (l'length <= 100) then
 221                                         input(1 to l'length) := l.all;
 222                                         if (input(1) = '#') then
 223                                                 next f1_loop;
 224                                         else
 225                                                 exit f1_loop;
 226                                         end if;
 227                                 else
 228                                         report "fehler in history.test: eingabe zu lange in testfall " & natural'image(i);
 229                                         next f_loop;
 230                                 end if;
 231                         end loop f1_loop;
 232
 233                         report "testcase(" & natural'image(i) & ").input: " & input;
 234                         i := i + 1;
 235
 236                         icwait(sys_clk, 5);
 237                         run_tc := true;
 238                         j := 0;
 239
 240                         mainl : while run_tc loop
 241                                 icwait(sys_clk, 10);
 242                                 j := j + 1;
 243
 244                                 if j = 101 then
 245                                         run_tc := false;
 246                                         assert(false) report "wtf @ schleife";
 247                                         next mainl;
 248                                 end if;
 249
 250                                 -- jedes mal release
 251                                 new_data <= '1';
 252                                 data <= x"f0";
 253                                 icwait(sys_clk, 1);
 254                                 new_data <= '0';
 255                                 icwait(sys_clk, 1);
 256                                 new_data <= '1';
 257
 258                                 case input(j) is
 259                                         when nul => data <= ascii2sc(x"1c"); -- $ (enter)
 260                                         when '!' => data <= ascii2sc(x"0e"); -- ! (backspace)
 261                                         when others => data <= ascii2sc(std_logic_vector(to_unsigned(character'pos(input(j)),8)));
 262                                 end case;
 263                                 icwait(sys_clk, 1);
 264                                 new_data <= '0';
 265
 266                                 -- ack'en skippen, falls es ein "spezielles" zeichen ist (steht
 267                                 -- in abhaengigkeit zum vorherigen zeichen)
 268                                 if(not valid_char(data)) then
 269                                         next mainl;
 270                                 end if;
 271
 272                                 -- wuenschswert waere das hier:
 273                                 -- > wait on s_backspace, s_take, do_it;
 274                                 -- geht aber leider nicht, weil sich die signale vllt schon
 275                                 -- geaendert haben
 276                                 run_inner := true;
 277                                 main_inner : while run_inner loop
 278                                         icwait(sys_clk, 1);
 279
 280                                         run_inner := false;
 281                                         if s_backspace = '1' or s_take = '1' then
 282                                                 icwait(sys_clk, 1);
 283                                                 s_done <= '1';
 284                                                 wait on s_take; -- = '0'
 285                                                 icwait(sys_clk, 1);
 286                                                 s_done <= '0';
 287                                         elsif do_it = '1' then
 288                                                 -- dauert normalweiser noch laenger (parser braucht
 289                                                 -- relativ lange)
 290                                                 icwait(sys_clk, 7);
 291                                                 finished <= '1';
 292                                                 wait on do_it; -- = '0'
 293                                                 icwait(sys_clk, 1);
 294                                                 finished <= '0';
 295                                                 icwait(sys_clk, 850);
 296
 297                                                 run_tc := false;
 298                                         else
 299                                                 -- assert(false) report "history_tb: kann passieren. wenn tb haengt, dann hier auskommentieren";
 300                                                 run_inner := true;
 301                                         end if;
 302                                 end loop;
 303                         end loop;
 304                         report "==================";
 305                 end loop f_loop;
 306
 307                 icwait(sys_clk, 850);
 308                 stop <= true;
 309                 wait;
 310         end process;
 311 end architecture sim;