added pc_communication and uart_tx to beh_history
[hwmod.git] / src / beh_history_tb.vhd
1 library ieee;
2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
4 use work.gen_pkg.all;
5 use work.textmode_vga_component_pkg.all;
6 use work.textmode_vga_pkg.all;
7 use work.textmode_vga_platform_dependent_pkg.all;
8
9 entity beh_history_tb is
10 end entity beh_history_tb;
11
12 architecture sim of beh_history_tb is
13         -- system
14         signal sys_clk, sys_res_n : std_logic;
15         -- history/display
16         signal d_new_eingabe, d_new_result, d_new_bs : std_logic;
17         signal d_zeile : hzeile;
18         signal d_spalte : hspalte;
19         signal d_get, d_done : std_logic;
20         signal d_char : hbyte;
21         -- history/scanner
22         signal s_char : hbyte;
23         signal s_take, s_done, s_backspace : std_logic;
24         -- ps/2
25         signal new_data : std_logic;
26         signal data : std_logic_vector(7 downto 0);
27         -- vga/display
28         signal free : std_logic;
29         signal command : std_logic_vector(COMMAND_SIZE - 1 downto 0);
30         signal command_data : std_logic_vector(3 * COLOR_SIZE + CHAR_SIZE -1 downto 0);
31         -- history/parser
32         signal p_rget : std_logic;
33         signal p_rdone : std_logic;
34         signal p_read : hbyte;
35         signal p_wtake : std_logic;
36         signal p_wdone : std_logic;
37         signal p_write : hbyte;
38         signal p_finished : std_logic;
39         -- parser/scanner
40         signal do_it, finished : std_logic;
41         --uart_tx
42         signal tx_data : std_logic_vector(7 downto 0);
43         signal tx_new, tx_done, txd : std_logic;
44         --pc_communication
45         signal pc_zeile : hzeile;
46         signal pc_spalte : hspalte;
47         signal pc_get, pc_done : std_logic;
48         signal pc_char : hbyte;
49         --dummy button
50         signal btn_a_int : std_logic;
51
52
53         signal stop : boolean := false;
54 begin
55         -- history
56         inst : entity work.history(beh)
57         port map (
58                 sys_clk => sys_clk,
59                 sys_res_n => sys_res_n,
60                 -- scanner
61                 s_char => s_char,
62                 s_take => s_take,
63                 s_done => s_done,
64                 s_backspace => s_backspace,
65                 -- display
66                 d_new_eingabe => d_new_eingabe,
67                 d_new_result => d_new_result,
68                 d_new_bs => d_new_bs,
69                 d_zeile => d_zeile,
70                 d_spalte => d_spalte,
71                 d_get => d_get,
72                 d_done => d_done,
73                 d_char => d_char,
74                 -- parser
75                 p_rget => p_rget,
76                 p_rdone => p_rdone,
77                 p_read => p_read,
78                 p_wtake => p_wtake,
79                 p_wdone => p_wdone,
80                 p_write => p_write,
81                 p_finished => p_finished,
82                 -- PC-komm
83                 pc_get    => pc_get,
84                 pc_spalte => pc_spalte,
85                 pc_zeile  => pc_zeile,
86                 pc_char   => pc_char,
87                 pc_done   => pc_done
88         );
89
90         -- display
91         inst_disp : entity work.display(beh)
92         port map (
93                 sys_clk => sys_clk,
94                 sys_res_n => sys_res_n,
95                 -- history
96                 d_new_eingabe => d_new_eingabe,
97                 d_new_result => d_new_result,
98                 d_new_bs => d_new_bs,
99                 d_zeile => d_zeile,
100                 d_spalte => d_spalte,
101                 d_get => d_get,
102                 d_done => d_done,
103                 d_char => d_char,
104                 -- vga
105                 command => command,
106                 command_data => command_data,
107                 free => free
108         );
109
110         -- parser
111         inst_parser : entity work.parser(beh)
112         port map (
113                 sys_clk => sys_clk,
114                 sys_res_n => sys_res_n,
115                 -- history
116                 p_rget => p_rget,
117                 p_rdone => p_rdone,
118                 p_read => p_read,
119                 p_wtake => p_wtake,
120                 p_wdone => p_wdone,
121                 p_write => p_write,
122                 p_finished => p_finished,
123                 -- scanner
124                 do_it => do_it,
125                 finished => finished
126         );
127
128         -- scanner
129         inst_scan : entity work.scanner(beh)
130         port map (
131                 sys_clk => sys_clk,
132                 sys_res_n => sys_res_n,
133                 -- ps/2
134                 new_data => new_data,
135                 data => data,
136                 -- history
137                 s_char => s_char,
138                 s_take => s_take,
139                 s_done => s_done,
140                 s_backspace => s_backspace,
141                 -- Parser
142                 do_it => do_it,
143                 finished => finished
144         );
145         --uart_tx
146         inst_uart : entity work.uart_tx(beh)
147         port map (
148                 sys_clk => sys_clk,
149                 sys_res_n => sys_res_n,
150                 txd => txd,
151                 tx_data =>tx_data,
152                 tx_new => tx_new,
153                 tx_done => tx_done
154         );
155
156         --pc_communication
157         inst_pc_com : entity work.pc_communication(beh)
158         port map(
159                 sys_clk => sys_clk,
160                 sys_res_n => sys_res_n,
161                 --button
162                 btn_a => btn_a_int,
163                 --uart_tx
164                 tx_data => tx_data,
165                 tx_new => tx_new,
166                 tx_done => tx_done,
167                 --uart_rx
168                 rx_data => (others => '0'),
169                 rx_new => '0',
170                 -- History
171                  d_zeile  => pc_zeile,
172                  d_spalte => pc_spalte,
173                  d_get    => pc_get,
174                  d_done   => pc_done,
175                  d_char   => pc_char
176         );
177
178         process
179         begin
180                 sys_clk <= '0';
181                 wait for 15 ns;
182                 sys_clk <= '1';
183                 wait for 15 ns;
184                 if stop = true then
185                         wait;
186                 end if;
187         end process;
188
189         process
190         begin
191                 free <= '0';
192                 wait for 15 ns;
193                 free <= '1';
194                 wait for 30 ns;
195                 if stop = true then
196                         wait;
197                 end if;
198         end process;
199
200         process
201                 -- textio stuff
202                 use std.textio.all;
203                 file f : text open read_mode is "../../src/history.test";
204                 variable l : line;
205
206                 variable input : string(1 to 100);
207
208                 variable run_tc, run_inner : boolean := true;
209                 variable i, j, y : natural;
210         begin
211                 -- init & reset
212                 sys_res_n <= '0';
213                 new_data <= '0';
214                 data <= (others => '0');
215
216                 icwait(sys_clk, 20);
217                 sys_res_n <= '1';
218
219                 i := 1;
220                 f_loop : while not endfile(f) loop
221                         data <= (others => '0');
222
223                         f1_loop : while not endfile(f) loop
224                                 readline (f, l);
225                                 input := (others => nul);
226                                 if (l'length <= 100) then
227                                         input(1 to l'length) := l.all;
228                                         if (input(1) = '#') then
229                                                 next f1_loop;
230                                         else
231                                                 exit f1_loop;
232                                         end if;
233                                 else
234                                         report "fehler in history.test: eingabe zu lange in testfall " & natural'image(i);
235                                         next f_loop;
236                                 end if;
237                         end loop f1_loop;
238
239                         report "testcase(" & natural'image(i) & ").input: " & input;
240                         i := i + 1;
241
242                         icwait(sys_clk, 5);
243                         run_tc := true;
244                         j := 0;
245
246                         mainl : while run_tc loop
247                                 icwait(sys_clk, 10);
248                                 j := j + 1;
249
250                                 if j = 101 then
251                                         run_tc := false;
252                                         assert(false) report "wtf @ schleife";
253                                         next mainl;
254                                 end if;
255
256                                 new_data <= '1';
257
258                                 case input(j) is
259                                         when nul => data <= ascii2sc(x"1c"); -- $ (enter)
260                                         when '!' => data <= ascii2sc(x"0e"); -- ! (backspace)
261                                         when '/' =>
262                                                 data <= x"e0";
263                                                 icwait(sys_clk, 1);
264                                                 new_data <= '0';
265                                                 icwait(sys_clk, 1);
266                                                 new_data <= '1';
267                                                 data <= SC_KP_DIV;
268                                         when others => data <= ascii2sc(std_logic_vector(to_unsigned(character'pos(input(j)),8)));
269                                 end case;
270
271                                 -- ack'en skippen, falls es ein "spezielles" zeichen ist (steht
272                                 -- in abhaengigkeit zum vorherigen zeichen)
273                                 if(not valid_char(data)) then
274                                         next mainl;
275                                 end if;
276
277                                 -- wuenschswert waere das hier:
278                                 -- > wait on s_backspace, s_take, do_it;
279                                 -- geht aber leider nicht, weil sich die signale vllt schon
280                                 -- geaendert haben
281                                 run_inner := true;
282                                 main_inner : while run_inner loop
283                                         icwait(sys_clk, 1);
284
285                                         run_inner := false;
286                                         if s_backspace = '1' or s_take = '1' then
287                                                 icwait(sys_clk, 1);
288                                                 wait on s_take; -- = '0'
289                                                 icwait(sys_clk, 1);
290                                         elsif do_it = '1' then
291                                                 -- dauert normalweiser noch laenger (parser braucht
292                                                 -- relativ lange)
293                                                 icwait(sys_clk, 7);
294                                                 wait on do_it; -- = '0'
295                                                 icwait(sys_clk, 850);
296
297                                                 run_tc := false;
298                                         else
299                                                 -- assert(false) report "history_tb: kann passieren. wenn tb haengt, dann hier auskommentieren";
300                                                 run_inner := true;
301                                         end if;
302                                 end loop;
303                         end loop;
304                         report "==================";
305                 end loop f_loop;
306
307                 icwait(sys_clk, 850);
308                 stop <= true;
309                 wait;
310         end process;
311
312         btn_pressed : process is
313         begin
314                 btn_a_int <= '0';
315                 wait until sys_res_n = '1';
316                 wait for 50000 * 15 ns;
317                 wait until rising_edge(sys_clk);
318                 btn_a_int <= '1';
319                 wait for 30 ns;
320                 btn_a_int <= '0';
321                 wait;
322         end process btn_pressed;
323 end architecture sim;