1 Classic Timing Analyzer report for demo
2 Mon Mar 30 19:53:32 2009
3 Quartus II Version 7.0 Build 33 02/05/2007 SJ Full Version
10 2. Timing Analyzer Summary
11 3. Timing Analyzer Settings
12 4. Clock Settings Summary
13 5. Clock Setup: 'pll:inst1|altpll:altpll_component|_clk0'
14 6. Clock Hold: 'pll:inst1|altpll:altpll_component|_clk0'
18 10. Timing Analyzer Messages
25 Copyright (C) 1991-2007 Altera Corporation
26 Your use of Altera Corporation's design tools, logic functions
27 and other software and tools, and its AMPP partner logic
28 functions, and any output files from any of the foregoing
29 (including device programming or simulation files), and any
30 associated documentation or information are expressly subject
31 to the terms and conditions of the Altera Program License
32 Subscription Agreement, Altera MegaCore Function License
33 Agreement, or other applicable license agreement, including,
34 without limitation, that your use is for the sole purpose of
35 programming logic devices manufactured by Altera and sold by
36 Altera or its authorized distributors. Please refer to the
37 applicable agreement for further details.
41 +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
42 ; Timing Analyzer Summary ;
43 +--------------------------------------------------------+----------+-----------------------------------+----------------------------------+--------------------------+--------------------------+-----------------------------------------+-----------------------------------------+--------------+
44 ; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
45 +--------------------------------------------------------+----------+-----------------------------------+----------------------------------+--------------------------+--------------------------+-----------------------------------------+-----------------------------------------+--------------+
46 ; Worst-case tsu ; N/A ; None ; 7.774 ns ; RESET ; demo:inst|knightlight[5] ; -- ; CLK ; 0 ;
47 ; Worst-case tco ; N/A ; None ; 9.507 ns ; demo:inst|knightlight[0] ; LEDS[0] ; CLK ; -- ; 0 ;
48 ; Worst-case th ; N/A ; None ; -7.313 ns ; RESET ; demo:inst|counter[2] ; -- ; CLK ; 0 ;
49 ; Clock Setup: 'pll:inst1|altpll:altpll_component|_clk0' ; 3.604 ns ; 100.00 MHz ( period = 10.000 ns ) ; 156.35 MHz ( period = 6.396 ns ) ; demo:inst|counter[3] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0 ;
50 ; Clock Hold: 'pll:inst1|altpll:altpll_component|_clk0' ; 0.391 ns ; 100.00 MHz ( period = 10.000 ns ) ; N/A ; demo:inst|knightlight[5] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0 ;
51 ; Total number of failed paths ; ; ; ; ; ; ; ; 0 ;
52 +--------------------------------------------------------+----------+-----------------------------------+----------------------------------+--------------------------+--------------------------+-----------------------------------------+-----------------------------------------+--------------+
55 +------------------------------------------------------------------------------------------------------+
56 ; Timing Analyzer Settings ;
57 +-------------------------------------------------------+--------------------+------+----+-------------+
58 ; Option ; Setting ; From ; To ; Entity Name ;
59 +-------------------------------------------------------+--------------------+------+----+-------------+
60 ; Device Name ; EP2C35F484C6 ; ; ; ;
61 ; Timing Models ; Final ; ; ; ;
62 ; Default hold multicycle ; Same as Multicycle ; ; ; ;
63 ; Cut paths between unrelated clock domains ; On ; ; ; ;
64 ; Cut off read during write signal paths ; On ; ; ; ;
65 ; Cut off feedback from I/O pins ; On ; ; ; ;
66 ; Report Combined Fast/Slow Timing ; Off ; ; ; ;
67 ; Ignore Clock Settings ; Off ; ; ; ;
68 ; Analyze latches as synchronous elements ; On ; ; ; ;
69 ; Enable Recovery/Removal analysis ; Off ; ; ; ;
70 ; Enable Clock Latency ; Off ; ; ; ;
71 ; Number of source nodes to report per destination node ; 10 ; ; ; ;
72 ; Number of destination nodes to report ; 10 ; ; ; ;
73 ; Number of paths to report ; 200 ; ; ; ;
74 ; Report Minimum Timing Checks ; Off ; ; ; ;
75 ; Use Fast Timing Models ; Off ; ; ; ;
76 ; Report IO Paths Separately ; Off ; ; ; ;
77 +-------------------------------------------------------+--------------------+------+----+-------------+
80 +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
81 ; Clock Settings Summary ;
82 +-----------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
83 ; Clock Node Name ; Clock Setting Name ; Type ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
84 +-----------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
85 ; pll:inst1|altpll:altpll_component|_clk0 ; ; PLL output ; 100.0 MHz ; 0.000 ns ; 0.000 ns ; CLK ; 4 ; 1 ; -2.378 ns ; ;
86 ; CLK ; ; User Pin ; 25.0 MHz ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
87 +-----------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
90 +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
91 ; Clock Setup: 'pll:inst1|altpll:altpll_component|_clk0' ;
92 +----------+---------------------------------------------+--------------------------+--------------------------+-----------------------------------------+-----------------------------------------+-----------------------------+---------------------------+-------------------------+
93 ; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
94 +----------+---------------------------------------------+--------------------------+--------------------------+-----------------------------------------+-----------------------------------------+-----------------------------+---------------------------+-------------------------+
95 ; 3.604 ns ; 156.35 MHz ( period = 6.396 ns ) ; demo:inst|counter[3] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.182 ns ;
96 ; 3.606 ns ; 156.40 MHz ( period = 6.394 ns ) ; demo:inst|counter[3] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.180 ns ;
97 ; 3.607 ns ; 156.42 MHz ( period = 6.393 ns ) ; demo:inst|counter[3] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.179 ns ;
98 ; 3.608 ns ; 156.45 MHz ( period = 6.392 ns ) ; demo:inst|counter[0] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.178 ns ;
99 ; 3.610 ns ; 156.49 MHz ( period = 6.390 ns ) ; demo:inst|counter[0] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.176 ns ;
100 ; 3.611 ns ; 156.52 MHz ( period = 6.389 ns ) ; demo:inst|counter[0] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.175 ns ;
101 ; 3.725 ns ; 159.36 MHz ( period = 6.275 ns ) ; demo:inst|counter[4] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.061 ns ;
102 ; 3.727 ns ; 159.41 MHz ( period = 6.273 ns ) ; demo:inst|counter[4] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.059 ns ;
103 ; 3.728 ns ; 159.44 MHz ( period = 6.272 ns ) ; demo:inst|counter[4] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.058 ns ;
104 ; 3.753 ns ; 160.08 MHz ( period = 6.247 ns ) ; demo:inst|counter[5] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.033 ns ;
105 ; 3.755 ns ; 160.13 MHz ( period = 6.245 ns ) ; demo:inst|counter[5] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.031 ns ;
106 ; 3.756 ns ; 160.15 MHz ( period = 6.244 ns ) ; demo:inst|counter[5] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 6.030 ns ;
107 ; 3.809 ns ; 161.52 MHz ( period = 6.191 ns ) ; demo:inst|counter[1] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.977 ns ;
108 ; 3.811 ns ; 161.58 MHz ( period = 6.189 ns ) ; demo:inst|counter[1] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.975 ns ;
109 ; 3.812 ns ; 161.60 MHz ( period = 6.188 ns ) ; demo:inst|counter[1] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.974 ns ;
110 ; 3.863 ns ; 162.95 MHz ( period = 6.137 ns ) ; demo:inst|counter[6] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.923 ns ;
111 ; 3.865 ns ; 163.00 MHz ( period = 6.135 ns ) ; demo:inst|counter[6] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.921 ns ;
112 ; 3.866 ns ; 163.03 MHz ( period = 6.134 ns ) ; demo:inst|counter[6] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.920 ns ;
113 ; 3.903 ns ; 164.02 MHz ( period = 6.097 ns ) ; demo:inst|counter[3] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.883 ns ;
114 ; 3.907 ns ; 164.12 MHz ( period = 6.093 ns ) ; demo:inst|counter[0] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.879 ns ;
115 ; 3.979 ns ; 166.09 MHz ( period = 6.021 ns ) ; demo:inst|counter[2] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.807 ns ;
116 ; 3.981 ns ; 166.14 MHz ( period = 6.019 ns ) ; demo:inst|counter[2] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.805 ns ;
117 ; 3.982 ns ; 166.17 MHz ( period = 6.018 ns ) ; demo:inst|counter[2] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.804 ns ;
118 ; 4.012 ns ; 167.00 MHz ( period = 5.988 ns ) ; demo:inst|counter[3] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.774 ns ;
119 ; 4.013 ns ; 167.03 MHz ( period = 5.987 ns ) ; demo:inst|counter[3] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.773 ns ;
120 ; 4.015 ns ; 167.08 MHz ( period = 5.985 ns ) ; demo:inst|counter[3] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.771 ns ;
121 ; 4.016 ns ; 167.11 MHz ( period = 5.984 ns ) ; demo:inst|counter[0] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.770 ns ;
122 ; 4.017 ns ; 167.14 MHz ( period = 5.983 ns ) ; demo:inst|counter[0] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.769 ns ;
123 ; 4.019 ns ; 167.20 MHz ( period = 5.981 ns ) ; demo:inst|counter[0] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.767 ns ;
124 ; 4.024 ns ; 167.34 MHz ( period = 5.976 ns ) ; demo:inst|counter[4] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.762 ns ;
125 ; 4.052 ns ; 168.12 MHz ( period = 5.948 ns ) ; demo:inst|counter[5] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.734 ns ;
126 ; 4.108 ns ; 169.72 MHz ( period = 5.892 ns ) ; demo:inst|counter[1] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.678 ns ;
127 ; 4.133 ns ; 170.44 MHz ( period = 5.867 ns ) ; demo:inst|counter[4] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.653 ns ;
128 ; 4.134 ns ; 170.47 MHz ( period = 5.866 ns ) ; demo:inst|counter[4] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.652 ns ;
129 ; 4.136 ns ; 170.53 MHz ( period = 5.864 ns ) ; demo:inst|counter[4] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.650 ns ;
130 ; 4.161 ns ; 171.26 MHz ( period = 5.839 ns ) ; demo:inst|counter[5] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.625 ns ;
131 ; 4.162 ns ; 171.29 MHz ( period = 5.838 ns ) ; demo:inst|counter[5] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.624 ns ;
132 ; 4.162 ns ; 171.29 MHz ( period = 5.838 ns ) ; demo:inst|counter[6] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.624 ns ;
133 ; 4.164 ns ; 171.35 MHz ( period = 5.836 ns ) ; demo:inst|counter[5] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.622 ns ;
134 ; 4.217 ns ; 172.92 MHz ( period = 5.783 ns ) ; demo:inst|counter[1] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.569 ns ;
135 ; 4.218 ns ; 172.95 MHz ( period = 5.782 ns ) ; demo:inst|counter[1] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.568 ns ;
136 ; 4.220 ns ; 173.01 MHz ( period = 5.780 ns ) ; demo:inst|counter[1] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.566 ns ;
137 ; 4.271 ns ; 174.55 MHz ( period = 5.729 ns ) ; demo:inst|counter[6] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.515 ns ;
138 ; 4.272 ns ; 174.58 MHz ( period = 5.728 ns ) ; demo:inst|counter[6] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.514 ns ;
139 ; 4.274 ns ; 174.64 MHz ( period = 5.726 ns ) ; demo:inst|counter[6] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.512 ns ;
140 ; 4.278 ns ; 174.76 MHz ( period = 5.722 ns ) ; demo:inst|counter[2] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.508 ns ;
141 ; 4.387 ns ; 178.16 MHz ( period = 5.613 ns ) ; demo:inst|counter[2] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.399 ns ;
142 ; 4.388 ns ; 178.19 MHz ( period = 5.612 ns ) ; demo:inst|counter[2] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.398 ns ;
143 ; 4.390 ns ; 178.25 MHz ( period = 5.610 ns ) ; demo:inst|counter[2] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 5.396 ns ;
144 ; 4.740 ns ; 190.11 MHz ( period = 5.260 ns ) ; demo:inst|counter[4] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 4.998 ns ;
145 ; 4.959 ns ; 198.37 MHz ( period = 5.041 ns ) ; demo:inst|counter[3] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 4.779 ns ;
146 ; 5.075 ns ; 203.05 MHz ( period = 4.925 ns ) ; demo:inst|counter[6] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 4.663 ns ;
147 ; 5.098 ns ; 204.00 MHz ( period = 4.902 ns ) ; demo:inst|knightlight[3] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 4.688 ns ;
148 ; 5.177 ns ; 207.34 MHz ( period = 4.823 ns ) ; demo:inst|counter[0] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 4.561 ns ;
149 ; 5.337 ns ; 214.45 MHz ( period = 4.663 ns ) ; demo:inst|counter[1] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 4.401 ns ;
150 ; 5.484 ns ; 221.43 MHz ( period = 4.516 ns ) ; demo:inst|counter[2] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 4.254 ns ;
151 ; 5.491 ns ; 221.78 MHz ( period = 4.509 ns ) ; demo:inst|counter[5] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 4.247 ns ;
152 ; 5.761 ns ; 235.90 MHz ( period = 4.239 ns ) ; demo:inst|counter[4] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.977 ns ;
153 ; 5.763 ns ; 236.02 MHz ( period = 4.237 ns ) ; demo:inst|counter[4] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.975 ns ;
154 ; 5.764 ns ; 236.07 MHz ( period = 4.236 ns ) ; demo:inst|counter[4] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.974 ns ;
155 ; 5.980 ns ; 248.76 MHz ( period = 4.020 ns ) ; demo:inst|counter[3] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.758 ns ;
156 ; 5.982 ns ; 248.88 MHz ( period = 4.018 ns ) ; demo:inst|counter[3] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.756 ns ;
157 ; 5.983 ns ; 248.94 MHz ( period = 4.017 ns ) ; demo:inst|counter[3] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.755 ns ;
158 ; 6.008 ns ; 250.50 MHz ( period = 3.992 ns ) ; demo:inst|counter[4] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.730 ns ;
159 ; 6.009 ns ; 250.56 MHz ( period = 3.991 ns ) ; demo:inst|counter[4] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.729 ns ;
160 ; 6.039 ns ; 252.46 MHz ( period = 3.961 ns ) ; demo:inst|knightlight[2] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.740 ns ; 3.701 ns ;
161 ; 6.096 ns ; 256.15 MHz ( period = 3.904 ns ) ; demo:inst|counter[6] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.642 ns ;
162 ; 6.098 ns ; 256.28 MHz ( period = 3.902 ns ) ; demo:inst|counter[6] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.640 ns ;
163 ; 6.099 ns ; 256.34 MHz ( period = 3.901 ns ) ; demo:inst|counter[6] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.639 ns ;
164 ; 6.198 ns ; 263.02 MHz ( period = 3.802 ns ) ; demo:inst|counter[0] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.540 ns ;
165 ; 6.200 ns ; 263.16 MHz ( period = 3.800 ns ) ; demo:inst|counter[0] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.538 ns ;
166 ; 6.201 ns ; 263.23 MHz ( period = 3.799 ns ) ; demo:inst|counter[0] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.537 ns ;
167 ; 6.227 ns ; 265.04 MHz ( period = 3.773 ns ) ; demo:inst|counter[3] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.511 ns ;
168 ; 6.228 ns ; 265.11 MHz ( period = 3.772 ns ) ; demo:inst|counter[3] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.510 ns ;
169 ; 6.343 ns ; 273.45 MHz ( period = 3.657 ns ) ; demo:inst|counter[6] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.395 ns ;
170 ; 6.344 ns ; 273.52 MHz ( period = 3.656 ns ) ; demo:inst|counter[6] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.394 ns ;
171 ; 6.358 ns ; 274.57 MHz ( period = 3.642 ns ) ; demo:inst|counter[1] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.380 ns ;
172 ; 6.360 ns ; 274.73 MHz ( period = 3.640 ns ) ; demo:inst|counter[1] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.378 ns ;
173 ; 6.361 ns ; 274.80 MHz ( period = 3.639 ns ) ; demo:inst|counter[1] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.377 ns ;
174 ; 6.445 ns ; 281.29 MHz ( period = 3.555 ns ) ; demo:inst|counter[0] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.293 ns ;
175 ; 6.446 ns ; 281.37 MHz ( period = 3.554 ns ) ; demo:inst|counter[0] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.292 ns ;
176 ; 6.505 ns ; 286.12 MHz ( period = 3.495 ns ) ; demo:inst|counter[2] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.233 ns ;
177 ; 6.507 ns ; 286.29 MHz ( period = 3.493 ns ) ; demo:inst|counter[2] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.231 ns ;
178 ; 6.508 ns ; 286.37 MHz ( period = 3.492 ns ) ; demo:inst|counter[2] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.230 ns ;
179 ; 6.512 ns ; 286.70 MHz ( period = 3.488 ns ) ; demo:inst|counter[5] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.226 ns ;
180 ; 6.514 ns ; 286.86 MHz ( period = 3.486 ns ) ; demo:inst|counter[5] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.224 ns ;
181 ; 6.515 ns ; 286.94 MHz ( period = 3.485 ns ) ; demo:inst|counter[5] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.223 ns ;
182 ; 6.531 ns ; 288.27 MHz ( period = 3.469 ns ) ; demo:inst|knightlight[3] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.832 ns ; 3.301 ns ;
183 ; 6.605 ns ; 294.55 MHz ( period = 3.395 ns ) ; demo:inst|counter[1] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.133 ns ;
184 ; 6.606 ns ; 294.64 MHz ( period = 3.394 ns ) ; demo:inst|counter[1] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 3.132 ns ;
185 ; 6.686 ns ; 301.75 MHz ( period = 3.314 ns ) ; demo:inst|knightlight[2] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.740 ns ; 3.054 ns ;
186 ; 6.717 ns ; 304.60 MHz ( period = 3.283 ns ) ; demo:inst|knightlight[1] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.740 ns ; 3.023 ns ;
187 ; 6.752 ns ; 307.88 MHz ( period = 3.248 ns ) ; demo:inst|counter[2] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 2.986 ns ;
188 ; 6.753 ns ; 307.98 MHz ( period = 3.247 ns ) ; demo:inst|counter[2] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 2.985 ns ;
189 ; 6.759 ns ; 308.55 MHz ( period = 3.241 ns ) ; demo:inst|counter[5] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 2.979 ns ;
190 ; 6.760 ns ; 308.64 MHz ( period = 3.240 ns ) ; demo:inst|counter[5] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.738 ns ; 2.978 ns ;
191 ; 6.849 ns ; 317.36 MHz ( period = 3.151 ns ) ; demo:inst|ledstate ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.832 ns ; 2.983 ns ;
192 ; 6.862 ns ; 318.67 MHz ( period = 3.138 ns ) ; demo:inst|knightlight[0] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.740 ns ; 2.878 ns ;
193 ; 6.863 ns ; 318.78 MHz ( period = 3.137 ns ) ; demo:inst|ledstate ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.832 ns ; 2.969 ns ;
194 ; 7.127 ns ; 348.07 MHz ( period = 2.873 ns ) ; demo:inst|ledstate ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.832 ns ; 2.705 ns ;
195 ; 7.239 ns ; 362.19 MHz ( period = 2.761 ns ) ; demo:inst|counter[4] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.545 ns ;
196 ; 7.242 ns ; 362.58 MHz ( period = 2.758 ns ) ; demo:inst|counter[4] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.542 ns ;
197 ; 7.246 ns ; 363.11 MHz ( period = 2.754 ns ) ; demo:inst|counter[4] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.538 ns ;
198 ; 7.458 ns ; 393.39 MHz ( period = 2.542 ns ) ; demo:inst|counter[3] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.326 ns ;
199 ; 7.461 ns ; 393.86 MHz ( period = 2.539 ns ) ; demo:inst|counter[3] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.323 ns ;
200 ; 7.465 ns ; 394.48 MHz ( period = 2.535 ns ) ; demo:inst|counter[3] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.319 ns ;
201 ; 7.574 ns ; 412.20 MHz ( period = 2.426 ns ) ; demo:inst|counter[6] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.210 ns ;
202 ; 7.577 ns ; 412.71 MHz ( period = 2.423 ns ) ; demo:inst|counter[6] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.207 ns ;
203 ; 7.581 ns ; 413.39 MHz ( period = 2.419 ns ) ; demo:inst|counter[6] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.203 ns ;
204 ; 7.676 ns ; 430.29 MHz ( period = 2.324 ns ) ; demo:inst|counter[0] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.108 ns ;
205 ; 7.679 ns ; 430.85 MHz ( period = 2.321 ns ) ; demo:inst|counter[0] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.105 ns ;
206 ; 7.683 ns ; 431.59 MHz ( period = 2.317 ns ) ; demo:inst|counter[0] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 2.101 ns ;
207 ; 7.836 ns ; 462.11 MHz ( period = 2.164 ns ) ; demo:inst|counter[1] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 1.948 ns ;
208 ; 7.839 ns ; 462.75 MHz ( period = 2.161 ns ) ; demo:inst|counter[1] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 1.945 ns ;
209 ; 7.843 ns ; 463.61 MHz ( period = 2.157 ns ) ; demo:inst|counter[1] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 1.941 ns ;
210 ; 7.983 ns ; 495.79 MHz ( period = 2.017 ns ) ; demo:inst|counter[2] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 1.801 ns ;
211 ; 7.986 ns ; 496.52 MHz ( period = 2.014 ns ) ; demo:inst|counter[2] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 1.798 ns ;
212 ; 7.990 ns ; 497.51 MHz ( period = 2.010 ns ) ; demo:inst|counter[2] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 1.794 ns ;
213 ; 7.990 ns ; 497.51 MHz ( period = 2.010 ns ) ; demo:inst|counter[5] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 1.794 ns ;
214 ; 7.993 ns ; 498.26 MHz ( period = 2.007 ns ) ; demo:inst|counter[5] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 1.791 ns ;
215 ; 7.997 ns ; 499.25 MHz ( period = 2.003 ns ) ; demo:inst|counter[5] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.784 ns ; 1.787 ns ;
216 ; 8.036 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[6] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.750 ns ;
217 ; 8.158 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[5] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.628 ns ;
218 ; 8.171 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|ledstate ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.615 ns ;
219 ; 8.227 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|ledstate ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.559 ns ;
220 ; 8.233 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[4] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.553 ns ;
221 ; 8.360 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[7] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.426 ns ;
222 ; 8.391 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[3] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.395 ns ;
223 ; 8.536 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[1] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.250 ns ;
224 ; 8.539 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[5] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.247 ns ;
225 ; 8.544 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[5] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.242 ns ;
226 ; 8.556 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[6] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.230 ns ;
227 ; 8.572 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[2] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.214 ns ;
228 ; 8.651 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|ledstate ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.135 ns ;
229 ; 8.654 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|ledstate ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.132 ns ;
230 ; 8.661 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|ledstate ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.125 ns ;
231 ; 8.670 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[7] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 1.116 ns ;
232 ; 8.804 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[4] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.982 ns ;
233 ; 8.818 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[4] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.968 ns ;
234 ; 8.832 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[0] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.954 ns ;
235 ; 8.878 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|ledstate ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.908 ns ;
236 ; 8.953 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[6] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.833 ns ;
237 ; 9.038 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[1] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.748 ns ;
238 ; 9.379 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[5] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.407 ns ;
239 ; 9.379 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[3] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.407 ns ;
240 ; 9.379 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[0] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.407 ns ;
241 ; 9.379 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[1] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.407 ns ;
242 ; 9.379 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[2] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.407 ns ;
243 ; 9.379 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[4] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.407 ns ;
244 ; 9.379 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[6] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.407 ns ;
245 ; 9.379 ns ; Restricted to 500.0 MHz ( period = 2.0 ns ) ; demo:inst|knightlight[7] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 10.000 ns ; 9.786 ns ; 0.407 ns ;
246 +----------+---------------------------------------------+--------------------------+--------------------------+-----------------------------------------+-----------------------------------------+-----------------------------+---------------------------+-------------------------+
249 +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
250 ; Clock Hold: 'pll:inst1|altpll:altpll_component|_clk0' ;
251 +---------------+--------------------------+--------------------------+-----------------------------------------+-----------------------------------------+----------------------------+----------------------------+--------------------------+
252 ; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
253 +---------------+--------------------------+--------------------------+-----------------------------------------+-----------------------------------------+----------------------------+----------------------------+--------------------------+
254 ; 0.391 ns ; demo:inst|knightlight[5] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.407 ns ;
255 ; 0.391 ns ; demo:inst|knightlight[3] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.407 ns ;
256 ; 0.391 ns ; demo:inst|knightlight[0] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.407 ns ;
257 ; 0.391 ns ; demo:inst|knightlight[1] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.407 ns ;
258 ; 0.391 ns ; demo:inst|knightlight[2] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.407 ns ;
259 ; 0.391 ns ; demo:inst|knightlight[4] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.407 ns ;
260 ; 0.391 ns ; demo:inst|counter[0] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.407 ns ;
261 ; 0.391 ns ; demo:inst|knightlight[6] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.407 ns ;
262 ; 0.391 ns ; demo:inst|ledstate ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.407 ns ;
263 ; 0.391 ns ; demo:inst|knightlight[7] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.407 ns ;
264 ; 0.732 ns ; demo:inst|knightlight[1] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.748 ns ;
265 ; 0.817 ns ; demo:inst|knightlight[6] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.833 ns ;
266 ; 0.892 ns ; demo:inst|ledstate ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.908 ns ;
267 ; 0.938 ns ; demo:inst|knightlight[0] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.954 ns ;
268 ; 0.952 ns ; demo:inst|knightlight[4] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.968 ns ;
269 ; 0.966 ns ; demo:inst|knightlight[4] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 0.982 ns ;
270 ; 1.100 ns ; demo:inst|knightlight[7] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.116 ns ;
271 ; 1.109 ns ; demo:inst|ledstate ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.125 ns ;
272 ; 1.116 ns ; demo:inst|ledstate ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.132 ns ;
273 ; 1.119 ns ; demo:inst|ledstate ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.135 ns ;
274 ; 1.198 ns ; demo:inst|knightlight[2] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.214 ns ;
275 ; 1.214 ns ; demo:inst|knightlight[6] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.230 ns ;
276 ; 1.226 ns ; demo:inst|knightlight[5] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.242 ns ;
277 ; 1.231 ns ; demo:inst|knightlight[5] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.247 ns ;
278 ; 1.234 ns ; demo:inst|knightlight[1] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.250 ns ;
279 ; 1.337 ns ; demo:inst|counter[1] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.353 ns ;
280 ; 1.379 ns ; demo:inst|knightlight[3] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.395 ns ;
281 ; 1.410 ns ; demo:inst|knightlight[7] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.426 ns ;
282 ; 1.518 ns ; demo:inst|counter[2] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.534 ns ;
283 ; 1.536 ns ; demo:inst|counter[0] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.552 ns ;
284 ; 1.537 ns ; demo:inst|knightlight[4] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.553 ns ;
285 ; 1.543 ns ; demo:inst|ledstate ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.559 ns ;
286 ; 1.612 ns ; demo:inst|knightlight[5] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.628 ns ;
287 ; 1.734 ns ; demo:inst|knightlight[6] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.750 ns ;
288 ; 1.773 ns ; demo:inst|counter[5] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 1.787 ns ;
289 ; 1.777 ns ; demo:inst|counter[5] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 1.791 ns ;
290 ; 1.780 ns ; demo:inst|counter[2] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 1.794 ns ;
291 ; 1.780 ns ; demo:inst|counter[5] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 1.794 ns ;
292 ; 1.784 ns ; demo:inst|counter[2] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 1.798 ns ;
293 ; 1.787 ns ; demo:inst|counter[2] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 1.801 ns ;
294 ; 1.927 ns ; demo:inst|counter[1] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 1.941 ns ;
295 ; 1.931 ns ; demo:inst|counter[1] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 1.945 ns ;
296 ; 1.934 ns ; demo:inst|counter[1] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 1.948 ns ;
297 ; 1.967 ns ; demo:inst|knightlight[3] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 1.983 ns ;
298 ; 2.000 ns ; demo:inst|counter[1] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 2.016 ns ;
299 ; 2.087 ns ; demo:inst|counter[0] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.101 ns ;
300 ; 2.091 ns ; demo:inst|counter[0] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.105 ns ;
301 ; 2.094 ns ; demo:inst|counter[0] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.108 ns ;
302 ; 2.189 ns ; demo:inst|counter[6] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.203 ns ;
303 ; 2.193 ns ; demo:inst|counter[6] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.207 ns ;
304 ; 2.196 ns ; demo:inst|counter[6] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.210 ns ;
305 ; 2.201 ns ; demo:inst|counter[0] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 2.217 ns ;
306 ; 2.305 ns ; demo:inst|counter[3] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.319 ns ;
307 ; 2.309 ns ; demo:inst|counter[3] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.323 ns ;
308 ; 2.312 ns ; demo:inst|counter[3] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.326 ns ;
309 ; 2.524 ns ; demo:inst|counter[4] ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.538 ns ;
310 ; 2.528 ns ; demo:inst|counter[4] ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.542 ns ;
311 ; 2.531 ns ; demo:inst|counter[4] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.014 ns ; 2.545 ns ;
312 ; 2.643 ns ; demo:inst|ledstate ; demo:inst|knightlight[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.062 ns ; 2.705 ns ;
313 ; 2.790 ns ; demo:inst|counter[6] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 2.806 ns ;
314 ; 2.907 ns ; demo:inst|ledstate ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.062 ns ; 2.969 ns ;
315 ; 2.908 ns ; demo:inst|knightlight[0] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.030 ns ; 2.878 ns ;
316 ; 2.921 ns ; demo:inst|ledstate ; demo:inst|knightlight[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.062 ns ; 2.983 ns ;
317 ; 2.931 ns ; demo:inst|counter[5] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 2.947 ns ;
318 ; 2.948 ns ; demo:inst|counter[2] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 2.964 ns ;
319 ; 2.986 ns ; demo:inst|counter[2] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.002 ns ;
320 ; 3.010 ns ; demo:inst|counter[5] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 2.978 ns ;
321 ; 3.011 ns ; demo:inst|counter[5] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 2.979 ns ;
322 ; 3.017 ns ; demo:inst|counter[2] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 2.985 ns ;
323 ; 3.018 ns ; demo:inst|counter[2] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 2.986 ns ;
324 ; 3.019 ns ; demo:inst|counter[2] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.035 ns ;
325 ; 3.046 ns ; demo:inst|counter[3] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.062 ns ;
326 ; 3.053 ns ; demo:inst|knightlight[1] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.030 ns ; 3.023 ns ;
327 ; 3.084 ns ; demo:inst|knightlight[2] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.030 ns ; 3.054 ns ;
328 ; 3.093 ns ; demo:inst|counter[4] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.109 ns ;
329 ; 3.118 ns ; demo:inst|counter[1] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.134 ns ;
330 ; 3.150 ns ; demo:inst|counter[2] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.166 ns ;
331 ; 3.156 ns ; demo:inst|counter[1] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.172 ns ;
332 ; 3.164 ns ; demo:inst|counter[1] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.132 ns ;
333 ; 3.165 ns ; demo:inst|counter[1] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.133 ns ;
334 ; 3.175 ns ; demo:inst|counter[5] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.191 ns ;
335 ; 3.189 ns ; demo:inst|counter[1] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.205 ns ;
336 ; 3.203 ns ; demo:inst|counter[4] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.219 ns ;
337 ; 3.239 ns ; demo:inst|knightlight[3] ; demo:inst|knightlight[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.062 ns ; 3.301 ns ;
338 ; 3.255 ns ; demo:inst|counter[5] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.223 ns ;
339 ; 3.256 ns ; demo:inst|counter[5] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.224 ns ;
340 ; 3.258 ns ; demo:inst|counter[5] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.226 ns ;
341 ; 3.262 ns ; demo:inst|counter[2] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.230 ns ;
342 ; 3.263 ns ; demo:inst|counter[2] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.231 ns ;
343 ; 3.265 ns ; demo:inst|counter[2] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.233 ns ;
344 ; 3.274 ns ; demo:inst|counter[4] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.290 ns ;
345 ; 3.319 ns ; demo:inst|counter[0] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.335 ns ;
346 ; 3.320 ns ; demo:inst|counter[1] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.336 ns ;
347 ; 3.323 ns ; demo:inst|counter[3] ; demo:inst|counter[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.339 ns ;
348 ; 3.324 ns ; demo:inst|counter[0] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.292 ns ;
349 ; 3.325 ns ; demo:inst|counter[0] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.293 ns ;
350 ; 3.337 ns ; demo:inst|knightlight[2] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.030 ns ; 3.307 ns ;
351 ; 3.357 ns ; demo:inst|counter[0] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.373 ns ;
352 ; 3.390 ns ; demo:inst|counter[0] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.406 ns ;
353 ; 3.394 ns ; demo:inst|counter[3] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.410 ns ;
354 ; 3.409 ns ; demo:inst|counter[1] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.377 ns ;
355 ; 3.410 ns ; demo:inst|counter[1] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.378 ns ;
356 ; 3.412 ns ; demo:inst|counter[1] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.380 ns ;
357 ; 3.426 ns ; demo:inst|counter[6] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.394 ns ;
358 ; 3.427 ns ; demo:inst|counter[6] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.395 ns ;
359 ; 3.521 ns ; demo:inst|counter[0] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.537 ns ;
360 ; 3.525 ns ; demo:inst|counter[3] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.541 ns ;
361 ; 3.542 ns ; demo:inst|counter[3] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.510 ns ;
362 ; 3.543 ns ; demo:inst|counter[3] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.511 ns ;
363 ; 3.569 ns ; demo:inst|counter[0] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.537 ns ;
364 ; 3.570 ns ; demo:inst|counter[0] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.538 ns ;
365 ; 3.572 ns ; demo:inst|counter[0] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.540 ns ;
366 ; 3.671 ns ; demo:inst|counter[6] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.639 ns ;
367 ; 3.672 ns ; demo:inst|counter[6] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.640 ns ;
368 ; 3.674 ns ; demo:inst|counter[6] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.642 ns ;
369 ; 3.761 ns ; demo:inst|counter[4] ; demo:inst|knightlight[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.729 ns ;
370 ; 3.762 ns ; demo:inst|counter[4] ; demo:inst|knightlight[7] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.730 ns ;
371 ; 3.787 ns ; demo:inst|counter[3] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.755 ns ;
372 ; 3.788 ns ; demo:inst|counter[3] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.756 ns ;
373 ; 3.790 ns ; demo:inst|counter[3] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.758 ns ;
374 ; 3.815 ns ; demo:inst|counter[6] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.831 ns ;
375 ; 3.817 ns ; demo:inst|counter[6] ; demo:inst|counter[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.833 ns ;
376 ; 3.818 ns ; demo:inst|counter[6] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.834 ns ;
377 ; 3.823 ns ; demo:inst|counter[4] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.839 ns ;
378 ; 3.875 ns ; demo:inst|counter[5] ; demo:inst|counter[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.891 ns ;
379 ; 3.878 ns ; demo:inst|counter[5] ; demo:inst|counter[4] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 3.894 ns ;
380 ; 4.006 ns ; demo:inst|counter[4] ; demo:inst|knightlight[5] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.974 ns ;
381 ; 4.007 ns ; demo:inst|counter[4] ; demo:inst|knightlight[3] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.975 ns ;
382 ; 4.009 ns ; demo:inst|counter[4] ; demo:inst|knightlight[6] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 3.977 ns ;
383 ; 4.217 ns ; demo:inst|counter[2] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.233 ns ;
384 ; 4.220 ns ; demo:inst|counter[2] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.236 ns ;
385 ; 4.223 ns ; demo:inst|counter[6] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.239 ns ;
386 ; 4.224 ns ; demo:inst|counter[6] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.240 ns ;
387 ; 4.226 ns ; demo:inst|counter[6] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.242 ns ;
388 ; 4.231 ns ; demo:inst|counter[4] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.247 ns ;
389 ; 4.232 ns ; demo:inst|counter[4] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.248 ns ;
390 ; 4.234 ns ; demo:inst|counter[4] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.250 ns ;
391 ; 4.279 ns ; demo:inst|counter[5] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 4.247 ns ;
392 ; 4.283 ns ; demo:inst|counter[5] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.299 ns ;
393 ; 4.284 ns ; demo:inst|counter[5] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.300 ns ;
394 ; 4.286 ns ; demo:inst|counter[5] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.302 ns ;
395 ; 4.286 ns ; demo:inst|counter[2] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 4.254 ns ;
396 ; 4.390 ns ; demo:inst|counter[3] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.406 ns ;
397 ; 4.391 ns ; demo:inst|counter[3] ; demo:inst|counter[2] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.407 ns ;
398 ; 4.393 ns ; demo:inst|counter[3] ; demo:inst|counter[1] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.409 ns ;
399 ; 4.433 ns ; demo:inst|counter[1] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 4.401 ns ;
400 ; 4.458 ns ; demo:inst|counter[1] ; demo:inst|counter[0] ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; 0.016 ns ; 4.474 ns ;
401 ; 4.593 ns ; demo:inst|counter[0] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 4.561 ns ;
402 ; 4.695 ns ; demo:inst|counter[6] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 4.663 ns ;
403 ; 4.811 ns ; demo:inst|counter[3] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 4.779 ns ;
404 ; 5.030 ns ; demo:inst|counter[4] ; demo:inst|ledstate ; pll:inst1|altpll:altpll_component|_clk0 ; pll:inst1|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.032 ns ; 4.998 ns ;
405 +---------------+--------------------------+--------------------------+-----------------------------------------+-----------------------------------------+----------------------------+----------------------------+--------------------------+
408 +---------------------------------------------------------------------------------+
410 +-------+--------------+------------+-------+--------------------------+----------+
411 ; Slack ; Required tsu ; Actual tsu ; From ; To ; To Clock ;
412 +-------+--------------+------------+-------+--------------------------+----------+
413 ; N/A ; None ; 7.774 ns ; RESET ; demo:inst|knightlight[7] ; CLK ;
414 ; N/A ; None ; 7.774 ns ; RESET ; demo:inst|ledstate ; CLK ;
415 ; N/A ; None ; 7.774 ns ; RESET ; demo:inst|knightlight[6] ; CLK ;
416 ; N/A ; None ; 7.774 ns ; RESET ; demo:inst|knightlight[4] ; CLK ;
417 ; N/A ; None ; 7.774 ns ; RESET ; demo:inst|knightlight[3] ; CLK ;
418 ; N/A ; None ; 7.774 ns ; RESET ; demo:inst|knightlight[5] ; CLK ;
419 ; N/A ; None ; 7.693 ns ; RESET ; demo:inst|knightlight[2] ; CLK ;
420 ; N/A ; None ; 7.693 ns ; RESET ; demo:inst|knightlight[1] ; CLK ;
421 ; N/A ; None ; 7.693 ns ; RESET ; demo:inst|knightlight[0] ; CLK ;
422 ; N/A ; None ; 7.545 ns ; RESET ; demo:inst|counter[6] ; CLK ;
423 ; N/A ; None ; 7.545 ns ; RESET ; demo:inst|counter[4] ; CLK ;
424 ; N/A ; None ; 7.545 ns ; RESET ; demo:inst|counter[5] ; CLK ;
425 ; N/A ; None ; 7.545 ns ; RESET ; demo:inst|counter[3] ; CLK ;
426 ; N/A ; None ; 7.543 ns ; RESET ; demo:inst|counter[0] ; CLK ;
427 ; N/A ; None ; 7.543 ns ; RESET ; demo:inst|counter[1] ; CLK ;
428 ; N/A ; None ; 7.543 ns ; RESET ; demo:inst|counter[2] ; CLK ;
429 +-------+--------------+------------+-------+--------------------------+----------+
432 +-------------------------------------------------------------------------------------+
434 +-------+--------------+------------+--------------------------+---------+------------+
435 ; Slack ; Required tco ; Actual tco ; From ; To ; From Clock ;
436 +-------+--------------+------------+--------------------------+---------+------------+
437 ; N/A ; None ; 9.507 ns ; demo:inst|knightlight[0] ; LEDS[0] ; CLK ;
438 ; N/A ; None ; 9.388 ns ; demo:inst|knightlight[2] ; LEDS[2] ; CLK ;
439 ; N/A ; None ; 9.171 ns ; demo:inst|knightlight[1] ; LEDS[1] ; CLK ;
440 ; N/A ; None ; 7.540 ns ; demo:inst|knightlight[4] ; LEDS[4] ; CLK ;
441 ; N/A ; None ; 7.369 ns ; demo:inst|knightlight[7] ; LEDS[7] ; CLK ;
442 ; N/A ; None ; 6.654 ns ; demo:inst|knightlight[3] ; LEDS[3] ; CLK ;
443 ; N/A ; None ; 6.178 ns ; demo:inst|knightlight[5] ; LEDS[5] ; CLK ;
444 ; N/A ; None ; 6.126 ns ; demo:inst|knightlight[6] ; LEDS[6] ; CLK ;
445 +-------+--------------+------------+--------------------------+---------+------------+
448 +---------------------------------------------------------------------------------------+
450 +---------------+-------------+-----------+-------+--------------------------+----------+
451 ; Minimum Slack ; Required th ; Actual th ; From ; To ; To Clock ;
452 +---------------+-------------+-----------+-------+--------------------------+----------+
453 ; N/A ; None ; -7.313 ns ; RESET ; demo:inst|counter[0] ; CLK ;
454 ; N/A ; None ; -7.313 ns ; RESET ; demo:inst|counter[1] ; CLK ;
455 ; N/A ; None ; -7.313 ns ; RESET ; demo:inst|counter[2] ; CLK ;
456 ; N/A ; None ; -7.315 ns ; RESET ; demo:inst|counter[6] ; CLK ;
457 ; N/A ; None ; -7.315 ns ; RESET ; demo:inst|counter[4] ; CLK ;
458 ; N/A ; None ; -7.315 ns ; RESET ; demo:inst|counter[5] ; CLK ;
459 ; N/A ; None ; -7.315 ns ; RESET ; demo:inst|counter[3] ; CLK ;
460 ; N/A ; None ; -7.463 ns ; RESET ; demo:inst|knightlight[2] ; CLK ;
461 ; N/A ; None ; -7.463 ns ; RESET ; demo:inst|knightlight[1] ; CLK ;
462 ; N/A ; None ; -7.463 ns ; RESET ; demo:inst|knightlight[0] ; CLK ;
463 ; N/A ; None ; -7.544 ns ; RESET ; demo:inst|knightlight[7] ; CLK ;
464 ; N/A ; None ; -7.544 ns ; RESET ; demo:inst|ledstate ; CLK ;
465 ; N/A ; None ; -7.544 ns ; RESET ; demo:inst|knightlight[6] ; CLK ;
466 ; N/A ; None ; -7.544 ns ; RESET ; demo:inst|knightlight[4] ; CLK ;
467 ; N/A ; None ; -7.544 ns ; RESET ; demo:inst|knightlight[3] ; CLK ;
468 ; N/A ; None ; -7.544 ns ; RESET ; demo:inst|knightlight[5] ; CLK ;
469 +---------------+-------------+-----------+-------+--------------------------+----------+
472 +--------------------------+
473 ; Timing Analyzer Messages ;
474 +--------------------------+
475 Info: *******************************************************************
476 Info: Running Quartus II Classic Timing Analyzer
477 Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
478 Info: Processing started: Mon Mar 30 19:53:31 2009
479 Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off demo -c demo --timing_analysis_only
480 Warning: Clock latency analysis for PLL offsets is supported for the current device family, but is not enabled
481 Info: Found timing assignments -- calculating delays
482 Info: Slack time is 3.604 ns for clock "pll:inst1|altpll:altpll_component|_clk0" between source register "demo:inst|counter[3]" and destination register "demo:inst|counter[1]"
483 Info: Fmax is 156.35 MHz (period= 6.396 ns)
484 Info: + Largest register to register requirement is 9.786 ns
485 Info: + Setup relationship between source and destination is 10.000 ns
486 Info: + Latch edge is 7.622 ns
487 Info: Clock period of Destination clock "pll:inst1|altpll:altpll_component|_clk0" is 10.000 ns with offset of -2.378 ns and duty cycle of 50
488 Info: Multicycle Setup factor for Destination register is 1
489 Info: - Launch edge is -2.378 ns
490 Info: Clock period of Source clock "pll:inst1|altpll:altpll_component|_clk0" is 10.000 ns with offset of -2.378 ns and duty cycle of 50
491 Info: Multicycle Setup factor for Source register is 1
492 Info: + Largest clock skew is 0.000 ns
493 Info: + Shortest clock path from clock "pll:inst1|altpll:altpll_component|_clk0" to destination register is 2.650 ns
494 Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'pll:inst1|altpll:altpll_component|_clk0'
495 Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 16; COMB Node = 'pll:inst1|altpll:altpll_component|_clk0~clkctrl'
496 Info: 3: + IC(1.022 ns) + CELL(0.537 ns) = 2.650 ns; Loc. = LCFF_X55_Y31_N1; Fanout = 3; REG Node = 'demo:inst|counter[1]'
497 Info: Total cell delay = 0.537 ns ( 20.26 % )
498 Info: Total interconnect delay = 2.113 ns ( 79.74 % )
499 Info: - Longest clock path from clock "pll:inst1|altpll:altpll_component|_clk0" to source register is 2.650 ns
500 Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'pll:inst1|altpll:altpll_component|_clk0'
501 Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 16; COMB Node = 'pll:inst1|altpll:altpll_component|_clk0~clkctrl'
502 Info: 3: + IC(1.022 ns) + CELL(0.537 ns) = 2.650 ns; Loc. = LCFF_X57_Y31_N31; Fanout = 3; REG Node = 'demo:inst|counter[3]'
503 Info: Total cell delay = 0.537 ns ( 20.26 % )
504 Info: Total interconnect delay = 2.113 ns ( 79.74 % )
505 Info: - Micro clock to output delay of source is 0.250 ns
506 Info: - Micro setup delay of destination is -0.036 ns
507 Info: - Longest register to register delay is 6.182 ns
508 Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X57_Y31_N31; Fanout = 3; REG Node = 'demo:inst|counter[3]'
509 Info: 2: + IC(0.741 ns) + CELL(0.414 ns) = 1.155 ns; Loc. = LCCOMB_X55_Y31_N18; Fanout = 2; COMB Node = 'demo:inst|Add0~101'
510 Info: 3: + IC(0.000 ns) + CELL(0.410 ns) = 1.565 ns; Loc. = LCCOMB_X55_Y31_N20; Fanout = 3; COMB Node = 'demo:inst|Add0~102'
511 Info: 4: + IC(0.277 ns) + CELL(0.414 ns) = 2.256 ns; Loc. = LCCOMB_X55_Y31_N4; Fanout = 2; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_6_result_int[3]~19'
512 Info: 5: + IC(0.000 ns) + CELL(0.071 ns) = 2.327 ns; Loc. = LCCOMB_X55_Y31_N6; Fanout = 2; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_6_result_int[4]~21'
513 Info: 6: + IC(0.000 ns) + CELL(0.071 ns) = 2.398 ns; Loc. = LCCOMB_X55_Y31_N8; Fanout = 2; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_6_result_int[5]~23'
514 Info: 7: + IC(0.000 ns) + CELL(0.071 ns) = 2.469 ns; Loc. = LCCOMB_X55_Y31_N10; Fanout = 1; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_6_result_int[6]~25'
515 Info: 8: + IC(0.000 ns) + CELL(0.410 ns) = 2.879 ns; Loc. = LCCOMB_X55_Y31_N12; Fanout = 14; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_6_result_int[7]~26'
516 Info: 9: + IC(0.705 ns) + CELL(0.150 ns) = 3.734 ns; Loc. = LCCOMB_X57_Y31_N10; Fanout = 2; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|StageOut[49]~22'
517 Info: 10: + IC(0.263 ns) + CELL(0.504 ns) = 4.501 ns; Loc. = LCCOMB_X57_Y31_N14; Fanout = 2; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_7_result_int[2]~21'
518 Info: 11: + IC(0.000 ns) + CELL(0.071 ns) = 4.572 ns; Loc. = LCCOMB_X57_Y31_N16; Fanout = 2; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_7_result_int[3]~23'
519 Info: 12: + IC(0.000 ns) + CELL(0.071 ns) = 4.643 ns; Loc. = LCCOMB_X57_Y31_N18; Fanout = 2; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_7_result_int[4]~25'
520 Info: 13: + IC(0.000 ns) + CELL(0.071 ns) = 4.714 ns; Loc. = LCCOMB_X57_Y31_N20; Fanout = 2; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_7_result_int[5]~27'
521 Info: 14: + IC(0.000 ns) + CELL(0.071 ns) = 4.785 ns; Loc. = LCCOMB_X57_Y31_N22; Fanout = 1; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_7_result_int[6]~29'
522 Info: 15: + IC(0.000 ns) + CELL(0.071 ns) = 4.856 ns; Loc. = LCCOMB_X57_Y31_N24; Fanout = 1; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_7_result_int[7]~31'
523 Info: 16: + IC(0.000 ns) + CELL(0.410 ns) = 5.266 ns; Loc. = LCCOMB_X57_Y31_N26; Fanout = 7; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|add_sub_7_result_int[8]~32'
524 Info: 17: + IC(0.682 ns) + CELL(0.150 ns) = 6.098 ns; Loc. = LCCOMB_X55_Y31_N0; Fanout = 1; COMB Node = 'demo:inst|lpm_divide:Mod0|lpm_divide_85m:auto_generated|sign_div_unsign_fkh:divider|alt_u_div_00f:divider|StageOut[57]~636'
525 Info: 18: + IC(0.000 ns) + CELL(0.084 ns) = 6.182 ns; Loc. = LCFF_X55_Y31_N1; Fanout = 3; REG Node = 'demo:inst|counter[1]'
526 Info: Total cell delay = 3.514 ns ( 56.84 % )
527 Info: Total interconnect delay = 2.668 ns ( 43.16 % )
528 Info: No valid register-to-register data paths exist for clock "CLK"
529 Info: Minimum slack time is 391 ps for clock "pll:inst1|altpll:altpll_component|_clk0" between source register "demo:inst|knightlight[5]" and destination register "demo:inst|knightlight[5]"
530 Info: + Shortest register to register delay is 0.407 ns
531 Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X33_Y27_N29; Fanout = 5; REG Node = 'demo:inst|knightlight[5]'
532 Info: 2: + IC(0.000 ns) + CELL(0.323 ns) = 0.323 ns; Loc. = LCCOMB_X33_Y27_N28; Fanout = 1; COMB Node = 'demo:inst|knightlight~1268'
533 Info: 3: + IC(0.000 ns) + CELL(0.084 ns) = 0.407 ns; Loc. = LCFF_X33_Y27_N29; Fanout = 5; REG Node = 'demo:inst|knightlight[5]'
534 Info: Total cell delay = 0.407 ns ( 100.00 % )
535 Info: - Smallest register to register requirement is 0.016 ns
536 Info: + Hold relationship between source and destination is 0.000 ns
537 Info: + Latch edge is -2.378 ns
538 Info: Clock period of Destination clock "pll:inst1|altpll:altpll_component|_clk0" is 10.000 ns with offset of -2.378 ns and duty cycle of 50
539 Info: Multicycle Setup factor for Destination register is 1
540 Info: Multicycle Hold factor for Destination register is 1
541 Info: - Launch edge is -2.378 ns
542 Info: Clock period of Source clock "pll:inst1|altpll:altpll_component|_clk0" is 10.000 ns with offset of -2.378 ns and duty cycle of 50
543 Info: Multicycle Setup factor for Source register is 1
544 Info: Multicycle Hold factor for Source register is 1
545 Info: + Smallest clock skew is 0.000 ns
546 Info: + Longest clock path from clock "pll:inst1|altpll:altpll_component|_clk0" to destination register is 2.602 ns
547 Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'pll:inst1|altpll:altpll_component|_clk0'
548 Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 16; COMB Node = 'pll:inst1|altpll:altpll_component|_clk0~clkctrl'
549 Info: 3: + IC(0.974 ns) + CELL(0.537 ns) = 2.602 ns; Loc. = LCFF_X33_Y27_N29; Fanout = 5; REG Node = 'demo:inst|knightlight[5]'
550 Info: Total cell delay = 0.537 ns ( 20.64 % )
551 Info: Total interconnect delay = 2.065 ns ( 79.36 % )
552 Info: - Shortest clock path from clock "pll:inst1|altpll:altpll_component|_clk0" to source register is 2.602 ns
553 Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'pll:inst1|altpll:altpll_component|_clk0'
554 Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 16; COMB Node = 'pll:inst1|altpll:altpll_component|_clk0~clkctrl'
555 Info: 3: + IC(0.974 ns) + CELL(0.537 ns) = 2.602 ns; Loc. = LCFF_X33_Y27_N29; Fanout = 5; REG Node = 'demo:inst|knightlight[5]'
556 Info: Total cell delay = 0.537 ns ( 20.64 % )
557 Info: Total interconnect delay = 2.065 ns ( 79.36 % )
558 Info: - Micro clock to output delay of source is 0.250 ns
559 Info: + Micro hold delay of destination is 0.266 ns
560 Info: tsu for register "demo:inst|knightlight[7]" (data pin = "RESET", clock pin = "CLK") is 7.774 ns
561 Info: + Longest pin to register delay is 8.034 ns
562 Info: 1: + IC(0.000 ns) + CELL(0.850 ns) = 0.850 ns; Loc. = PIN_B3; Fanout = 16; PIN Node = 'RESET'
563 Info: 2: + IC(6.674 ns) + CELL(0.510 ns) = 8.034 ns; Loc. = LCFF_X33_Y27_N15; Fanout = 4; REG Node = 'demo:inst|knightlight[7]'
564 Info: Total cell delay = 1.360 ns ( 16.93 % )
565 Info: Total interconnect delay = 6.674 ns ( 83.07 % )
566 Info: + Micro setup delay of destination is -0.036 ns
567 Info: - Offset between input clock "CLK" and output clock "pll:inst1|altpll:altpll_component|_clk0" is -2.378 ns
568 Info: - Shortest clock path from clock "pll:inst1|altpll:altpll_component|_clk0" to destination register is 2.602 ns
569 Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'pll:inst1|altpll:altpll_component|_clk0'
570 Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 16; COMB Node = 'pll:inst1|altpll:altpll_component|_clk0~clkctrl'
571 Info: 3: + IC(0.974 ns) + CELL(0.537 ns) = 2.602 ns; Loc. = LCFF_X33_Y27_N15; Fanout = 4; REG Node = 'demo:inst|knightlight[7]'
572 Info: Total cell delay = 0.537 ns ( 20.64 % )
573 Info: Total interconnect delay = 2.065 ns ( 79.36 % )
574 Info: tco from clock "CLK" to destination pin "LEDS[0]" through register "demo:inst|knightlight[0]" is 9.507 ns
575 Info: + Offset between input clock "CLK" and output clock "pll:inst1|altpll:altpll_component|_clk0" is -2.378 ns
576 Info: + Longest clock path from clock "pll:inst1|altpll:altpll_component|_clk0" to source register is 2.648 ns
577 Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'pll:inst1|altpll:altpll_component|_clk0'
578 Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 16; COMB Node = 'pll:inst1|altpll:altpll_component|_clk0~clkctrl'
579 Info: 3: + IC(1.020 ns) + CELL(0.537 ns) = 2.648 ns; Loc. = LCFF_X54_Y31_N19; Fanout = 4; REG Node = 'demo:inst|knightlight[0]'
580 Info: Total cell delay = 0.537 ns ( 20.28 % )
581 Info: Total interconnect delay = 2.111 ns ( 79.72 % )
582 Info: + Micro clock to output delay of source is 0.250 ns
583 Info: + Longest register to pin delay is 8.987 ns
584 Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X54_Y31_N19; Fanout = 4; REG Node = 'demo:inst|knightlight[0]'
585 Info: 2: + IC(6.365 ns) + CELL(2.622 ns) = 8.987 ns; Loc. = PIN_W5; Fanout = 0; PIN Node = 'LEDS[0]'
586 Info: Total cell delay = 2.622 ns ( 29.18 % )
587 Info: Total interconnect delay = 6.365 ns ( 70.82 % )
588 Info: th for register "demo:inst|counter[0]" (data pin = "RESET", clock pin = "CLK") is -7.313 ns
589 Info: + Offset between input clock "CLK" and output clock "pll:inst1|altpll:altpll_component|_clk0" is -2.378 ns
590 Info: + Longest clock path from clock "pll:inst1|altpll:altpll_component|_clk0" to destination register is 2.650 ns
591 Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1; CLK Node = 'pll:inst1|altpll:altpll_component|_clk0'
592 Info: 2: + IC(1.091 ns) + CELL(0.000 ns) = 1.091 ns; Loc. = CLKCTRL_G3; Fanout = 16; COMB Node = 'pll:inst1|altpll:altpll_component|_clk0~clkctrl'
593 Info: 3: + IC(1.022 ns) + CELL(0.537 ns) = 2.650 ns; Loc. = LCFF_X55_Y31_N29; Fanout = 5; REG Node = 'demo:inst|counter[0]'
594 Info: Total cell delay = 0.537 ns ( 20.26 % )
595 Info: Total interconnect delay = 2.113 ns ( 79.74 % )
596 Info: + Micro hold delay of destination is 0.266 ns
597 Info: - Shortest pin to register delay is 7.851 ns
598 Info: 1: + IC(0.000 ns) + CELL(0.850 ns) = 0.850 ns; Loc. = PIN_B3; Fanout = 16; PIN Node = 'RESET'
599 Info: 2: + IC(6.491 ns) + CELL(0.510 ns) = 7.851 ns; Loc. = LCFF_X55_Y31_N29; Fanout = 5; REG Node = 'demo:inst|counter[0]'
600 Info: Total cell delay = 1.360 ns ( 17.32 % )
601 Info: Total interconnect delay = 6.491 ns ( 82.68 % )
602 Info: All timing requirements were met for slow timing model timing analysis. See Report window for more details.
603 Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 1 warning
604 Info: Processing ended: Mon Mar 30 19:53:32 2009
605 Info: Elapsed time: 00:00:01
projects / hwmod.git / blob