demo/quartus/demo.flow.rpt

   1 Flow report for demo
   2 Mon Mar 30 19:53:36 2009
   3 Quartus II Version 7.0 Build 33 02/05/2007 SJ Full Version
   4
   5
   6 ---------------------
   7 ; Table of Contents ;
   8 ---------------------
   9   1. Legal Notice
  10   2. Flow Summary
  11   3. Flow Settings
  12   4. Flow Non-Default Global Settings
  13   5. Flow Elapsed Time
  14   6. Flow Log
  15
  16
  17
  18 ----------------
  19 ; Legal Notice ;
  20 ----------------
  21 Copyright (C) 1991-2007 Altera Corporation
  22 Your use of Altera Corporation's design tools, logic functions
  23 and other software and tools, and its AMPP partner logic
  24 functions, and any output files from any of the foregoing
  25 (including device programming or simulation files), and any
  26 associated documentation or information are expressly subject
  27 to the terms and conditions of the Altera Program License
  28 Subscription Agreement, Altera MegaCore Function License
  29 Agreement, or other applicable license agreement, including,
  30 without limitation, that your use is for the sole purpose of
  31 programming logic devices manufactured by Altera and sold by
  32 Altera or its authorized distributors.  Please refer to the
  33 applicable agreement for further details.
  34
  35
  36
  37 +------------------------------------------------------------------------------+
  38 ; Flow Summary                                                                 ;
  39 +------------------------------------+-----------------------------------------+
  40 ; Flow Status                        ; Successful - Mon Mar 30 19:53:36 2009   ;
  41 ; Quartus II Version                 ; 7.0 Build 33 02/05/2007 SJ Full Version ;
  42 ; Revision Name                      ; demo                                    ;
  43 ; Top-level Entity Name              ; demo_top                                ;
  44 ; Family                             ; Cyclone II                              ;
  45 ; Device                             ; EP2C35F484C6                            ;
  46 ; Timing Models                      ; Final                                   ;
  47 ; Met timing requirements            ; Yes                                     ;
  48 ; Total logic elements               ; 65 / 33,216 ( < 1 % )                   ;
  49 ;     Total combinational functions  ; 65 / 33,216 ( < 1 % )                   ;
  50 ;     Dedicated logic registers      ; 16 / 33,216 ( < 1 % )                   ;
  51 ; Total registers                    ; 16                                      ;
  52 ; Total pins                         ; 10 / 322 ( 3 % )                        ;
  53 ; Total virtual pins                 ; 0                                       ;
  54 ; Total memory bits                  ; 0 / 483,840 ( 0 % )                     ;
  55 ; Embedded Multiplier 9-bit elements ; 0 / 70 ( 0 % )                          ;
  56 ; Total PLLs                         ; 1 / 4 ( 25 % )                          ;
  57 +------------------------------------+-----------------------------------------+
  58
  59
  60 +-----------------------------------------+
  61 ; Flow Settings                           ;
  62 +-------------------+---------------------+
  63 ; Option            ; Setting             ;
  64 +-------------------+---------------------+
  65 ; Start date & time ; 03/30/2009 19:52:35 ;
  66 ; Main task         ; Compilation         ;
  67 ; Revision Name     ; demo                ;
  68 +-------------------+---------------------+
  69
  70
  71 +-------------------------------------------------------------------------------------------------------------------+
  72 ; Flow Non-Default Global Settings                                                                                  ;
  73 +--------------------------------------------+-----------------------+---------------+-------------+----------------+
  74 ; Assignment Name                            ; Value                 ; Default Value ; Entity Name ; Section Id     ;
  75 +--------------------------------------------+-----------------------+---------------+-------------+----------------+
  76 ; EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION ; On                    ; --            ; --          ; eda_simulation ;
  77 ; EDA_OUTPUT_DATA_FORMAT                     ; Vhdl                  ; --            ; --          ; eda_simulation ;
  78 ; EDA_SIMULATION_RUN_SCRIPT                  ; ../sim/demo_tb_rtl.do ; --            ; --          ; eda_simulation ;
  79 ; EDA_SIMULATION_TOOL                        ; ModelSim (VHDL)       ; <None>        ; --          ; --             ;
  80 ; EDA_TEST_BENCH_ENABLE_STATUS               ; NOT_USED              ; --            ; --          ; eda_simulation ;
  81 ; PARTITION_NETLIST_TYPE                     ; SOURCE                ; --            ; demo_top    ; Top            ;
  82 ; TOP_LEVEL_ENTITY                           ; demo_top              ; demo          ; --          ; --             ;
  83 +--------------------------------------------+-----------------------+---------------+-------------+----------------+
  84
  85
  86 +----------------------------------------+
  87 ; Flow Elapsed Time                      ;
  88 +-------------------------+--------------+
  89 ; Module Name             ; Elapsed Time ;
  90 +-------------------------+--------------+
  91 ; Analysis & Synthesis    ; 00:00:03     ;
  92 ; Partition Merge         ; 00:00:01     ;
  93 ; Fitter                  ; 00:00:14     ;
  94 ; Assembler               ; 00:00:27     ;
  95 ; Classic Timing Analyzer ; 00:00:01     ;
  96 ; EDA Netlist Writer      ; 00:00:01     ;
  97 ; Total                   ; 00:00:47     ;
  98 +-------------------------+--------------+
  99
 100
 101 ------------
 102 ; Flow Log ;
 103 ------------
 104 quartus_map --read_settings_files=on --write_settings_files=off demo -c demo
 105 quartus_cdb --read_settings_files=off --write_settings_files=off demo -c demo --merge=on
 106 quartus_fit --read_settings_files=off --write_settings_files=off demo -c demo
 107 quartus_asm --read_settings_files=off --write_settings_files=off demo -c demo
 108 quartus_tan --read_settings_files=off --write_settings_files=off demo -c demo --timing_analysis_only
 109 quartus_eda --read_settings_files=off --write_settings_files=off demo -c demo
 110
 111
 112