Mahogany Fam10 MPtable fix

Make changes MPtable to match ACPI tables.

Change-Id: I387f301370582fcb5e0d348d793333a919d2f373
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: http://review.coreboot.org/575
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

diff --git a/src/mainboard/amd/mahogany_fam10/mptable.c b/src/mainboard/amd/mahogany_fam10/mptable.c
index 4bf3480fcf5b14e8dbb63e3fb9c629175e1c6c6a..b1a658be4135018a7b873d042364c60107288a84 100644 (file)
--- a/src/mainboard/amd/mahogany_fam10/mptable.c
+++ b/src/mainboard/amd/mahogany_fam10/mptable.c
@@ -107,8 +107,30 @@ static void *smp_write_config_table(void *v)
 #define PCI_INT(bus, dev, fn, pin)
 #endif
 
+       /* changes added to match acpi tables */
+       PCI_INT(0x0, 0x02, 0x0, 0x12);
+       PCI_INT(0x0, 0x03, 0x0, 0x13);
+       PCI_INT(0x0, 0x04, 0x0, 0x10);
+       PCI_INT(0x0, 0x09, 0x0, 0x11);
+       PCI_INT(0x0, 0x0A, 0x0, 0x12);
+       PCI_INT(0x0, 0x12, 0x2, 0x12);
+       PCI_INT(0x0, 0x12, 0x3, 0x13);
+       PCI_INT(0x0, 0x13, 0x2, 0x10);
+       PCI_INT(0x0, 0x13, 0x2, 0x11);
+       PCI_INT(0x0, 0x14, 0x1, 0x11);
+       PCI_INT(0x0, 0x14, 0x3, 0x13);
+       PCI_INT(0x1, 0x05, 0x2, 0x10);
+       PCI_INT(0x1, 0x05, 0x3, 0x11);
+       PCI_INT(0x2, 0x00, 0x0, 0x12);
+       PCI_INT(0x2, 0x00, 0x1, 0x13);
+       PCI_INT(0x2, 0x00, 0x2, 0x10);
+       PCI_INT(0x2, 0x00, 0x3, 0x11);
+
+       /*  RS780 PCI to PCI bridge (PCIE port 4) */
+       PCI_INT(0x0, 0x09, 0x0, 0x11);
+
        /* usb */
-       PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */
+       PCI_INT(0x0, 0x12, 0x0, 0x10);  /* USB */
        PCI_INT(0x0, 0x12, 0x1, 0x11);
        PCI_INT(0x0, 0x13, 0x0, 0x12);
        PCI_INT(0x0, 0x13, 0x1, 0x13);
@@ -118,22 +140,25 @@ static void *smp_write_config_table(void *v)
        PCI_INT(0x0, 0x11, 0x0, 0x16);
 
        /* HD Audio: b0:d20:f1:reg63 should be 0. */
-       /* PCI_INT(0x0, 0x14, 0x2, 0x12); */
+       PCI_INT(0x0, 0x14, 0x2, 0x12);
 
        /* on board NIC & Slot PCIE.  */
        /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */
-/*     PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */
-       PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */
+       /* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */
+       PCI_INT(0x1, 0x5, 0x0, 0x12);   /* VGA */
+       PCI_INT(0x1, 0x5, 0x1, 0x13);   /* Audio */
+       /* PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); *//* Dev 2, external GFX */
        /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */
-       PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10);
+       /* PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); */
        /* configuration B doesnt need dev 5,6,7 */
        /*
         * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11);
         * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12);
         * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13);
         */
-       PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11);
-       PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */
+       /* PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); */
+       PCI_INT(0x3, 0x0, 0x0, 0x11);   /* NIC */
+       /* PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12);  NIC */
 
        /* PCI slots */
        /* PCI_SLOT 0. */