I945: replace #if defined() by #if

config.h defines also unset config options (as "0") so #ifdef
matches both settings, which isn't what we want.

Change-Id: I694e1b8a8ec4c20225d7af1a13a2a336f900e643
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/293
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 197c58fce5e7fa63c864b1fb12ee7ec03406182c..14c66c4e218dae1868c9c54eb2544b03ac386c26 100644 (file)
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -91,7 +91,7 @@ static void i945m_detect_chipset(void)
                printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8);      /* Others reserved. */
        }
        printk(BIOS_DEBUG, "\n");
-#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
+#if CONFIG_NORTHBRIDGE_INTEL_I945GC
        printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n");
 #endif
 }
@@ -140,7 +140,7 @@ static void i945_detect_chipset(void)
                printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8);      /* Others reserved. */
        }
        printk(BIOS_DEBUG, "\n");
-#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
+#if CONFIG_NORTHBRIDGE_INTEL_I945GM
        printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n");
 #endif
 }