Append logical PME/GPIO device. Fix MPU device number.
authorKyösti Mälkki <kyosti.malkki@gmail.com>
Sun, 16 Oct 2011 15:12:59 +0000 (18:12 +0300)
committerStefan Reinauer <stefan.reinauer@coreboot.org>
Mon, 17 Oct 2011 22:11:33 +0000 (00:11 +0200)
A mainboard may require configuration of the superio pins to fully
support some features. Things like A20# gate, leds, fans, infra-red
and bootstrap jumpers may be configured and controlled through the
logical PME device.

Change-Id: I6e77ff0295806ba3dff339013f73d99c2961388f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/289
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
src/superio/smsc/lpc47m10x/lpc47m10x.h
src/superio/smsc/lpc47m10x/superio.c

index 4c78d9e632836d8864fb6d7f699f0eebbd8121a5..535a4148cb604a22a200e2c25c82f3de288b7074 100644 (file)
@@ -30,7 +30,7 @@
 #define LPC47M10X2_KBC              7   /* Keyboard & Mouse */
 #define LPC47M10X2_GAME             9   /* GAME */
 #define LPC47M10X2_PME             10   /* PME  reg*/
-#define LPC47M10X2_MPU             10   /* MPE -- who knows --   reg*/ // FIXME
+#define LPC47M10X2_MPU             11   /* MPU-401 MIDI */
 
 #define LPC47M10X2_MAX_CONFIG_REGISTER 0x5F
 
index 0be8742e4502a0d38af0ae290578b3d77b1eb0e2..3d6a8ed1d71cdd2e4b165bb92b6ca39ea62c21a6 100644 (file)
@@ -65,6 +65,7 @@ static struct pnp_info pnp_dev_info[] = {
        { &ops, LPC47M10X2_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
        { &ops, LPC47M10X2_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
        { &ops, LPC47M10X2_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
+       { &ops, LPC47M10X2_PME, PNP_IO0, { 0x0f80, 0 }, },
 };
 
 /**