Workaround the errata #181.

We use LDTSTOP# to trigger the FID/VID change on K8M890, because the
FID/VID SMAF is blocked by not yet configured internal VGA.
The memory controller is enabled later, nor the workaround makes any
harm to non-affected CPUs.

This update unbreaks compilation by declaring the tmp variable.

Change-Id: Icf5d126b8c8cd9ece6af41d3129315a777c8cef2
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Cristian Măgherușan-Stanciu <cristi.magherusan@gmail.com>
Reviewed-on: http://review.coreboot.org/69
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c
index 580d8fa50acdfbfc01ecbf2887cbed99428cca23..9825e2bcfb68109dd7a73fd8d6702fcb278e7190 100644 (file)
--- a/src/mainboard/asus/m2v-mx_se/romstage.c
+++ b/src/mainboard/asus/m2v-mx_se/romstage.c
@@ -74,10 +74,15 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #define SB_VFSMAF 0
 
-/* this function might fail on some K8 CPUs with errata #181 */
 static void ldtstop_sb(void)
 {
        print_debug("toggle LDTSTP#\n");
+
+       /* fix errata #181, disable DRAM controller it will get enabled later */
+       u8 tmp = pci_read_config8(PCI_DEV(0, 0x18, 2), 0x94);
+       tmp |= (( 1 << 14) | (1 << 3));
+       pci_write_config8(PCI_DEV(0, 0x18, 2), 0x94, tmp);
+
        u8 reg = inb (VT8237R_ACPI_IO_BASE + 0x5c);
        reg = reg ^ (1 << 0);
        outb(reg, VT8237R_ACPI_IO_BASE + 0x5c);