#include <arch/hlt.h>
#include <arch/io.h>
+#if CONFIG_CONSOLE_SERIAL8250
+#include <uart8250.h>
+#endif
+
#if CONFIG_CONSOLE_NE2K
#include <console/ne2k.h>
#endif
enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
early_usbdebug_init();
#endif
+#if CONFIG_CONSOLE_SERIAL8250
+ uart_init();
+#endif
#if CONFIG_CONSOLE_NE2K
ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT);
#endif
void main(unsigned long bist)
{
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
void main(unsigned long bist)
{
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
{
/* FIXME: It's a Winbond W83977EF, actually. */
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
static void main(unsigned long bist)
{
w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
cs5530_enable_rom();
enable_rs780_dev8();
sb800_lpc_init();
- uart_init();
console_init();
// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
* early MSR setup for CS5536.
*/
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
/* it8712f_enable_serial does not use its 1st parameter. */
it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
post_code(0x31);
kbc1100_early_init(CONFIG_SIO_PORT);
- uart_init();
console_init();
}
sb7xx_51xx_lpc_init();
it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
sb7xx_51xx_lpc_init();
it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
*/
/* If debug. real setup done in chipset init via devicetree.cb. */
cs5536_setup_onchipuart(1);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
post_code(0x31);
f81865f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
}
//reg8 = pmio_read(0x24);
/* Pistachio used a FPGA to enable serial debug instead of a SIO
* and it doesn't require any special setup. */
- uart_init();
console_init();
SystemPreInit();
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
cs5536_early_setup();
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
post_code(0x32);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
- printk(BIOS_DEBUG, "\n");
// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
sb7xx_51xx_lpc_init();
it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
bsp_apicid = init_cpus(cpu_init_detectedx);
pc87360_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
msr.lo |= 0x7 << 20;
wrmsr(MDD_LEG_IO, msr);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
static void main(unsigned long bist)
{
pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
cs5530_enable_rom();
static void main(unsigned long bist)
{
pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
cs5530_enable_rom();
sio_init();
w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
post_code(0x31);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
}
//reg8 = pmio_read(0x24);
it8712f_24mhz_clkin();
it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
sio_init();
w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_rom_decode();
- print_info("now booting... fallback\n");
+ print_info("now booting... romstage\n");
/* Is this a CPU only reset? Or is this a secondary CPU? */
if (!cpu_init_detectedx && boot_cpu()) {
sio_init();
w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_rom_decode();
sio_init();
w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_rom_decode();
enumerate_ht_chain();
}
+ // FIXME why is this executed again? --->
sio_init();
w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_rom_decode();
+ // <--- FIXME why is this executed again?
print_info("now booting... real_main\n");
pnp_exit_ext_func_mode(SERIAL_DEV);
setup_mb_resource_map();
- uart_init();
report_bist_failure(bist);
console_init();
it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
it8712f_kill_watchdog();
it8712f_enable_3vsbsw();
- uart_init();
console_init();
enable_rom_decode();
it8712f_24mhz_clkin();
it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
it8712f_kill_watchdog();
- uart_init();
console_init();
enable_rom_decode();
m2v_bus_init();
it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
it8712f_kill_watchdog();
- uart_init();
console_init();
it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
it8712f_kill_watchdog();
- uart_init();
console_init();
void main(unsigned long bist)
{
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
enable_smbus();
void main(unsigned long bist)
{
lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_smbus();
report_bist_failure(bist);
void main(unsigned long bist)
{
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
void main(unsigned long bist)
{
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
{
/* FIXME: The ASUS P2B-F has a Winbond W83977EF, actually. */
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
{
/* FIXME: The ASUS P2B-LS has a Winbond W83977EF, actually. */
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
void main(unsigned long bist)
{
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
{
/* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
static void main(unsigned long bist)
{
pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
cs5530_enable_rom();
{
/* FIXME: It's a Winbond W83977EF, actually. */
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
static void main(unsigned long bist)
{
pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
cs5530_enable_rom();
w83697hf_set_clksel_48(SERIAL_DEV);
w83697hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_smbus();
void main(unsigned long bist)
{
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
enable_smbus();
bsp_apicid = init_cpus(cpu_init_detectedx);
pc87417_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
{
/* FIXME: Should be PC97307! */
pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
mainboard_set_ich5();
//bmc_foad();
pc8374_enable_dev(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* stuff we seem to need */
}
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
setupsc520();
irqinit();
- uart_init();
console_init();
for(i = 0; i < 100; i++)
print_err("fill usart\n");
*/
cs5536_disable_internal_uart();
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
static void main(unsigned long bist)
{
pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
cs5530_enable_rom();
{
it8712f_24mhz_clkin();
it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
- uart_init();
console_init();
report_bist_failure(bist);
enable_smbus();
/* init_timer(); */
post_code(0x05);
- uart_init();
console_init();
//print_pci_devices();
early_superio_config();
/* Set up the console */
- uart_init();
-
console_init();
/* Halt if there was a built in self test failure */
void main(unsigned long bist)
{
it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
{
it8671f_48mhz_clkin();
it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
setup_mb_resource_map();
- uart_init();
+ console_init();
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- console_init();
printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
setup_mb_resource_map();
- uart_init();
+ console_init();
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- console_init();
printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
it8718f_disable_reboot();
- uart_init();
-
console_init();
- printk(BIOS_DEBUG, "\n");
// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
it8718f_disable_reboot();
- uart_init();
console_init();
bsp_apicid = init_cpus(cpu_init_detectedx);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
pilot_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
+ console_init();
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- console_init();
// setup_early_ipmi_serial();
pilot_early_init(SERIAL_DEV); //config port is being taken from SERIAL_DEV
printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
pilot_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
+ console_init();
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- console_init();
pilot_early_init(SERIAL_DEV); //config port is being taken from SERIAL_DEV
val = cpuid_eax(1);
{
/* TODO: It's a PC87364 actually! */
pc87360_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_smbus();
report_bist_failure(bist);
early_superio_config_w83627ehg();
/* Set up the console */
- uart_init();
-
console_init();
/* Halt if there was a built in self test failure */
init_cpus(cpu_init_detectedx);
pc87366_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
init_cpus(cpu_init_detectedx);
pc87366_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
static void main(unsigned long bist)
{
w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
sb7xx_51xx_lpc_init();
f71859_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
static void main(unsigned long bist)
{
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
cs5530_enable_rom();
* early MSR setup for CS5536.
*/
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
sdram_initialize(1, memctrl);
/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
- return;
}
mb_gpio_init();
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
early_superio_config_lpc47m15x();
/* Set up the console */
- uart_init();
-
console_init();
/* Halt if there was a built in self test failure */
i3100_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
i3100_configure_uart_clk(SERIAL_DEV, I3100_UART_CLK_PREDIVIDE_26);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
/* Enable Serial 2 lines instead of GPIO */
outb(0x2c, 0x2e);
outb((inb(0x2f) & (~1<<1)), 0x2f);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
i3100_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
i3100_configure_uart_clk(SERIAL_DEV, I3100_UART_CLK_PREDIVIDE_26);
- uart_init();
console_init();
/* Prevent the TCO timer from rebooting us */
i3100_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
i3100_configure_uart_clk(SERIAL_DEV, I3100_UART_CLK_PREDIVIDE_26);
- uart_init();
console_init();
/* Prevent the TCO timer from rebooting us */
// Get the serial port running and print a welcome banner
lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
// Halt if there was a built in self test failure
enable_lapic();
sch_enable_lpc();
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
f71805f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_smbus();
sb7xx_51xx_lpc_init();
f71863fg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
early_superio_config_w83627thg();
/* Set up the console */
- uart_init();
-
console_init();
/* Halt if there was a built in self test failure */
sb600_lpc_init();
w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
}
w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
dock_connect();
early_superio_config();
/* Set up the console */
- uart_init();
}
#if CONFIG_USBDEBUG
dock_connect();
early_superio_config();
/* Set up the console */
- uart_init();
}
console_init();
msr_init();
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
cs5535_early_setup();
*/
it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
mb_gpio_init();
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
sdram_initialize(1, memctrl);
/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
- return;
}
*/
it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
mb_gpio_init();
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
sdram_initialize(1, memctrl);
/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
- return;
}
*/
it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
mb_gpio_init();
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
sdram_initialize(1, memctrl);
/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
- return;
}
*/
it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
mb_gpio_init();
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
void main(unsigned long bist)
{
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
void main(unsigned long bist)
{
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
void main(unsigned long bist)
{
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
void main(unsigned long bist)
{
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_smbus();
report_bist_failure(bist);
bsp_apicid = init_cpus(cpu_init_detectedx);
w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
pnp_exit_ext_func_mode(SERIAL_DEV);
setup_mb_resource_map();
- uart_init();
- report_bist_failure(bist); /* Halt upon BIST failure. */
console_init();
+ report_bist_failure(bist); /* Halt upon BIST failure. */
printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid=");
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
pc87417_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
}
w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
pnp_exit_ext_func_mode(SERIAL_DEV);
w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
void main(unsigned long bist)
{
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_smbus();
report_bist_failure(bist);
bsp_apicid = init_cpus(cpu_init_detectedx);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
void main(unsigned long bist)
{
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
setup_mb_resource_map();
- uart_init();
+ console_init();
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
-
- console_init();
printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
*/
cs5536_disable_internal_uart();
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
*/
cs5536_setup_onchipuart(1);
mb_gpio_init();
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
mb_gpio_init();
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure. */
early_superio_config();
/* Set up the console */
- uart_init();
-
console_init();
/* Halt if there was a built in self test failure */
void main(unsigned long bist)
{
it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
bsp_apicid = init_cpus(cpu_init_detectedx);
lpc47b397_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
- printk(BIOS_DEBUG, "\n");
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
write_GPIO();
printk(BIOS_DEBUG, "\n");
wpcm450_enable_dev(WPCM450_SP1, 0x164E, CONFIG_TTYS0_BASE);
sb7xx_51xx_disable_wideio(0);
- uart_init();
console_init();
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* MOVE ME TO A BETTER LOCATION !!! */
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
outb(0x87,0x2e);
pnp_write_config(CONSOLE_SERIAL_DEV, 0x24, 0x84 | (1 << 6));
pc87427_enable_dev(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
/* it8712f_enable_serial does not use its 1st parameter. */
it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
it8712f_kill_watchdog();
- uart_init();
console_init();
/* it8712f_enable_serial does not use its 1st parameter. */
it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
it8712f_kill_watchdog();
- uart_init();
console_init();
;
setupsc520();
- uart_init();
console_init();
static void main(unsigned long bist)
{
pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
cs5530_enable_rom();
mb_gpio_init();
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure. */
*/
/* If debug. real setup done in chipset init via devicetree.cb. */
cs5536_setup_onchipuart(1);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
void main(unsigned long bist)
{
pc87309_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
enable_lapic();
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
// post_code(0x32);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
init_cpus(cpu_init_detectedx);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
init_cpus(cpu_init_detectedx);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
// post_code(0x32);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
init_cpus(cpu_init_detectedx);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
bsp_apicid = init_cpus(cpu_init_detectedx);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
// post_code(0x32);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
// post_code(0x32);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
bsp_apicid = init_cpus(cpu_init_detectedx);
lpc47b397_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
setup_mb_resource_map();
- uart_init();
+
+ console_init();
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- console_init();
printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
post_code(0x32);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
init_cpus(cpu_init_detectedx);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
bsp_apicid = init_cpus(cpu_init_detectedx);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
enable_vt8235_serial();
- uart_init();
console_init();
enable_smbus();
smbus_fixup(&ctrl);
pci_write_config8(dev, 0x15, 0x1c);
enable_vt8235_serial();
- uart_init();
console_init();
enable_smbus();
/* EmbedComInit(); */
w83697hf_set_clksel_48(DUMMY_DEV);
w83697hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
/* enable_vx800_serial(); */
- /* uart_init(); */
/*
* 1. D15F0
w83697hf_set_clksel_48(DUMMY_DEV);
w83697hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_smbus();
early_mtrr_init();
enable_vt8231_serial();
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
it8716f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
enable_smbus();
smbus_fixup(&ctrl);
enable_smbus();
enable_cx700_serial();
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
*/
w83627hf_set_clksel_48(SERIAL_DEV);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
sdram_initialize(1, memctrl);
/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
- return;
}
/* cs5536_disable_internal_uart disable them. Set them up now... */
cs5536_setup_onchipuart(1);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */