rename vt8237r_cfg() to k8x8xx_vt8237r_cfg() and make publicly accessible

Change-Id: I82d1ec5117a58aaa8cfd2a342b7172a2786f5680
Signed-off-by: Florian Zumbiehl <florz@florz.de>
Reviewed-on: http://review.coreboot.org/379
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

diff --git a/src/southbridge/via/k8t890/ctrl.c b/src/southbridge/via/k8t890/ctrl.c
index 73635105f94e3f38ec62ee25944d2ac45ac77b93..d68e03e5f0856ea5cd07ae76a71d0c4686906d46 100644 (file)
--- a/src/southbridge/via/k8t890/ctrl.c
+++ b/src/southbridge/via/k8t890/ctrl.c
@@ -29,7 +29,7 @@
  * PCI device 0:11.7, but it is mapped to PCI 0:0.7 (0x70-0x7c for PCI1)
  */
 
-static void vt8237r_cfg(struct device *dev, struct device *devsb)
+void k8x8xx_vt8237r_cfg(struct device *dev, struct device *devsb)
 {
        u8 regm3;
        struct k8x8xx_vt8237_mirrored_regs mregs;
@@ -145,7 +145,7 @@ static void ctrl_init(struct device *dev)
                                         PCI_DEVICE_ID_VIA_VT8237R_LPC, 0);
        if (devsb) {
                vt8237r_vlink_init(dev);
-               vt8237r_cfg(dev, devsb);
+               k8x8xx_vt8237r_cfg(dev, devsb);
        } else {
                print_debug("VT8237R LPC not found !\n");
                return;

diff --git a/src/southbridge/via/k8t890/k8x8xx.h b/src/southbridge/via/k8t890/k8x8xx.h
index 425aaeb5e85c6b98645a340161af0a9672d03f5b..c61c98426bbaf4b38b9ddc099a3e80940dc6e639 100644 (file)
--- a/src/southbridge/via/k8t890/k8x8xx.h
+++ b/src/southbridge/via/k8t890/k8x8xx.h
@@ -23,6 +23,9 @@
 
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
+#ifndef __PRE_RAM__
+#include <device/device.h>
+#endif
 #include "k8t890.h"
 
 struct k8x8xx_vt8237_mirrored_regs {
@@ -48,4 +51,8 @@ static inline void k8x8xx_vt8237_mirrored_regs_fill(struct k8x8xx_vt8237_mirrore
        regs->low_top_address = msr.lo >> 16;
 }
 
+#ifndef __PRE_RAM__
+void k8x8xx_vt8237r_cfg(struct device *, struct device *);
+#endif
+
 #endif /* SOUTHBRIDGE_VIA_K8T890_K8X8XX_H */