src/southbridge/intel/sch/smbus.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 #include <console/console.h>
  21 #include <device/device.h>
  22 #include <device/path.h>
  23 #include <device/smbus.h>
  24 #include <device/pci.h>
  25 #include <device/pci_ids.h>
  26 #include <device/pci_ops.h>
  27 #include <arch/io.h>
  28 #include "sch.h"
  29 #include "smbus.h"
  30
  31 static int lsmbus_read_byte(device_t dev, u8 address)
  32 {
  33         u16 device;
  34         struct resource *res;
  35         struct bus *pbus;
  36
  37         device = dev->path.i2c.device;
  38         pbus = get_pbus_smbus(dev);
  39         res = find_resource(pbus->dev, 0x20);
  40
  41         return do_smbus_read_byte(res->base, device, address);
  42 }
  43
  44 static struct smbus_bus_operations lops_smbus_bus = {
  45         .read_byte      = lsmbus_read_byte,
  46 };
  47
  48 static void smbus_set_subsystem(device_t dev, unsigned vendor, unsigned device)
  49 {
  50         if (!vendor || !device) {
  51                 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
  52                                 pci_read_config32(dev, PCI_VENDOR_ID));
  53         } else {
  54                 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
  55                                 ((device & 0xffff) << 16) | (vendor & 0xffff));
  56         }
  57 }
  58
  59 static struct pci_operations smbus_pci_ops = {
  60         .set_subsystem    = smbus_set_subsystem,
  61 };
  62
  63 static struct device_operations smbus_ops = {
  64         .read_resources         = pci_dev_read_resources,
  65         .set_resources          = pci_dev_set_resources,
  66         .enable_resources       = pci_dev_enable_resources,
  67         .init                   = 0,
  68         .scan_bus               = scan_static_bus,
  69         .ops_smbus_bus          = &lops_smbus_bus,
  70         .ops_pci                = &smbus_pci_ops,
  71 };
  72
  73 // FIXME
  74 /* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
  75 static const struct pci_driver i82801gx_smbus __pci_driver = {
  76         .ops    = &smbus_ops,
  77         .vendor = PCI_VENDOR_ID_INTEL,
  78         .device = 0x27da,
  79 };